2013-05-15 17:03:09 +00:00
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/*
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2015-06-23 22:22:36 +00:00
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* Copyright (c) 2013-2016 Qlogic Corporation
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2013-05-15 17:03:09 +00:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* and ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* File: ql_os.c
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* Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "ql_os.h"
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#include "ql_hw.h"
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#include "ql_def.h"
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#include "ql_inline.h"
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#include "ql_ver.h"
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#include "ql_glbl.h"
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#include "ql_dbg.h"
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#include <sys/smp.h>
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/*
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* Some PCI Configuration Space Related Defines
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*/
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#ifndef PCI_VENDOR_QLOGIC
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#define PCI_VENDOR_QLOGIC 0x1077
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#endif
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#ifndef PCI_PRODUCT_QLOGIC_ISP8030
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#define PCI_PRODUCT_QLOGIC_ISP8030 0x8030
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#endif
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#define PCI_QLOGIC_ISP8030 \
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((PCI_PRODUCT_QLOGIC_ISP8030 << 16) | PCI_VENDOR_QLOGIC)
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/*
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* static functions
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*/
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static int qla_alloc_parent_dma_tag(qla_host_t *ha);
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static void qla_free_parent_dma_tag(qla_host_t *ha);
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static int qla_alloc_xmt_bufs(qla_host_t *ha);
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static void qla_free_xmt_bufs(qla_host_t *ha);
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static int qla_alloc_rcv_bufs(qla_host_t *ha);
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static void qla_free_rcv_bufs(qla_host_t *ha);
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static void qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb);
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static void qla_init_ifnet(device_t dev, qla_host_t *ha);
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static int qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS);
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static int qla_sysctl_get_link_status(SYSCTL_HANDLER_ARGS);
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static void qla_release(qla_host_t *ha);
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static void qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs,
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int error);
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static void qla_stop(qla_host_t *ha);
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static void qla_get_peer(qla_host_t *ha);
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static void qla_error_recovery(void *context, int pending);
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2015-06-23 22:22:36 +00:00
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static void qla_async_event(void *context, int pending);
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2017-01-25 00:23:38 +00:00
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static int qla_send(qla_host_t *ha, struct mbuf **m_headp, uint32_t txr_idx,
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uint32_t iscsi_pdu);
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2013-05-15 17:03:09 +00:00
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/*
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* Hooks to the Operating Systems
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*/
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static int qla_pci_probe (device_t);
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static int qla_pci_attach (device_t);
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static int qla_pci_detach (device_t);
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static void qla_init(void *arg);
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static int qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data);
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static int qla_media_change(struct ifnet *ifp);
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static void qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr);
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2017-01-25 00:23:38 +00:00
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static int qla_transmit(struct ifnet *ifp, struct mbuf *mp);
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static void qla_qflush(struct ifnet *ifp);
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static int qla_alloc_tx_br(qla_host_t *ha, qla_tx_fp_t *tx_fp);
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static void qla_free_tx_br(qla_host_t *ha, qla_tx_fp_t *tx_fp);
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static int qla_create_fp_taskqueues(qla_host_t *ha);
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static void qla_destroy_fp_taskqueues(qla_host_t *ha);
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static void qla_drain_fp_taskqueues(qla_host_t *ha);
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2013-05-15 17:03:09 +00:00
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static device_method_t qla_pci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, qla_pci_probe),
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DEVMETHOD(device_attach, qla_pci_attach),
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DEVMETHOD(device_detach, qla_pci_detach),
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{ 0, 0 }
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};
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static driver_t qla_pci_driver = {
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"ql", qla_pci_methods, sizeof (qla_host_t),
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};
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static devclass_t qla83xx_devclass;
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DRIVER_MODULE(qla83xx, pci, qla_pci_driver, qla83xx_devclass, 0, 0);
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MODULE_DEPEND(qla83xx, pci, 1, 1, 1);
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MODULE_DEPEND(qla83xx, ether, 1, 1, 1);
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MALLOC_DEFINE(M_QLA83XXBUF, "qla83xxbuf", "Buffers for qla83xx driver");
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#define QL_STD_REPLENISH_THRES 0
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#define QL_JUMBO_REPLENISH_THRES 32
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static char dev_str[64];
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2015-06-23 22:22:36 +00:00
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static char ver_str[64];
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2013-05-15 17:03:09 +00:00
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/*
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* Name: qla_pci_probe
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* Function: Validate the PCI device to be a QLA80XX device
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*/
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static int
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qla_pci_probe(device_t dev)
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{
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switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) {
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case PCI_QLOGIC_ISP8030:
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snprintf(dev_str, sizeof(dev_str), "%s v%d.%d.%d",
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"Qlogic ISP 83xx PCI CNA Adapter-Ethernet Function",
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QLA_VERSION_MAJOR, QLA_VERSION_MINOR,
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QLA_VERSION_BUILD);
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2015-06-23 22:22:36 +00:00
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snprintf(ver_str, sizeof(ver_str), "v%d.%d.%d",
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QLA_VERSION_MAJOR, QLA_VERSION_MINOR,
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QLA_VERSION_BUILD);
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2013-05-15 17:03:09 +00:00
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device_set_desc(dev, dev_str);
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break;
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default:
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return (ENXIO);
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}
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if (bootverbose)
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printf("%s: %s\n ", __func__, dev_str);
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return (BUS_PROBE_DEFAULT);
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}
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static void
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qla_add_sysctls(qla_host_t *ha)
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{
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device_t dev = ha->pci_dev;
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2015-06-23 22:22:36 +00:00
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SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev),
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
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OID_AUTO, "version", CTLFLAG_RD,
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ver_str, 0, "Driver Version");
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2013-05-15 17:03:09 +00:00
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SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
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OID_AUTO, "stats", CTLTYPE_INT | CTLFLAG_RW,
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(void *)ha, 0,
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qla_sysctl_get_stats, "I", "Statistics");
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SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev),
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
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OID_AUTO, "fw_version", CTLFLAG_RD,
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2014-10-21 07:31:21 +00:00
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ha->fw_ver_str, 0, "firmware version");
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2013-05-15 17:03:09 +00:00
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SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
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OID_AUTO, "link_status", CTLTYPE_INT | CTLFLAG_RW,
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(void *)ha, 0,
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qla_sysctl_get_link_status, "I", "Link Status");
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ha->dbg_level = 0;
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SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
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OID_AUTO, "debug", CTLFLAG_RW,
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&ha->dbg_level, ha->dbg_level, "Debug Level");
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ha->std_replenish = QL_STD_REPLENISH_THRES;
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SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
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OID_AUTO, "std_replenish", CTLFLAG_RW,
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&ha->std_replenish, ha->std_replenish,
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"Threshold for Replenishing Standard Frames");
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SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev),
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
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OID_AUTO, "ipv4_lro",
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CTLFLAG_RD, &ha->ipv4_lro,
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"number of ipv4 lro completions");
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SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev),
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
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OID_AUTO, "ipv6_lro",
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CTLFLAG_RD, &ha->ipv6_lro,
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"number of ipv6 lro completions");
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SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev),
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
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OID_AUTO, "tx_tso_frames",
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CTLFLAG_RD, &ha->tx_tso_frames,
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"number of Tx TSO Frames");
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SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev),
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
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OID_AUTO, "hw_vlan_tx_frames",
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CTLFLAG_RD, &ha->hw_vlan_tx_frames,
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"number of Tx VLAN Frames");
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return;
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}
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static void
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qla_watchdog(void *arg)
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{
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qla_host_t *ha = arg;
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qla_hw_t *hw;
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struct ifnet *ifp;
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uint32_t i;
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hw = &ha->hw;
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ifp = ha->ifp;
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if (ha->flags.qla_watchdog_exit) {
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ha->qla_watchdog_exited = 1;
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return;
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}
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ha->qla_watchdog_exited = 0;
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if (!ha->flags.qla_watchdog_pause) {
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if (ql_hw_check_health(ha) || ha->qla_initiate_recovery ||
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(ha->msg_from_peer == QL_PEER_MSG_RESET)) {
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ha->qla_watchdog_paused = 1;
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ha->flags.qla_watchdog_pause = 1;
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ha->qla_initiate_recovery = 0;
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ha->err_inject = 0;
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2016-10-06 21:39:04 +00:00
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device_printf(ha->pci_dev,
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"%s: taskqueue_enqueue(err_task) \n", __func__);
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2013-05-15 17:03:09 +00:00
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taskqueue_enqueue(ha->err_tq, &ha->err_task);
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2016-08-17 01:56:37 +00:00
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} else if (ha->flags.qla_interface_up) {
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2015-06-23 22:22:36 +00:00
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if (ha->async_event) {
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ha->async_event = 0;
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taskqueue_enqueue(ha->async_event_tq,
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&ha->async_event_task);
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}
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2017-01-25 00:23:38 +00:00
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for (i = 0; i < ha->hw.num_sds_rings; i++) {
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qla_tx_fp_t *fp = &ha->tx_fp[i];
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2013-05-15 17:03:09 +00:00
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2017-01-25 00:23:38 +00:00
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if (fp->fp_taskqueue != NULL)
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taskqueue_enqueue(fp->fp_taskqueue,
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&fp->fp_task);
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2013-05-15 17:03:09 +00:00
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}
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2017-01-25 00:23:38 +00:00
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2013-05-15 17:03:09 +00:00
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ha->qla_watchdog_paused = 0;
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2016-08-17 01:56:37 +00:00
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} else {
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ha->qla_watchdog_paused = 0;
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2013-05-15 17:03:09 +00:00
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}
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} else {
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ha->qla_watchdog_paused = 1;
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}
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ha->watchdog_ticks = ha->watchdog_ticks++ % 1000;
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callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS,
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qla_watchdog, ha);
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}
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/*
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* Name: qla_pci_attach
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* Function: attaches the device to the operating system
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*/
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static int
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qla_pci_attach(device_t dev)
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{
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qla_host_t *ha = NULL;
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uint32_t rsrc_len;
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int i;
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2015-06-23 22:22:36 +00:00
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uint32_t num_rcvq = 0;
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2013-05-15 17:03:09 +00:00
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if ((ha = device_get_softc(dev)) == NULL) {
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device_printf(dev, "cannot get softc\n");
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return (ENOMEM);
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}
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memset(ha, 0, sizeof (qla_host_t));
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if (pci_get_device(dev) != PCI_PRODUCT_QLOGIC_ISP8030) {
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device_printf(dev, "device is not ISP8030\n");
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return (ENXIO);
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}
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2016-08-17 01:56:37 +00:00
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ha->pci_func = pci_get_function(dev) & 0x1;
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2013-05-15 17:03:09 +00:00
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ha->pci_dev = dev;
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pci_enable_busmaster(dev);
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ha->reg_rid = PCIR_BAR(0);
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ha->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &ha->reg_rid,
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RF_ACTIVE);
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if (ha->pci_reg == NULL) {
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device_printf(dev, "unable to map any ports\n");
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|
|
|
goto qla_pci_attach_err;
|
|
|
|
}
|
|
|
|
|
|
|
|
rsrc_len = (uint32_t) bus_get_resource_count(dev, SYS_RES_MEMORY,
|
|
|
|
ha->reg_rid);
|
|
|
|
|
2017-01-25 00:23:38 +00:00
|
|
|
mtx_init(&ha->hw_lock, "qla83xx_hw_lock", MTX_NETWORK_LOCK, MTX_DEF);
|
2013-05-15 17:03:09 +00:00
|
|
|
|
|
|
|
qla_add_sysctls(ha);
|
|
|
|
ql_hw_add_sysctls(ha);
|
|
|
|
|
|
|
|
ha->flags.lock_init = 1;
|
|
|
|
|
|
|
|
ha->reg_rid1 = PCIR_BAR(2);
|
|
|
|
ha->pci_reg1 = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
|
|
|
|
&ha->reg_rid1, RF_ACTIVE);
|
|
|
|
|
|
|
|
ha->msix_count = pci_msix_count(dev);
|
|
|
|
|
|
|
|
if (ha->msix_count < (ha->hw.num_sds_rings + 1)) {
|
|
|
|
device_printf(dev, "%s: msix_count[%d] not enough\n", __func__,
|
|
|
|
ha->msix_count);
|
|
|
|
goto qla_pci_attach_err;
|
|
|
|
}
|
|
|
|
|
|
|
|
QL_DPRINT2(ha, (dev, "%s: ha %p pci_func 0x%x rsrc_count 0x%08x"
|
2017-01-25 00:23:38 +00:00
|
|
|
" msix_count 0x%x pci_reg %p pci_reg1 %p\n", __func__, ha,
|
|
|
|
ha->pci_func, rsrc_len, ha->msix_count, ha->pci_reg,
|
|
|
|
ha->pci_reg1));
|
2013-05-15 17:03:09 +00:00
|
|
|
|
2015-06-23 22:22:36 +00:00
|
|
|
/* initialize hardware */
|
|
|
|
if (ql_init_hw(ha)) {
|
|
|
|
device_printf(dev, "%s: ql_init_hw failed\n", __func__);
|
|
|
|
goto qla_pci_attach_err;
|
|
|
|
}
|
|
|
|
|
|
|
|
device_printf(dev, "%s: firmware[%d.%d.%d.%d]\n", __func__,
|
|
|
|
ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub,
|
|
|
|
ha->fw_ver_build);
|
|
|
|
snprintf(ha->fw_ver_str, sizeof(ha->fw_ver_str), "%d.%d.%d.%d",
|
|
|
|
ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub,
|
|
|
|
ha->fw_ver_build);
|
|
|
|
|
|
|
|
if (qla_get_nic_partition(ha, NULL, &num_rcvq)) {
|
|
|
|
device_printf(dev, "%s: qla_get_nic_partition failed\n",
|
|
|
|
__func__);
|
|
|
|
goto qla_pci_attach_err;
|
|
|
|
}
|
|
|
|
device_printf(dev, "%s: ha %p pci_func 0x%x rsrc_count 0x%08x"
|
2017-01-25 00:23:38 +00:00
|
|
|
" msix_count 0x%x pci_reg %p pci_reg1 %p num_rcvq = %d\n",
|
|
|
|
__func__, ha, ha->pci_func, rsrc_len, ha->msix_count,
|
|
|
|
ha->pci_reg, ha->pci_reg1, num_rcvq);
|
2015-06-23 22:22:36 +00:00
|
|
|
|
|
|
|
|
|
|
|
#ifdef QL_ENABLE_ISCSI_TLV
|
|
|
|
if ((ha->msix_count < 64) || (num_rcvq != 32)) {
|
|
|
|
ha->hw.num_sds_rings = 15;
|
2017-01-25 00:23:38 +00:00
|
|
|
ha->hw.num_tx_rings = ha->hw.num_sds_rings * 2;
|
2015-06-23 22:22:36 +00:00
|
|
|
}
|
|
|
|
#endif /* #ifdef QL_ENABLE_ISCSI_TLV */
|
|
|
|
ha->hw.num_rds_rings = ha->hw.num_sds_rings;
|
|
|
|
|
2013-05-15 17:03:09 +00:00
|
|
|
ha->msix_count = ha->hw.num_sds_rings + 1;
|
|
|
|
|
|
|
|
if (pci_alloc_msix(dev, &ha->msix_count)) {
|
|
|
|
device_printf(dev, "%s: pci_alloc_msi[%d] failed\n", __func__,
|
|
|
|
ha->msix_count);
|
|
|
|
ha->msix_count = 0;
|
|
|
|
goto qla_pci_attach_err;
|
|
|
|
}
|
|
|
|
|
|
|
|
ha->mbx_irq_rid = 1;
|
|
|
|
ha->mbx_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
|
|
|
|
&ha->mbx_irq_rid,
|
|
|
|
(RF_ACTIVE | RF_SHAREABLE));
|
|
|
|
if (ha->mbx_irq == NULL) {
|
|
|
|
device_printf(dev, "could not allocate mbx interrupt\n");
|
|
|
|
goto qla_pci_attach_err;
|
|
|
|
}
|
|
|
|
if (bus_setup_intr(dev, ha->mbx_irq, (INTR_TYPE_NET | INTR_MPSAFE),
|
|
|
|
NULL, ql_mbx_isr, ha, &ha->mbx_handle)) {
|
|
|
|
device_printf(dev, "could not setup mbx interrupt\n");
|
|
|
|
goto qla_pci_attach_err;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < ha->hw.num_sds_rings; i++) {
|
|
|
|
ha->irq_vec[i].sds_idx = i;
|
|
|
|
ha->irq_vec[i].ha = ha;
|
|
|
|
ha->irq_vec[i].irq_rid = 2 + i;
|
|
|
|
|
|
|
|
ha->irq_vec[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
|
|
|
|
&ha->irq_vec[i].irq_rid,
|
|
|
|
(RF_ACTIVE | RF_SHAREABLE));
|
|
|
|
|
|
|
|
if (ha->irq_vec[i].irq == NULL) {
|
|
|
|
device_printf(dev, "could not allocate interrupt\n");
|
|
|
|
goto qla_pci_attach_err;
|
|
|
|
}
|
|
|
|
if (bus_setup_intr(dev, ha->irq_vec[i].irq,
|
|
|
|
(INTR_TYPE_NET | INTR_MPSAFE),
|
|
|
|
NULL, ql_isr, &ha->irq_vec[i],
|
|
|
|
&ha->irq_vec[i].handle)) {
|
|
|
|
device_printf(dev, "could not setup interrupt\n");
|
|
|
|
goto qla_pci_attach_err;
|
|
|
|
}
|
2017-01-25 00:23:38 +00:00
|
|
|
|
|
|
|
ha->tx_fp[i].ha = ha;
|
|
|
|
ha->tx_fp[i].txr_idx = i;
|
|
|
|
|
|
|
|
if (qla_alloc_tx_br(ha, &ha->tx_fp[i])) {
|
|
|
|
device_printf(dev, "%s: could not allocate tx_br[%d]\n",
|
|
|
|
__func__, i);
|
|
|
|
goto qla_pci_attach_err;
|
|
|
|
}
|
2013-05-15 17:03:09 +00:00
|
|
|
}
|
|
|
|
|
2017-01-25 00:23:38 +00:00
|
|
|
if (qla_create_fp_taskqueues(ha) != 0)
|
|
|
|
goto qla_pci_attach_err;
|
|
|
|
|
2013-05-15 17:03:09 +00:00
|
|
|
printf("%s: mp__ncpus %d sds %d rds %d msi-x %d\n", __func__, mp_ncpus,
|
|
|
|
ha->hw.num_sds_rings, ha->hw.num_rds_rings, ha->msix_count);
|
|
|
|
|
|
|
|
ql_read_mac_addr(ha);
|
|
|
|
|
|
|
|
/* allocate parent dma tag */
|
|
|
|
if (qla_alloc_parent_dma_tag(ha)) {
|
|
|
|
device_printf(dev, "%s: qla_alloc_parent_dma_tag failed\n",
|
|
|
|
__func__);
|
|
|
|
goto qla_pci_attach_err;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* alloc all dma buffers */
|
|
|
|
if (ql_alloc_dma(ha)) {
|
|
|
|
device_printf(dev, "%s: ql_alloc_dma failed\n", __func__);
|
|
|
|
goto qla_pci_attach_err;
|
|
|
|
}
|
|
|
|
qla_get_peer(ha);
|
|
|
|
|
2016-08-17 01:56:37 +00:00
|
|
|
if (ql_minidump_init(ha) != 0) {
|
|
|
|
device_printf(dev, "%s: ql_minidump_init failed\n", __func__);
|
|
|
|
goto qla_pci_attach_err;
|
|
|
|
}
|
2013-05-15 17:03:09 +00:00
|
|
|
/* create the o.s ethernet interface */
|
|
|
|
qla_init_ifnet(dev, ha);
|
|
|
|
|
|
|
|
ha->flags.qla_watchdog_active = 1;
|
2016-08-17 01:56:37 +00:00
|
|
|
ha->flags.qla_watchdog_pause = 0;
|
2013-05-15 17:03:09 +00:00
|
|
|
|
2016-08-17 01:56:37 +00:00
|
|
|
callout_init(&ha->tx_callout, TRUE);
|
2013-05-15 17:03:09 +00:00
|
|
|
ha->flags.qla_callout_init = 1;
|
|
|
|
|
|
|
|
/* create ioctl device interface */
|
|
|
|
if (ql_make_cdev(ha)) {
|
|
|
|
device_printf(dev, "%s: ql_make_cdev failed\n", __func__);
|
|
|
|
goto qla_pci_attach_err;
|
|
|
|
}
|
|
|
|
|
|
|
|
callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS,
|
|
|
|
qla_watchdog, ha);
|
|
|
|
|
|
|
|
TASK_INIT(&ha->err_task, 0, qla_error_recovery, ha);
|
2016-10-06 21:39:04 +00:00
|
|
|
ha->err_tq = taskqueue_create("qla_errq", M_NOWAIT,
|
2013-05-15 17:03:09 +00:00
|
|
|
taskqueue_thread_enqueue, &ha->err_tq);
|
|
|
|
taskqueue_start_threads(&ha->err_tq, 1, PI_NET, "%s errq",
|
|
|
|
device_get_nameunit(ha->pci_dev));
|
|
|
|
|
2015-06-23 22:22:36 +00:00
|
|
|
TASK_INIT(&ha->async_event_task, 0, qla_async_event, ha);
|
2016-10-06 21:39:04 +00:00
|
|
|
ha->async_event_tq = taskqueue_create("qla_asyncq", M_NOWAIT,
|
2015-06-23 22:22:36 +00:00
|
|
|
taskqueue_thread_enqueue, &ha->async_event_tq);
|
|
|
|
taskqueue_start_threads(&ha->async_event_tq, 1, PI_NET, "%s asyncq",
|
|
|
|
device_get_nameunit(ha->pci_dev));
|
|
|
|
|
2013-05-15 17:03:09 +00:00
|
|
|
QL_DPRINT2(ha, (dev, "%s: exit 0\n", __func__));
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
qla_pci_attach_err:
|
|
|
|
|
|
|
|
qla_release(ha);
|
|
|
|
|
|
|
|
QL_DPRINT2(ha, (dev, "%s: exit ENXIO\n", __func__));
|
|
|
|
return (ENXIO);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Name: qla_pci_detach
|
|
|
|
* Function: Unhooks the device from the operating system
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
qla_pci_detach(device_t dev)
|
|
|
|
{
|
|
|
|
qla_host_t *ha = NULL;
|
|
|
|
struct ifnet *ifp;
|
|
|
|
|
|
|
|
QL_DPRINT2(ha, (dev, "%s: enter\n", __func__));
|
|
|
|
|
|
|
|
if ((ha = device_get_softc(dev)) == NULL) {
|
|
|
|
device_printf(dev, "cannot get softc\n");
|
|
|
|
return (ENOMEM);
|
|
|
|
}
|
|
|
|
|
|
|
|
ifp = ha->ifp;
|
|
|
|
|
|
|
|
(void)QLA_LOCK(ha, __func__, 0);
|
|
|
|
qla_stop(ha);
|
|
|
|
QLA_UNLOCK(ha, __func__);
|
|
|
|
|
|
|
|
qla_release(ha);
|
|
|
|
|
|
|
|
QL_DPRINT2(ha, (dev, "%s: exit\n", __func__));
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* SYSCTL Related Callbacks
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS)
|
|
|
|
{
|
|
|
|
int err, ret = 0;
|
|
|
|
qla_host_t *ha;
|
|
|
|
|
|
|
|
err = sysctl_handle_int(oidp, &ret, 0, req);
|
|
|
|
|
|
|
|
if (err || !req->newptr)
|
|
|
|
return (err);
|
|
|
|
|
|
|
|
if (ret == 1) {
|
|
|
|
ha = (qla_host_t *)arg1;
|
|
|
|
ql_get_stats(ha);
|
|
|
|
}
|
|
|
|
return (err);
|
|
|
|
}
|
|
|
|
static int
|
|
|
|
qla_sysctl_get_link_status(SYSCTL_HANDLER_ARGS)
|
|
|
|
{
|
|
|
|
int err, ret = 0;
|
|
|
|
qla_host_t *ha;
|
|
|
|
|
|
|
|
err = sysctl_handle_int(oidp, &ret, 0, req);
|
|
|
|
|
|
|
|
if (err || !req->newptr)
|
|
|
|
return (err);
|
|
|
|
|
|
|
|
if (ret == 1) {
|
|
|
|
ha = (qla_host_t *)arg1;
|
|
|
|
ql_hw_link_status(ha);
|
|
|
|
}
|
|
|
|
return (err);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Name: qla_release
|
|
|
|
* Function: Releases the resources allocated for the device
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
qla_release(qla_host_t *ha)
|
|
|
|
{
|
|
|
|
device_t dev;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
dev = ha->pci_dev;
|
|
|
|
|
2015-06-23 22:22:36 +00:00
|
|
|
if (ha->async_event_tq) {
|
|
|
|
taskqueue_drain(ha->async_event_tq, &ha->async_event_task);
|
|
|
|
taskqueue_free(ha->async_event_tq);
|
|
|
|
}
|
|
|
|
|
2013-05-15 17:03:09 +00:00
|
|
|
if (ha->err_tq) {
|
|
|
|
taskqueue_drain(ha->err_tq, &ha->err_task);
|
|
|
|
taskqueue_free(ha->err_tq);
|
|
|
|
}
|
|
|
|
|
|
|
|
ql_del_cdev(ha);
|
|
|
|
|
|
|
|
if (ha->flags.qla_watchdog_active) {
|
|
|
|
ha->flags.qla_watchdog_exit = 1;
|
|
|
|
|
|
|
|
while (ha->qla_watchdog_exited == 0)
|
|
|
|
qla_mdelay(__func__, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ha->flags.qla_callout_init)
|
|
|
|
callout_stop(&ha->tx_callout);
|
|
|
|
|
|
|
|
if (ha->ifp != NULL)
|
|
|
|
ether_ifdetach(ha->ifp);
|
|
|
|
|
|
|
|
ql_free_dma(ha);
|
|
|
|
qla_free_parent_dma_tag(ha);
|
|
|
|
|
|
|
|
if (ha->mbx_handle)
|
|
|
|
(void)bus_teardown_intr(dev, ha->mbx_irq, ha->mbx_handle);
|
|
|
|
|
|
|
|
if (ha->mbx_irq)
|
|
|
|
(void) bus_release_resource(dev, SYS_RES_IRQ, ha->mbx_irq_rid,
|
|
|
|
ha->mbx_irq);
|
|
|
|
|
|
|
|
for (i = 0; i < ha->hw.num_sds_rings; i++) {
|
|
|
|
|
|
|
|
if (ha->irq_vec[i].handle) {
|
|
|
|
(void)bus_teardown_intr(dev, ha->irq_vec[i].irq,
|
|
|
|
ha->irq_vec[i].handle);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ha->irq_vec[i].irq) {
|
|
|
|
(void)bus_release_resource(dev, SYS_RES_IRQ,
|
|
|
|
ha->irq_vec[i].irq_rid,
|
|
|
|
ha->irq_vec[i].irq);
|
|
|
|
}
|
2017-01-25 00:23:38 +00:00
|
|
|
|
|
|
|
qla_free_tx_br(ha, &ha->tx_fp[i]);
|
2013-05-15 17:03:09 +00:00
|
|
|
}
|
2017-01-25 00:23:38 +00:00
|
|
|
qla_destroy_fp_taskqueues(ha);
|
2013-05-15 17:03:09 +00:00
|
|
|
|
|
|
|
if (ha->msix_count)
|
|
|
|
pci_release_msi(dev);
|
|
|
|
|
|
|
|
if (ha->flags.lock_init) {
|
|
|
|
mtx_destroy(&ha->hw_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ha->pci_reg)
|
|
|
|
(void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid,
|
|
|
|
ha->pci_reg);
|
|
|
|
|
|
|
|
if (ha->pci_reg1)
|
|
|
|
(void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid1,
|
|
|
|
ha->pci_reg1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* DMA Related Functions
|
|
|
|
*/
|
|
|
|
|
|
|
|
static void
|
|
|
|
qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
|
|
|
|
{
|
|
|
|
*((bus_addr_t *)arg) = 0;
|
|
|
|
|
|
|
|
if (error) {
|
|
|
|
printf("%s: bus_dmamap_load failed (%d)\n", __func__, error);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
*((bus_addr_t *)arg) = segs[0].ds_addr;
|
|
|
|
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ql_alloc_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
device_t dev;
|
|
|
|
bus_addr_t b_addr;
|
|
|
|
|
|
|
|
dev = ha->pci_dev;
|
|
|
|
|
|
|
|
QL_DPRINT2(ha, (dev, "%s: enter\n", __func__));
|
|
|
|
|
|
|
|
ret = bus_dma_tag_create(
|
|
|
|
ha->parent_tag,/* parent */
|
|
|
|
dma_buf->alignment,
|
|
|
|
((bus_size_t)(1ULL << 32)),/* boundary */
|
|
|
|
BUS_SPACE_MAXADDR, /* lowaddr */
|
|
|
|
BUS_SPACE_MAXADDR, /* highaddr */
|
|
|
|
NULL, NULL, /* filter, filterarg */
|
|
|
|
dma_buf->size, /* maxsize */
|
|
|
|
1, /* nsegments */
|
|
|
|
dma_buf->size, /* maxsegsize */
|
|
|
|
0, /* flags */
|
|
|
|
NULL, NULL, /* lockfunc, lockarg */
|
|
|
|
&dma_buf->dma_tag);
|
|
|
|
|
|
|
|
if (ret) {
|
|
|
|
device_printf(dev, "%s: could not create dma tag\n", __func__);
|
|
|
|
goto ql_alloc_dmabuf_exit;
|
|
|
|
}
|
|
|
|
ret = bus_dmamem_alloc(dma_buf->dma_tag,
|
|
|
|
(void **)&dma_buf->dma_b,
|
|
|
|
(BUS_DMA_ZERO | BUS_DMA_COHERENT | BUS_DMA_NOWAIT),
|
|
|
|
&dma_buf->dma_map);
|
|
|
|
if (ret) {
|
|
|
|
bus_dma_tag_destroy(dma_buf->dma_tag);
|
|
|
|
device_printf(dev, "%s: bus_dmamem_alloc failed\n", __func__);
|
|
|
|
goto ql_alloc_dmabuf_exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = bus_dmamap_load(dma_buf->dma_tag,
|
|
|
|
dma_buf->dma_map,
|
|
|
|
dma_buf->dma_b,
|
|
|
|
dma_buf->size,
|
|
|
|
qla_dmamap_callback,
|
|
|
|
&b_addr, BUS_DMA_NOWAIT);
|
|
|
|
|
|
|
|
if (ret || !b_addr) {
|
|
|
|
bus_dma_tag_destroy(dma_buf->dma_tag);
|
|
|
|
bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b,
|
|
|
|
dma_buf->dma_map);
|
|
|
|
ret = -1;
|
|
|
|
goto ql_alloc_dmabuf_exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
dma_buf->dma_addr = b_addr;
|
|
|
|
|
|
|
|
ql_alloc_dmabuf_exit:
|
|
|
|
QL_DPRINT2(ha, (dev, "%s: exit ret 0x%08x tag %p map %p b %p sz 0x%x\n",
|
|
|
|
__func__, ret, (void *)dma_buf->dma_tag,
|
|
|
|
(void *)dma_buf->dma_map, (void *)dma_buf->dma_b,
|
|
|
|
dma_buf->size));
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
ql_free_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf)
|
|
|
|
{
|
|
|
|
bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, dma_buf->dma_map);
|
|
|
|
bus_dma_tag_destroy(dma_buf->dma_tag);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
qla_alloc_parent_dma_tag(qla_host_t *ha)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
device_t dev;
|
|
|
|
|
|
|
|
dev = ha->pci_dev;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Allocate parent DMA Tag
|
|
|
|
*/
|
|
|
|
ret = bus_dma_tag_create(
|
|
|
|
bus_get_dma_tag(dev), /* parent */
|
|
|
|
1,((bus_size_t)(1ULL << 32)),/* alignment, boundary */
|
|
|
|
BUS_SPACE_MAXADDR, /* lowaddr */
|
|
|
|
BUS_SPACE_MAXADDR, /* highaddr */
|
|
|
|
NULL, NULL, /* filter, filterarg */
|
|
|
|
BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
|
|
|
|
0, /* nsegments */
|
|
|
|
BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
|
|
|
|
0, /* flags */
|
|
|
|
NULL, NULL, /* lockfunc, lockarg */
|
|
|
|
&ha->parent_tag);
|
|
|
|
|
|
|
|
if (ret) {
|
|
|
|
device_printf(dev, "%s: could not create parent dma tag\n",
|
|
|
|
__func__);
|
|
|
|
return (-1);
|
|
|
|
}
|
|
|
|
|
|
|
|
ha->flags.parent_tag = 1;
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
qla_free_parent_dma_tag(qla_host_t *ha)
|
|
|
|
{
|
|
|
|
if (ha->flags.parent_tag) {
|
|
|
|
bus_dma_tag_destroy(ha->parent_tag);
|
|
|
|
ha->flags.parent_tag = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Name: qla_init_ifnet
|
|
|
|
* Function: Creates the Network Device Interface and Registers it with the O.S
|
|
|
|
*/
|
|
|
|
|
|
|
|
static void
|
|
|
|
qla_init_ifnet(device_t dev, qla_host_t *ha)
|
|
|
|
{
|
|
|
|
struct ifnet *ifp;
|
|
|
|
|
|
|
|
QL_DPRINT2(ha, (dev, "%s: enter\n", __func__));
|
|
|
|
|
|
|
|
ifp = ha->ifp = if_alloc(IFT_ETHER);
|
|
|
|
|
|
|
|
if (ifp == NULL)
|
|
|
|
panic("%s: cannot if_alloc()\n", device_get_nameunit(dev));
|
|
|
|
|
|
|
|
if_initname(ifp, device_get_name(dev), device_get_unit(dev));
|
|
|
|
|
2014-03-13 03:42:24 +00:00
|
|
|
ifp->if_baudrate = IF_Gbps(10);
|
2013-05-15 17:03:09 +00:00
|
|
|
ifp->if_capabilities = IFCAP_LINKSTATE;
|
2016-08-17 01:56:37 +00:00
|
|
|
ifp->if_mtu = ETHERMTU;
|
2013-05-15 17:03:09 +00:00
|
|
|
|
|
|
|
ifp->if_init = qla_init;
|
|
|
|
ifp->if_softc = ha;
|
|
|
|
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
|
|
|
|
ifp->if_ioctl = qla_ioctl;
|
2017-01-25 00:23:38 +00:00
|
|
|
|
|
|
|
ifp->if_transmit = qla_transmit;
|
|
|
|
ifp->if_qflush = qla_qflush;
|
2013-05-15 17:03:09 +00:00
|
|
|
|
|
|
|
IFQ_SET_MAXLEN(&ifp->if_snd, qla_get_ifq_snd_maxlen(ha));
|
|
|
|
ifp->if_snd.ifq_drv_maxlen = qla_get_ifq_snd_maxlen(ha);
|
|
|
|
IFQ_SET_READY(&ifp->if_snd);
|
|
|
|
|
|
|
|
ha->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
|
|
|
|
|
|
|
|
ether_ifattach(ifp, qla_get_mac_addr(ha));
|
|
|
|
|
2017-01-25 00:23:38 +00:00
|
|
|
ifp->if_capabilities |= IFCAP_HWCSUM |
|
2013-05-15 17:03:09 +00:00
|
|
|
IFCAP_TSO4 |
|
2017-01-25 00:23:38 +00:00
|
|
|
IFCAP_JUMBO_MTU |
|
|
|
|
IFCAP_VLAN_HWTAGGING |
|
|
|
|
IFCAP_VLAN_MTU |
|
|
|
|
IFCAP_VLAN_HWTSO |
|
|
|
|
IFCAP_LRO;
|
2013-05-15 17:03:09 +00:00
|
|
|
|
|
|
|
ifp->if_capenable = ifp->if_capabilities;
|
|
|
|
|
2014-08-30 19:55:54 +00:00
|
|
|
ifp->if_hdrlen = sizeof(struct ether_vlan_header);
|
2013-05-15 17:03:09 +00:00
|
|
|
|
|
|
|
ifmedia_init(&ha->media, IFM_IMASK, qla_media_change, qla_media_status);
|
|
|
|
|
|
|
|
ifmedia_add(&ha->media, (IFM_ETHER | qla_get_optics(ha) | IFM_FDX), 0,
|
|
|
|
NULL);
|
|
|
|
ifmedia_add(&ha->media, (IFM_ETHER | IFM_AUTO), 0, NULL);
|
|
|
|
|
|
|
|
ifmedia_set(&ha->media, (IFM_ETHER | IFM_AUTO));
|
|
|
|
|
|
|
|
QL_DPRINT2(ha, (dev, "%s: exit\n", __func__));
|
|
|
|
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
qla_init_locked(qla_host_t *ha)
|
|
|
|
{
|
|
|
|
struct ifnet *ifp = ha->ifp;
|
|
|
|
|
|
|
|
qla_stop(ha);
|
|
|
|
|
|
|
|
if (qla_alloc_xmt_bufs(ha) != 0)
|
|
|
|
return;
|
|
|
|
|
2015-06-23 22:22:36 +00:00
|
|
|
qla_confirm_9kb_enable(ha);
|
|
|
|
|
2013-05-15 17:03:09 +00:00
|
|
|
if (qla_alloc_rcv_bufs(ha) != 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
bcopy(IF_LLADDR(ha->ifp), ha->hw.mac_addr, ETHER_ADDR_LEN);
|
|
|
|
|
|
|
|
ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_TSO;
|
|
|
|
|
|
|
|
ha->flags.stop_rcv = 0;
|
|
|
|
if (ql_init_hw_if(ha) == 0) {
|
|
|
|
ifp = ha->ifp;
|
|
|
|
ifp->if_drv_flags |= IFF_DRV_RUNNING;
|
|
|
|
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
|
|
|
|
ha->flags.qla_watchdog_pause = 0;
|
|
|
|
ha->hw_vlan_tx_frames = 0;
|
|
|
|
ha->tx_tso_frames = 0;
|
2016-08-17 01:56:37 +00:00
|
|
|
ha->flags.qla_interface_up = 1;
|
2013-05-15 17:03:09 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
qla_init(void *arg)
|
|
|
|
{
|
|
|
|
qla_host_t *ha;
|
|
|
|
|
|
|
|
ha = (qla_host_t *)arg;
|
|
|
|
|
|
|
|
QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__));
|
|
|
|
|
|
|
|
(void)QLA_LOCK(ha, __func__, 0);
|
|
|
|
qla_init_locked(ha);
|
|
|
|
QLA_UNLOCK(ha, __func__);
|
|
|
|
|
|
|
|
QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__));
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
qla_set_multi(qla_host_t *ha, uint32_t add_multi)
|
|
|
|
{
|
|
|
|
uint8_t mta[Q8_MAX_NUM_MULTICAST_ADDRS * Q8_MAC_ADDR_LEN];
|
|
|
|
struct ifmultiaddr *ifma;
|
|
|
|
int mcnt = 0;
|
|
|
|
struct ifnet *ifp = ha->ifp;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
if_maddr_rlock(ifp);
|
|
|
|
|
|
|
|
TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
|
|
|
|
|
|
|
|
if (ifma->ifma_addr->sa_family != AF_LINK)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (mcnt == Q8_MAX_NUM_MULTICAST_ADDRS)
|
|
|
|
break;
|
|
|
|
|
|
|
|
bcopy(LLADDR((struct sockaddr_dl *) ifma->ifma_addr),
|
|
|
|
&mta[mcnt * Q8_MAC_ADDR_LEN], Q8_MAC_ADDR_LEN);
|
|
|
|
|
|
|
|
mcnt++;
|
|
|
|
}
|
|
|
|
|
|
|
|
if_maddr_runlock(ifp);
|
|
|
|
|
2017-01-25 00:23:38 +00:00
|
|
|
//if (QLA_LOCK(ha, __func__, 1) == 0) {
|
|
|
|
// ret = ql_hw_set_multi(ha, mta, mcnt, add_multi);
|
|
|
|
// QLA_UNLOCK(ha, __func__);
|
|
|
|
//}
|
|
|
|
QLA_LOCK(ha, __func__, 1);
|
|
|
|
ret = ql_hw_set_multi(ha, mta, mcnt, add_multi);
|
|
|
|
QLA_UNLOCK(ha, __func__);
|
2013-05-15 17:03:09 +00:00
|
|
|
|
|
|
|
return (ret);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
struct ifreq *ifr = (struct ifreq *)data;
|
|
|
|
struct ifaddr *ifa = (struct ifaddr *)data;
|
|
|
|
qla_host_t *ha;
|
|
|
|
|
|
|
|
ha = (qla_host_t *)ifp->if_softc;
|
|
|
|
|
|
|
|
switch (cmd) {
|
|
|
|
case SIOCSIFADDR:
|
|
|
|
QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFADDR (0x%lx)\n",
|
|
|
|
__func__, cmd));
|
|
|
|
|
|
|
|
if (ifa->ifa_addr->sa_family == AF_INET) {
|
|
|
|
ifp->if_flags |= IFF_UP;
|
|
|
|
if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
|
|
|
|
(void)QLA_LOCK(ha, __func__, 0);
|
|
|
|
qla_init_locked(ha);
|
|
|
|
QLA_UNLOCK(ha, __func__);
|
|
|
|
}
|
|
|
|
QL_DPRINT4(ha, (ha->pci_dev,
|
|
|
|
"%s: SIOCSIFADDR (0x%lx) ipv4 [0x%08x]\n",
|
|
|
|
__func__, cmd,
|
|
|
|
ntohl(IA_SIN(ifa)->sin_addr.s_addr)));
|
|
|
|
|
|
|
|
arp_ifinit(ifp, ifa);
|
|
|
|
} else {
|
|
|
|
ether_ioctl(ifp, cmd, data);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SIOCSIFMTU:
|
|
|
|
QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFMTU (0x%lx)\n",
|
|
|
|
__func__, cmd));
|
|
|
|
|
|
|
|
if (ifr->ifr_mtu > QLA_MAX_MTU) {
|
|
|
|
ret = EINVAL;
|
|
|
|
} else {
|
|
|
|
(void) QLA_LOCK(ha, __func__, 0);
|
|
|
|
ifp->if_mtu = ifr->ifr_mtu;
|
|
|
|
ha->max_frame_size =
|
|
|
|
ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
|
|
|
|
if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) {
|
|
|
|
ret = ql_set_max_mtu(ha, ha->max_frame_size,
|
|
|
|
ha->hw.rcv_cntxt_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ifp->if_mtu > ETHERMTU)
|
|
|
|
ha->std_replenish = QL_JUMBO_REPLENISH_THRES;
|
|
|
|
else
|
|
|
|
ha->std_replenish = QL_STD_REPLENISH_THRES;
|
|
|
|
|
|
|
|
|
|
|
|
QLA_UNLOCK(ha, __func__);
|
|
|
|
|
|
|
|
if (ret)
|
|
|
|
ret = EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SIOCSIFFLAGS:
|
|
|
|
QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFFLAGS (0x%lx)\n",
|
|
|
|
__func__, cmd));
|
|
|
|
|
|
|
|
(void)QLA_LOCK(ha, __func__, 0);
|
|
|
|
|
|
|
|
if (ifp->if_flags & IFF_UP) {
|
|
|
|
if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) {
|
|
|
|
if ((ifp->if_flags ^ ha->if_flags) &
|
|
|
|
IFF_PROMISC) {
|
|
|
|
ret = ql_set_promisc(ha);
|
|
|
|
} else if ((ifp->if_flags ^ ha->if_flags) &
|
|
|
|
IFF_ALLMULTI) {
|
|
|
|
ret = ql_set_allmulti(ha);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
qla_init_locked(ha);
|
|
|
|
ha->max_frame_size = ifp->if_mtu +
|
|
|
|
ETHER_HDR_LEN + ETHER_CRC_LEN;
|
|
|
|
ret = ql_set_max_mtu(ha, ha->max_frame_size,
|
|
|
|
ha->hw.rcv_cntxt_id);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
if (ifp->if_drv_flags & IFF_DRV_RUNNING)
|
|
|
|
qla_stop(ha);
|
|
|
|
ha->if_flags = ifp->if_flags;
|
|
|
|
}
|
|
|
|
|
|
|
|
QLA_UNLOCK(ha, __func__);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SIOCADDMULTI:
|
|
|
|
QL_DPRINT4(ha, (ha->pci_dev,
|
|
|
|
"%s: %s (0x%lx)\n", __func__, "SIOCADDMULTI", cmd));
|
|
|
|
|
|
|
|
if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
|
|
|
|
if (qla_set_multi(ha, 1))
|
|
|
|
ret = EINVAL;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SIOCDELMULTI:
|
|
|
|
QL_DPRINT4(ha, (ha->pci_dev,
|
|
|
|
"%s: %s (0x%lx)\n", __func__, "SIOCDELMULTI", cmd));
|
|
|
|
|
|
|
|
if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
|
|
|
|
if (qla_set_multi(ha, 0))
|
|
|
|
ret = EINVAL;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SIOCSIFMEDIA:
|
|
|
|
case SIOCGIFMEDIA:
|
|
|
|
QL_DPRINT4(ha, (ha->pci_dev,
|
|
|
|
"%s: SIOCSIFMEDIA/SIOCGIFMEDIA (0x%lx)\n",
|
|
|
|
__func__, cmd));
|
|
|
|
ret = ifmedia_ioctl(ifp, ifr, &ha->media, cmd);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SIOCSIFCAP:
|
|
|
|
{
|
|
|
|
int mask = ifr->ifr_reqcap ^ ifp->if_capenable;
|
|
|
|
|
|
|
|
QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFCAP (0x%lx)\n",
|
|
|
|
__func__, cmd));
|
|
|
|
|
|
|
|
if (mask & IFCAP_HWCSUM)
|
|
|
|
ifp->if_capenable ^= IFCAP_HWCSUM;
|
|
|
|
if (mask & IFCAP_TSO4)
|
|
|
|
ifp->if_capenable ^= IFCAP_TSO4;
|
|
|
|
if (mask & IFCAP_VLAN_HWTAGGING)
|
|
|
|
ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
|
|
|
|
if (mask & IFCAP_VLAN_HWTSO)
|
|
|
|
ifp->if_capenable ^= IFCAP_VLAN_HWTSO;
|
|
|
|
|
|
|
|
if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
|
|
|
|
qla_init(ha);
|
|
|
|
|
|
|
|
VLAN_CAPABILITIES(ifp);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
default:
|
|
|
|
QL_DPRINT4(ha, (ha->pci_dev, "%s: default (0x%lx)\n",
|
|
|
|
__func__, cmd));
|
|
|
|
ret = ether_ioctl(ifp, cmd, data);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return (ret);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
qla_media_change(struct ifnet *ifp)
|
|
|
|
{
|
|
|
|
qla_host_t *ha;
|
|
|
|
struct ifmedia *ifm;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
ha = (qla_host_t *)ifp->if_softc;
|
|
|
|
|
|
|
|
QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__));
|
|
|
|
|
|
|
|
ifm = &ha->media;
|
|
|
|
|
|
|
|
if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
|
|
|
|
ret = EINVAL;
|
|
|
|
|
|
|
|
QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__));
|
|
|
|
|
|
|
|
return (ret);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
|
|
|
|
{
|
|
|
|
qla_host_t *ha;
|
|
|
|
|
|
|
|
ha = (qla_host_t *)ifp->if_softc;
|
|
|
|
|
|
|
|
QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__));
|
|
|
|
|
|
|
|
ifmr->ifm_status = IFM_AVALID;
|
|
|
|
ifmr->ifm_active = IFM_ETHER;
|
|
|
|
|
|
|
|
ql_update_link_state(ha);
|
|
|
|
if (ha->hw.link_up) {
|
|
|
|
ifmr->ifm_status |= IFM_ACTIVE;
|
|
|
|
ifmr->ifm_active |= (IFM_FDX | qla_get_optics(ha));
|
|
|
|
}
|
|
|
|
|
|
|
|
QL_DPRINT2(ha, (ha->pci_dev, "%s: exit (%s)\n", __func__,\
|
|
|
|
(ha->hw.link_up ? "link_up" : "link_down")));
|
|
|
|
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static int
|
2017-01-25 00:23:38 +00:00
|
|
|
qla_send(qla_host_t *ha, struct mbuf **m_headp, uint32_t txr_idx,
|
|
|
|
uint32_t iscsi_pdu)
|
2013-05-15 17:03:09 +00:00
|
|
|
{
|
|
|
|
bus_dma_segment_t segs[QLA_MAX_SEGMENTS];
|
|
|
|
bus_dmamap_t map;
|
|
|
|
int nsegs;
|
|
|
|
int ret = -1;
|
|
|
|
uint32_t tx_idx;
|
|
|
|
struct mbuf *m_head = *m_headp;
|
|
|
|
|
|
|
|
QL_DPRINT8(ha, (ha->pci_dev, "%s: enter\n", __func__));
|
|
|
|
|
|
|
|
tx_idx = ha->hw.tx_cntxt[txr_idx].txr_next;
|
|
|
|
map = ha->tx_ring[txr_idx].tx_buf[tx_idx].map;
|
|
|
|
|
|
|
|
ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs,
|
|
|
|
BUS_DMA_NOWAIT);
|
|
|
|
|
|
|
|
if (ret == EFBIG) {
|
|
|
|
|
|
|
|
struct mbuf *m;
|
|
|
|
|
|
|
|
QL_DPRINT8(ha, (ha->pci_dev, "%s: EFBIG [%d]\n", __func__,
|
|
|
|
m_head->m_pkthdr.len));
|
|
|
|
|
|
|
|
m = m_defrag(m_head, M_NOWAIT);
|
|
|
|
if (m == NULL) {
|
|
|
|
ha->err_tx_defrag++;
|
|
|
|
m_freem(m_head);
|
|
|
|
*m_headp = NULL;
|
|
|
|
device_printf(ha->pci_dev,
|
|
|
|
"%s: m_defrag() = NULL [%d]\n",
|
|
|
|
__func__, ret);
|
|
|
|
return (ENOBUFS);
|
|
|
|
}
|
|
|
|
m_head = m;
|
|
|
|
*m_headp = m_head;
|
|
|
|
|
|
|
|
if ((ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head,
|
|
|
|
segs, &nsegs, BUS_DMA_NOWAIT))) {
|
|
|
|
|
|
|
|
ha->err_tx_dmamap_load++;
|
|
|
|
|
|
|
|
device_printf(ha->pci_dev,
|
|
|
|
"%s: bus_dmamap_load_mbuf_sg failed0[%d, %d]\n",
|
|
|
|
__func__, ret, m_head->m_pkthdr.len);
|
|
|
|
|
|
|
|
if (ret != ENOMEM) {
|
|
|
|
m_freem(m_head);
|
|
|
|
*m_headp = NULL;
|
|
|
|
}
|
|
|
|
return (ret);
|
|
|
|
}
|
|
|
|
|
|
|
|
} else if (ret) {
|
|
|
|
|
|
|
|
ha->err_tx_dmamap_load++;
|
|
|
|
|
|
|
|
device_printf(ha->pci_dev,
|
|
|
|
"%s: bus_dmamap_load_mbuf_sg failed1[%d, %d]\n",
|
|
|
|
__func__, ret, m_head->m_pkthdr.len);
|
|
|
|
|
|
|
|
if (ret != ENOMEM) {
|
|
|
|
m_freem(m_head);
|
|
|
|
*m_headp = NULL;
|
|
|
|
}
|
|
|
|
return (ret);
|
|
|
|
}
|
|
|
|
|
|
|
|
QL_ASSERT(ha, (nsegs != 0), ("qla_send: empty packet"));
|
|
|
|
|
|
|
|
bus_dmamap_sync(ha->tx_tag, map, BUS_DMASYNC_PREWRITE);
|
|
|
|
|
2015-06-23 22:22:36 +00:00
|
|
|
if (!(ret = ql_hw_send(ha, segs, nsegs, tx_idx, m_head, txr_idx,
|
|
|
|
iscsi_pdu))) {
|
2013-05-15 17:03:09 +00:00
|
|
|
ha->tx_ring[txr_idx].count++;
|
|
|
|
ha->tx_ring[txr_idx].tx_buf[tx_idx].m_head = m_head;
|
|
|
|
} else {
|
|
|
|
if (ret == EINVAL) {
|
|
|
|
if (m_head)
|
|
|
|
m_freem(m_head);
|
|
|
|
*m_headp = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
QL_DPRINT8(ha, (ha->pci_dev, "%s: exit\n", __func__));
|
|
|
|
return (ret);
|
|
|
|
}
|
|
|
|
|
2017-01-25 00:23:38 +00:00
|
|
|
static int
|
|
|
|
qla_alloc_tx_br(qla_host_t *ha, qla_tx_fp_t *fp)
|
|
|
|
{
|
|
|
|
snprintf(fp->tx_mtx_name, sizeof(fp->tx_mtx_name),
|
|
|
|
"qla%d_fp%d_tx_mq_lock", ha->pci_func, fp->txr_idx);
|
|
|
|
|
|
|
|
mtx_init(&fp->tx_mtx, fp->tx_mtx_name, NULL, MTX_DEF);
|
|
|
|
|
|
|
|
fp->tx_br = buf_ring_alloc(NUM_TX_DESCRIPTORS, M_DEVBUF,
|
|
|
|
M_NOWAIT, &fp->tx_mtx);
|
|
|
|
if (fp->tx_br == NULL) {
|
|
|
|
QL_DPRINT1(ha, (ha->pci_dev, "buf_ring_alloc failed for "
|
|
|
|
" fp[%d, %d]\n", ha->pci_func, fp->txr_idx));
|
|
|
|
return (-ENOMEM);
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
qla_free_tx_br(qla_host_t *ha, qla_tx_fp_t *fp)
|
|
|
|
{
|
|
|
|
struct mbuf *mp;
|
|
|
|
struct ifnet *ifp = ha->ifp;
|
|
|
|
|
|
|
|
if (mtx_initialized(&fp->tx_mtx)) {
|
|
|
|
|
|
|
|
if (fp->tx_br != NULL) {
|
|
|
|
|
|
|
|
mtx_lock(&fp->tx_mtx);
|
|
|
|
|
|
|
|
while ((mp = drbr_dequeue(ifp, fp->tx_br)) != NULL) {
|
|
|
|
m_freem(mp);
|
|
|
|
}
|
|
|
|
|
|
|
|
mtx_unlock(&fp->tx_mtx);
|
|
|
|
|
|
|
|
buf_ring_free(fp->tx_br, M_DEVBUF);
|
|
|
|
fp->tx_br = NULL;
|
|
|
|
}
|
|
|
|
mtx_destroy(&fp->tx_mtx);
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
qla_fp_taskqueue(void *context, int pending)
|
|
|
|
{
|
|
|
|
qla_tx_fp_t *fp;
|
|
|
|
qla_host_t *ha;
|
|
|
|
struct ifnet *ifp;
|
|
|
|
struct mbuf *mp;
|
|
|
|
int ret;
|
|
|
|
uint32_t txr_idx;
|
|
|
|
uint32_t iscsi_pdu = 0;
|
|
|
|
uint32_t rx_pkts_left;
|
|
|
|
|
|
|
|
fp = context;
|
|
|
|
|
|
|
|
if (fp == NULL)
|
|
|
|
return;
|
|
|
|
|
|
|
|
ha = (qla_host_t *)fp->ha;
|
|
|
|
|
|
|
|
ifp = ha->ifp;
|
|
|
|
|
|
|
|
txr_idx = fp->txr_idx;
|
|
|
|
|
|
|
|
mtx_lock(&fp->tx_mtx);
|
|
|
|
|
|
|
|
if (((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
|
|
|
|
IFF_DRV_RUNNING) || (!ha->hw.link_up)) {
|
|
|
|
mtx_unlock(&fp->tx_mtx);
|
|
|
|
goto qla_fp_taskqueue_exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
rx_pkts_left = ql_rcv_isr(ha, fp->txr_idx, 64);
|
|
|
|
|
|
|
|
#ifdef QL_ENABLE_ISCSI_TLV
|
|
|
|
ql_hw_tx_done_locked(ha, fp->txr_idx);
|
|
|
|
ql_hw_tx_done_locked(ha, (fp->txr_idx + (ha->hw.num_tx_rings >> 1)));
|
|
|
|
txr_idx = txr_idx + (ha->hw.num_tx_rings >> 1);
|
|
|
|
#else
|
|
|
|
ql_hw_tx_done_locked(ha, fp->txr_idx);
|
|
|
|
#endif /* #ifdef QL_ENABLE_ISCSI_TLV */
|
|
|
|
|
|
|
|
mp = drbr_peek(ifp, fp->tx_br);
|
|
|
|
|
|
|
|
while (mp != NULL) {
|
|
|
|
|
|
|
|
if (M_HASHTYPE_GET(mp) != M_HASHTYPE_NONE) {
|
|
|
|
#ifdef QL_ENABLE_ISCSI_TLV
|
|
|
|
if (ql_iscsi_pdu(ha, mp) == 0) {
|
|
|
|
iscsi_pdu = 1;
|
|
|
|
}
|
|
|
|
#endif /* #ifdef QL_ENABLE_ISCSI_TLV */
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = qla_send(ha, &mp, txr_idx, iscsi_pdu);
|
|
|
|
|
|
|
|
if (ret) {
|
|
|
|
if (mp != NULL)
|
|
|
|
drbr_putback(ifp, fp->tx_br, mp);
|
|
|
|
else {
|
|
|
|
drbr_advance(ifp, fp->tx_br);
|
|
|
|
}
|
|
|
|
|
|
|
|
mtx_unlock(&fp->tx_mtx);
|
|
|
|
|
|
|
|
goto qla_fp_taskqueue_exit0;
|
|
|
|
} else {
|
|
|
|
drbr_advance(ifp, fp->tx_br);
|
|
|
|
}
|
|
|
|
|
|
|
|
mp = drbr_peek(ifp, fp->tx_br);
|
|
|
|
}
|
|
|
|
|
|
|
|
mtx_unlock(&fp->tx_mtx);
|
|
|
|
|
|
|
|
qla_fp_taskqueue_exit0:
|
|
|
|
|
|
|
|
if (rx_pkts_left || ((mp != NULL) && ret)) {
|
|
|
|
taskqueue_enqueue(fp->fp_taskqueue, &fp->fp_task);
|
|
|
|
} else {
|
|
|
|
if (!ha->flags.stop_rcv) {
|
|
|
|
QL_ENABLE_INTERRUPTS(ha, fp->txr_idx);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
qla_fp_taskqueue_exit:
|
|
|
|
|
|
|
|
QL_DPRINT2(ha, (ha->pci_dev, "%s: exit ret = %d\n", __func__, ret));
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
qla_create_fp_taskqueues(qla_host_t *ha)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
uint8_t tq_name[32];
|
|
|
|
|
|
|
|
for (i = 0; i < ha->hw.num_sds_rings; i++) {
|
|
|
|
|
|
|
|
qla_tx_fp_t *fp = &ha->tx_fp[i];
|
|
|
|
|
|
|
|
bzero(tq_name, sizeof (tq_name));
|
|
|
|
snprintf(tq_name, sizeof (tq_name), "ql_fp_tq_%d", i);
|
|
|
|
|
|
|
|
TASK_INIT(&fp->fp_task, 0, qla_fp_taskqueue, fp);
|
|
|
|
|
|
|
|
fp->fp_taskqueue = taskqueue_create_fast(tq_name, M_NOWAIT,
|
|
|
|
taskqueue_thread_enqueue,
|
|
|
|
&fp->fp_taskqueue);
|
|
|
|
|
|
|
|
if (fp->fp_taskqueue == NULL)
|
|
|
|
return (-1);
|
|
|
|
|
|
|
|
taskqueue_start_threads(&fp->fp_taskqueue, 1, PI_NET, "%s",
|
|
|
|
tq_name);
|
|
|
|
|
|
|
|
QL_DPRINT1(ha, (ha->pci_dev, "%s: %p\n", __func__,
|
|
|
|
fp->fp_taskqueue));
|
|
|
|
}
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
qla_destroy_fp_taskqueues(qla_host_t *ha)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < ha->hw.num_sds_rings; i++) {
|
|
|
|
|
|
|
|
qla_tx_fp_t *fp = &ha->tx_fp[i];
|
|
|
|
|
|
|
|
if (fp->fp_taskqueue != NULL) {
|
|
|
|
taskqueue_drain(fp->fp_taskqueue, &fp->fp_task);
|
|
|
|
taskqueue_free(fp->fp_taskqueue);
|
|
|
|
fp->fp_taskqueue = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
qla_drain_fp_taskqueues(qla_host_t *ha)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < ha->hw.num_sds_rings; i++) {
|
|
|
|
qla_tx_fp_t *fp = &ha->tx_fp[i];
|
|
|
|
|
|
|
|
if (fp->fp_taskqueue != NULL) {
|
|
|
|
taskqueue_drain(fp->fp_taskqueue, &fp->fp_task);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
qla_transmit(struct ifnet *ifp, struct mbuf *mp)
|
|
|
|
{
|
|
|
|
qla_host_t *ha = (qla_host_t *)ifp->if_softc;
|
|
|
|
qla_tx_fp_t *fp;
|
|
|
|
int rss_id = 0;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__));
|
|
|
|
|
|
|
|
#if __FreeBSD_version >= 1100000
|
|
|
|
if (M_HASHTYPE_GET(mp) != M_HASHTYPE_NONE)
|
|
|
|
#else
|
|
|
|
if (mp->m_flags & M_FLOWID)
|
|
|
|
#endif
|
|
|
|
rss_id = (mp->m_pkthdr.flowid & Q8_RSS_IND_TBL_MAX_IDX) %
|
|
|
|
ha->hw.num_sds_rings;
|
|
|
|
fp = &ha->tx_fp[rss_id];
|
|
|
|
|
|
|
|
if (fp->tx_br == NULL) {
|
|
|
|
ret = EINVAL;
|
|
|
|
goto qla_transmit_exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (mp != NULL) {
|
|
|
|
ret = drbr_enqueue(ifp, fp->tx_br, mp);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (fp->fp_taskqueue != NULL)
|
|
|
|
taskqueue_enqueue(fp->fp_taskqueue, &fp->fp_task);
|
|
|
|
|
|
|
|
ret = 0;
|
|
|
|
|
|
|
|
qla_transmit_exit:
|
|
|
|
|
|
|
|
QL_DPRINT2(ha, (ha->pci_dev, "%s: exit ret = %d\n", __func__, ret));
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
qla_qflush(struct ifnet *ifp)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
qla_tx_fp_t *fp;
|
|
|
|
struct mbuf *mp;
|
|
|
|
qla_host_t *ha;
|
|
|
|
|
|
|
|
ha = (qla_host_t *)ifp->if_softc;
|
|
|
|
|
|
|
|
QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__));
|
|
|
|
|
|
|
|
for (i = 0; i < ha->hw.num_sds_rings; i++) {
|
|
|
|
|
|
|
|
fp = &ha->tx_fp[i];
|
|
|
|
|
|
|
|
if (fp == NULL)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (fp->tx_br) {
|
|
|
|
mtx_lock(&fp->tx_mtx);
|
|
|
|
|
|
|
|
while ((mp = drbr_dequeue(ifp, fp->tx_br)) != NULL) {
|
|
|
|
m_freem(mp);
|
|
|
|
}
|
|
|
|
mtx_unlock(&fp->tx_mtx);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__));
|
|
|
|
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2013-05-15 17:03:09 +00:00
|
|
|
static void
|
|
|
|
qla_stop(qla_host_t *ha)
|
|
|
|
{
|
|
|
|
struct ifnet *ifp = ha->ifp;
|
|
|
|
device_t dev;
|
2017-01-25 00:23:38 +00:00
|
|
|
int i = 0;
|
2013-05-15 17:03:09 +00:00
|
|
|
|
|
|
|
dev = ha->pci_dev;
|
|
|
|
|
|
|
|
ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING);
|
2017-01-25 00:23:38 +00:00
|
|
|
|
|
|
|
for (i = 0; i < ha->hw.num_sds_rings; i++) {
|
|
|
|
qla_tx_fp_t *fp;
|
|
|
|
|
|
|
|
fp = &ha->tx_fp[i];
|
|
|
|
|
|
|
|
if (fp == NULL)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (fp->tx_br != NULL) {
|
|
|
|
mtx_lock(&fp->tx_mtx);
|
|
|
|
mtx_unlock(&fp->tx_mtx);
|
|
|
|
}
|
|
|
|
}
|
2013-05-15 17:03:09 +00:00
|
|
|
|
|
|
|
ha->flags.qla_watchdog_pause = 1;
|
|
|
|
|
|
|
|
while (!ha->qla_watchdog_paused)
|
|
|
|
qla_mdelay(__func__, 1);
|
|
|
|
|
2016-08-17 01:56:37 +00:00
|
|
|
ha->flags.qla_interface_up = 0;
|
|
|
|
|
2017-01-25 00:23:38 +00:00
|
|
|
qla_drain_fp_taskqueues(ha);
|
|
|
|
|
2013-05-15 17:03:09 +00:00
|
|
|
ql_hw_stop_rcv(ha);
|
|
|
|
|
|
|
|
ql_del_hw_if(ha);
|
|
|
|
|
|
|
|
qla_free_xmt_bufs(ha);
|
|
|
|
qla_free_rcv_bufs(ha);
|
|
|
|
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Buffer Management Functions for Transmit and Receive Rings
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
qla_alloc_xmt_bufs(qla_host_t *ha)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
uint32_t i, j;
|
|
|
|
qla_tx_buf_t *txb;
|
|
|
|
|
|
|
|
if (bus_dma_tag_create(NULL, /* parent */
|
|
|
|
1, 0, /* alignment, bounds */
|
|
|
|
BUS_SPACE_MAXADDR, /* lowaddr */
|
|
|
|
BUS_SPACE_MAXADDR, /* highaddr */
|
|
|
|
NULL, NULL, /* filter, filterarg */
|
|
|
|
QLA_MAX_TSO_FRAME_SIZE, /* maxsize */
|
|
|
|
QLA_MAX_SEGMENTS, /* nsegments */
|
|
|
|
PAGE_SIZE, /* maxsegsize */
|
|
|
|
BUS_DMA_ALLOCNOW, /* flags */
|
|
|
|
NULL, /* lockfunc */
|
|
|
|
NULL, /* lockfuncarg */
|
|
|
|
&ha->tx_tag)) {
|
|
|
|
device_printf(ha->pci_dev, "%s: tx_tag alloc failed\n",
|
|
|
|
__func__);
|
|
|
|
return (ENOMEM);
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < ha->hw.num_tx_rings; i++) {
|
|
|
|
bzero((void *)ha->tx_ring[i].tx_buf,
|
|
|
|
(sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS));
|
|
|
|
}
|
|
|
|
|
|
|
|
for (j = 0; j < ha->hw.num_tx_rings; j++) {
|
|
|
|
for (i = 0; i < NUM_TX_DESCRIPTORS; i++) {
|
|
|
|
|
|
|
|
txb = &ha->tx_ring[j].tx_buf[i];
|
|
|
|
|
|
|
|
if ((ret = bus_dmamap_create(ha->tx_tag,
|
|
|
|
BUS_DMA_NOWAIT, &txb->map))) {
|
|
|
|
|
|
|
|
ha->err_tx_dmamap_create++;
|
|
|
|
device_printf(ha->pci_dev,
|
|
|
|
"%s: bus_dmamap_create failed[%d]\n",
|
|
|
|
__func__, ret);
|
|
|
|
|
|
|
|
qla_free_xmt_bufs(ha);
|
|
|
|
|
|
|
|
return (ret);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Release mbuf after it sent on the wire
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb)
|
|
|
|
{
|
|
|
|
QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__));
|
|
|
|
|
|
|
|
if (txb->m_head && txb->map) {
|
|
|
|
|
|
|
|
bus_dmamap_unload(ha->tx_tag, txb->map);
|
|
|
|
|
|
|
|
m_freem(txb->m_head);
|
|
|
|
txb->m_head = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (txb->map)
|
|
|
|
bus_dmamap_destroy(ha->tx_tag, txb->map);
|
|
|
|
|
|
|
|
QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
qla_free_xmt_bufs(qla_host_t *ha)
|
|
|
|
{
|
|
|
|
int i, j;
|
|
|
|
|
|
|
|
for (j = 0; j < ha->hw.num_tx_rings; j++) {
|
|
|
|
for (i = 0; i < NUM_TX_DESCRIPTORS; i++)
|
|
|
|
qla_clear_tx_buf(ha, &ha->tx_ring[j].tx_buf[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ha->tx_tag != NULL) {
|
|
|
|
bus_dma_tag_destroy(ha->tx_tag);
|
|
|
|
ha->tx_tag = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < ha->hw.num_tx_rings; i++) {
|
|
|
|
bzero((void *)ha->tx_ring[i].tx_buf,
|
|
|
|
(sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS));
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
qla_alloc_rcv_std(qla_host_t *ha)
|
|
|
|
{
|
|
|
|
int i, j, k, r, ret = 0;
|
|
|
|
qla_rx_buf_t *rxb;
|
|
|
|
qla_rx_ring_t *rx_ring;
|
|
|
|
|
|
|
|
for (r = 0; r < ha->hw.num_rds_rings; r++) {
|
|
|
|
|
|
|
|
rx_ring = &ha->rx_ring[r];
|
|
|
|
|
|
|
|
for (i = 0; i < NUM_RX_DESCRIPTORS; i++) {
|
|
|
|
|
|
|
|
rxb = &rx_ring->rx_buf[i];
|
|
|
|
|
|
|
|
ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT,
|
|
|
|
&rxb->map);
|
|
|
|
|
|
|
|
if (ret) {
|
|
|
|
device_printf(ha->pci_dev,
|
|
|
|
"%s: dmamap[%d, %d] failed\n",
|
|
|
|
__func__, r, i);
|
|
|
|
|
|
|
|
for (k = 0; k < r; k++) {
|
|
|
|
for (j = 0; j < NUM_RX_DESCRIPTORS;
|
|
|
|
j++) {
|
|
|
|
rxb = &ha->rx_ring[k].rx_buf[j];
|
|
|
|
bus_dmamap_destroy(ha->rx_tag,
|
|
|
|
rxb->map);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
for (j = 0; j < i; j++) {
|
|
|
|
bus_dmamap_destroy(ha->rx_tag,
|
|
|
|
rx_ring->rx_buf[j].map);
|
|
|
|
}
|
|
|
|
goto qla_alloc_rcv_std_err;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
qla_init_hw_rcv_descriptors(ha);
|
|
|
|
|
|
|
|
|
|
|
|
for (r = 0; r < ha->hw.num_rds_rings; r++) {
|
|
|
|
|
|
|
|
rx_ring = &ha->rx_ring[r];
|
|
|
|
|
|
|
|
for (i = 0; i < NUM_RX_DESCRIPTORS; i++) {
|
|
|
|
rxb = &rx_ring->rx_buf[i];
|
|
|
|
rxb->handle = i;
|
|
|
|
if (!(ret = ql_get_mbuf(ha, rxb, NULL))) {
|
|
|
|
/*
|
|
|
|
* set the physical address in the
|
|
|
|
* corresponding descriptor entry in the
|
|
|
|
* receive ring/queue for the hba
|
|
|
|
*/
|
|
|
|
qla_set_hw_rcv_desc(ha, r, i, rxb->handle,
|
|
|
|
rxb->paddr,
|
|
|
|
(rxb->m_head)->m_pkthdr.len);
|
|
|
|
} else {
|
|
|
|
device_printf(ha->pci_dev,
|
|
|
|
"%s: ql_get_mbuf [%d, %d] failed\n",
|
|
|
|
__func__, r, i);
|
|
|
|
bus_dmamap_destroy(ha->rx_tag, rxb->map);
|
|
|
|
goto qla_alloc_rcv_std_err;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
qla_alloc_rcv_std_err:
|
|
|
|
return (-1);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
qla_free_rcv_std(qla_host_t *ha)
|
|
|
|
{
|
|
|
|
int i, r;
|
|
|
|
qla_rx_buf_t *rxb;
|
|
|
|
|
|
|
|
for (r = 0; r < ha->hw.num_rds_rings; r++) {
|
|
|
|
for (i = 0; i < NUM_RX_DESCRIPTORS; i++) {
|
|
|
|
rxb = &ha->rx_ring[r].rx_buf[i];
|
|
|
|
if (rxb->m_head != NULL) {
|
|
|
|
bus_dmamap_unload(ha->rx_tag, rxb->map);
|
|
|
|
bus_dmamap_destroy(ha->rx_tag, rxb->map);
|
|
|
|
m_freem(rxb->m_head);
|
|
|
|
rxb->m_head = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
qla_alloc_rcv_bufs(qla_host_t *ha)
|
|
|
|
{
|
|
|
|
int i, ret = 0;
|
|
|
|
|
|
|
|
if (bus_dma_tag_create(NULL, /* parent */
|
|
|
|
1, 0, /* alignment, bounds */
|
|
|
|
BUS_SPACE_MAXADDR, /* lowaddr */
|
|
|
|
BUS_SPACE_MAXADDR, /* highaddr */
|
|
|
|
NULL, NULL, /* filter, filterarg */
|
|
|
|
MJUM9BYTES, /* maxsize */
|
|
|
|
1, /* nsegments */
|
|
|
|
MJUM9BYTES, /* maxsegsize */
|
|
|
|
BUS_DMA_ALLOCNOW, /* flags */
|
|
|
|
NULL, /* lockfunc */
|
|
|
|
NULL, /* lockfuncarg */
|
|
|
|
&ha->rx_tag)) {
|
|
|
|
|
|
|
|
device_printf(ha->pci_dev, "%s: rx_tag alloc failed\n",
|
|
|
|
__func__);
|
|
|
|
|
|
|
|
return (ENOMEM);
|
|
|
|
}
|
|
|
|
|
|
|
|
bzero((void *)ha->rx_ring, (sizeof(qla_rx_ring_t) * MAX_RDS_RINGS));
|
|
|
|
|
|
|
|
for (i = 0; i < ha->hw.num_sds_rings; i++) {
|
|
|
|
ha->hw.sds[i].sdsr_next = 0;
|
|
|
|
ha->hw.sds[i].rxb_free = NULL;
|
|
|
|
ha->hw.sds[i].rx_free = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = qla_alloc_rcv_std(ha);
|
|
|
|
|
|
|
|
return (ret);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
qla_free_rcv_bufs(qla_host_t *ha)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
qla_free_rcv_std(ha);
|
|
|
|
|
|
|
|
if (ha->rx_tag != NULL) {
|
|
|
|
bus_dma_tag_destroy(ha->rx_tag);
|
|
|
|
ha->rx_tag = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
bzero((void *)ha->rx_ring, (sizeof(qla_rx_ring_t) * MAX_RDS_RINGS));
|
|
|
|
|
|
|
|
for (i = 0; i < ha->hw.num_sds_rings; i++) {
|
|
|
|
ha->hw.sds[i].sdsr_next = 0;
|
|
|
|
ha->hw.sds[i].rxb_free = NULL;
|
|
|
|
ha->hw.sds[i].rx_free = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ql_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp)
|
|
|
|
{
|
|
|
|
register struct mbuf *mp = nmp;
|
|
|
|
struct ifnet *ifp;
|
|
|
|
int ret = 0;
|
|
|
|
uint32_t offset;
|
|
|
|
bus_dma_segment_t segs[1];
|
2015-06-23 22:22:36 +00:00
|
|
|
int nsegs, mbuf_size;
|
2013-05-15 17:03:09 +00:00
|
|
|
|
|
|
|
QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__));
|
|
|
|
|
|
|
|
ifp = ha->ifp;
|
|
|
|
|
2015-06-23 22:22:36 +00:00
|
|
|
if (ha->hw.enable_9kb)
|
|
|
|
mbuf_size = MJUM9BYTES;
|
|
|
|
else
|
|
|
|
mbuf_size = MCLBYTES;
|
|
|
|
|
2013-05-15 17:03:09 +00:00
|
|
|
if (mp == NULL) {
|
|
|
|
|
2016-08-17 02:40:17 +00:00
|
|
|
if (QL_ERR_INJECT(ha, INJCT_M_GETCL_M_GETJCL_FAILURE))
|
|
|
|
return(-1);
|
|
|
|
|
2015-06-23 22:22:36 +00:00
|
|
|
if (ha->hw.enable_9kb)
|
|
|
|
mp = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, mbuf_size);
|
|
|
|
else
|
|
|
|
mp = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
|
2013-05-15 17:03:09 +00:00
|
|
|
|
|
|
|
if (mp == NULL) {
|
|
|
|
ha->err_m_getcl++;
|
|
|
|
ret = ENOBUFS;
|
|
|
|
device_printf(ha->pci_dev,
|
|
|
|
"%s: m_getcl failed\n", __func__);
|
|
|
|
goto exit_ql_get_mbuf;
|
|
|
|
}
|
2015-06-23 22:22:36 +00:00
|
|
|
mp->m_len = mp->m_pkthdr.len = mbuf_size;
|
2013-05-15 17:03:09 +00:00
|
|
|
} else {
|
2015-06-23 22:22:36 +00:00
|
|
|
mp->m_len = mp->m_pkthdr.len = mbuf_size;
|
2013-05-15 17:03:09 +00:00
|
|
|
mp->m_data = mp->m_ext.ext_buf;
|
|
|
|
mp->m_next = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
offset = (uint32_t)((unsigned long long)mp->m_data & 0x7ULL);
|
|
|
|
if (offset) {
|
|
|
|
offset = 8 - offset;
|
|
|
|
m_adj(mp, offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Using memory from the mbuf cluster pool, invoke the bus_dma
|
|
|
|
* machinery to arrange the memory mapping.
|
|
|
|
*/
|
|
|
|
ret = bus_dmamap_load_mbuf_sg(ha->rx_tag, rxb->map,
|
|
|
|
mp, segs, &nsegs, BUS_DMA_NOWAIT);
|
|
|
|
rxb->paddr = segs[0].ds_addr;
|
|
|
|
|
|
|
|
if (ret || !rxb->paddr || (nsegs != 1)) {
|
|
|
|
m_free(mp);
|
|
|
|
rxb->m_head = NULL;
|
|
|
|
device_printf(ha->pci_dev,
|
|
|
|
"%s: bus_dmamap_load failed[%d, 0x%016llx, %d]\n",
|
|
|
|
__func__, ret, (long long unsigned int)rxb->paddr,
|
|
|
|
nsegs);
|
|
|
|
ret = -1;
|
|
|
|
goto exit_ql_get_mbuf;
|
|
|
|
}
|
|
|
|
rxb->m_head = mp;
|
|
|
|
bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_PREREAD);
|
|
|
|
|
|
|
|
exit_ql_get_mbuf:
|
|
|
|
QL_DPRINT2(ha, (ha->pci_dev, "%s: exit ret = 0x%08x\n", __func__, ret));
|
|
|
|
return (ret);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
qla_get_peer(qla_host_t *ha)
|
|
|
|
{
|
|
|
|
device_t *peers;
|
|
|
|
int count, i, slot;
|
|
|
|
int my_slot = pci_get_slot(ha->pci_dev);
|
|
|
|
|
|
|
|
if (device_get_children(device_get_parent(ha->pci_dev), &peers, &count))
|
|
|
|
return;
|
|
|
|
|
|
|
|
for (i = 0; i < count; i++) {
|
|
|
|
slot = pci_get_slot(peers[i]);
|
|
|
|
|
|
|
|
if ((slot >= 0) && (slot == my_slot) &&
|
|
|
|
(pci_get_device(peers[i]) ==
|
|
|
|
pci_get_device(ha->pci_dev))) {
|
|
|
|
if (ha->pci_dev != peers[i])
|
|
|
|
ha->peer_dev = peers[i];
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
qla_send_msg_to_peer(qla_host_t *ha, uint32_t msg_to_peer)
|
|
|
|
{
|
|
|
|
qla_host_t *ha_peer;
|
|
|
|
|
|
|
|
if (ha->peer_dev) {
|
|
|
|
if ((ha_peer = device_get_softc(ha->peer_dev)) != NULL) {
|
|
|
|
|
|
|
|
ha_peer->msg_from_peer = msg_to_peer;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
qla_error_recovery(void *context, int pending)
|
|
|
|
{
|
|
|
|
qla_host_t *ha = context;
|
|
|
|
uint32_t msecs_100 = 100;
|
|
|
|
struct ifnet *ifp = ha->ifp;
|
2017-01-25 00:23:38 +00:00
|
|
|
int i = 0;
|
2013-05-15 17:03:09 +00:00
|
|
|
|
|
|
|
(void)QLA_LOCK(ha, __func__, 0);
|
|
|
|
|
2016-08-17 01:56:37 +00:00
|
|
|
if (ha->flags.qla_interface_up) {
|
|
|
|
|
2017-01-25 00:23:38 +00:00
|
|
|
ha->hw.imd_compl = 1;
|
|
|
|
qla_mdelay(__func__, 300);
|
2015-06-23 22:22:36 +00:00
|
|
|
|
2017-01-25 00:23:38 +00:00
|
|
|
ql_hw_stop_rcv(ha);
|
2013-05-15 17:03:09 +00:00
|
|
|
|
2017-01-25 00:23:38 +00:00
|
|
|
ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING);
|
|
|
|
|
|
|
|
for (i = 0; i < ha->hw.num_sds_rings; i++) {
|
|
|
|
qla_tx_fp_t *fp;
|
|
|
|
|
|
|
|
fp = &ha->tx_fp[i];
|
|
|
|
|
|
|
|
if (fp == NULL)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (fp->tx_br != NULL) {
|
|
|
|
mtx_lock(&fp->tx_mtx);
|
|
|
|
mtx_unlock(&fp->tx_mtx);
|
|
|
|
}
|
|
|
|
}
|
2016-08-17 01:56:37 +00:00
|
|
|
}
|
2013-05-15 17:03:09 +00:00
|
|
|
|
|
|
|
QLA_UNLOCK(ha, __func__);
|
|
|
|
|
|
|
|
if ((ha->pci_func & 0x1) == 0) {
|
|
|
|
|
2013-07-03 17:57:35 +00:00
|
|
|
if (!ha->msg_from_peer) {
|
2013-05-15 17:03:09 +00:00
|
|
|
qla_send_msg_to_peer(ha, QL_PEER_MSG_RESET);
|
|
|
|
|
2013-07-03 17:57:35 +00:00
|
|
|
while ((ha->msg_from_peer != QL_PEER_MSG_ACK) &&
|
|
|
|
msecs_100--)
|
|
|
|
qla_mdelay(__func__, 100);
|
|
|
|
}
|
2013-05-15 17:03:09 +00:00
|
|
|
|
|
|
|
ha->msg_from_peer = 0;
|
|
|
|
|
2016-08-17 01:56:37 +00:00
|
|
|
(void)QLA_LOCK(ha, __func__, 0);
|
2013-08-28 20:07:00 +00:00
|
|
|
ql_minidump(ha);
|
2016-08-17 01:56:37 +00:00
|
|
|
QLA_UNLOCK(ha, __func__);
|
2013-08-28 20:07:00 +00:00
|
|
|
|
2013-05-15 17:03:09 +00:00
|
|
|
(void) ql_init_hw(ha);
|
2016-08-17 01:56:37 +00:00
|
|
|
|
|
|
|
(void)QLA_LOCK(ha, __func__, 0);
|
|
|
|
if (ha->flags.qla_interface_up) {
|
2013-05-15 17:03:09 +00:00
|
|
|
qla_free_xmt_bufs(ha);
|
|
|
|
qla_free_rcv_bufs(ha);
|
2016-08-17 01:56:37 +00:00
|
|
|
}
|
|
|
|
QLA_UNLOCK(ha, __func__);
|
2013-05-15 17:03:09 +00:00
|
|
|
|
|
|
|
qla_send_msg_to_peer(ha, QL_PEER_MSG_ACK);
|
|
|
|
|
|
|
|
} else {
|
|
|
|
if (ha->msg_from_peer == QL_PEER_MSG_RESET) {
|
|
|
|
|
|
|
|
ha->msg_from_peer = 0;
|
|
|
|
|
|
|
|
qla_send_msg_to_peer(ha, QL_PEER_MSG_ACK);
|
|
|
|
} else {
|
|
|
|
qla_send_msg_to_peer(ha, QL_PEER_MSG_RESET);
|
|
|
|
}
|
|
|
|
|
|
|
|
while ((ha->msg_from_peer != QL_PEER_MSG_ACK) && msecs_100--)
|
|
|
|
qla_mdelay(__func__, 100);
|
|
|
|
ha->msg_from_peer = 0;
|
|
|
|
|
|
|
|
(void) ql_init_hw(ha);
|
2016-08-17 01:56:37 +00:00
|
|
|
|
|
|
|
(void)QLA_LOCK(ha, __func__, 0);
|
|
|
|
if (ha->flags.qla_interface_up) {
|
2013-05-15 17:03:09 +00:00
|
|
|
qla_free_xmt_bufs(ha);
|
|
|
|
qla_free_rcv_bufs(ha);
|
|
|
|
}
|
2016-08-17 01:56:37 +00:00
|
|
|
QLA_UNLOCK(ha, __func__);
|
|
|
|
}
|
|
|
|
|
2013-05-15 17:03:09 +00:00
|
|
|
(void)QLA_LOCK(ha, __func__, 0);
|
|
|
|
|
2016-08-17 01:56:37 +00:00
|
|
|
if (ha->flags.qla_interface_up) {
|
2013-05-15 17:03:09 +00:00
|
|
|
if (qla_alloc_xmt_bufs(ha) != 0) {
|
|
|
|
QLA_UNLOCK(ha, __func__);
|
|
|
|
return;
|
|
|
|
}
|
2015-06-23 22:22:36 +00:00
|
|
|
qla_confirm_9kb_enable(ha);
|
2013-05-15 17:03:09 +00:00
|
|
|
|
|
|
|
if (qla_alloc_rcv_bufs(ha) != 0) {
|
|
|
|
QLA_UNLOCK(ha, __func__);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
ha->flags.stop_rcv = 0;
|
|
|
|
if (ql_init_hw_if(ha) == 0) {
|
|
|
|
ifp = ha->ifp;
|
|
|
|
ifp->if_drv_flags |= IFF_DRV_RUNNING;
|
|
|
|
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
|
|
|
|
ha->flags.qla_watchdog_pause = 0;
|
|
|
|
}
|
2016-08-17 01:56:37 +00:00
|
|
|
} else
|
|
|
|
ha->flags.qla_watchdog_pause = 0;
|
2013-05-15 17:03:09 +00:00
|
|
|
|
|
|
|
QLA_UNLOCK(ha, __func__);
|
|
|
|
}
|
|
|
|
|
2015-06-23 22:22:36 +00:00
|
|
|
static void
|
|
|
|
qla_async_event(void *context, int pending)
|
|
|
|
{
|
|
|
|
qla_host_t *ha = context;
|
|
|
|
|
|
|
|
(void)QLA_LOCK(ha, __func__, 0);
|
|
|
|
qla_hw_async_event(ha);
|
|
|
|
QLA_UNLOCK(ha, __func__);
|
|
|
|
}
|
|
|
|
|