freebsd-dev/sys/arm/conf/CAMBRIA.hints

# $FreeBSD$

#
# Device wiring for the Gateworks Cambria 2358.
#

# DBGU is unit 0
hint.uart.0.at="ixp0"
hint.uart.0.addr=0xc8000000
hint.uart.0.irq=15
hint.uart.0.flags=0x10
hint.uart.0.ier_rxbits=0x5d	# NB: need UUE+RTOIE

# NB: no UART1 on ixp435

# optional GPS serial port
#hint.uart.1.at="ixp0"
#hint.uart.1.addr=0x53fc0000
#hint.uart.1.irq=20
#hint.uart.1.ier_rxbits=0x1
#hint.uart.1.rclk=1843200
# optional RS485 serial port
#hint.uart.2.at="ixp0"
#hint.uart.2.addr=0x53f80000
#hint.uart.2.irq=21
#hint.uart.2.rclk=1843200

# NPE Hardware Queue Manager
hint.ixpqmgr.0.at="ixp0"

# NPE wired NICs, requires ixpqmgr
hint.npe.0.at="ixp0"
hint.npe.0.npeid="C"
hint.npe.0.mac="C"
hint.npe.0.mii="C"
hint.npe.0.phy=1
hint.npe.1.at="ixp0"
hint.npe.1.npeid="A"
hint.npe.1.mac="A"
hint.npe.1.mii="C"
hint.npe.1.phy=2

# FLASH
hint.cfi.0.at="ixp0"
hint.cfi.0.addr=0x50000000

# CF IDE controller
hint.ata_avila.0.at="ixp0"

# Front Panel LED
hint.fled.0.at="iicbus0"
hint.fled.0.addr=0x5a

# Octal LED Latch
hint.led_cambria.0.at="ixp0"

# GPIO pins
hint.gpio_cambria.0.at="iicbus0"
hint.gpio_cambria.0.addr=0x56

# Analog Devices AD7418 temperature sensor
hint.ad7418.0.at="iicbus0"
hint.ad7418.0.addr=0x50

# Dallas Semiconductor DS1672 RTC
hint.ds1672_rtc.0.at="iicbus0"
hint.ds1672_rtc.0.addr=0xd0

# USB is part of the chip
hint.ehci.0.at="ixp0"
hint.ehci.0.addr=0xcd000000
hint.ehci.0.irq=32
hint.ehci.1.at="ixp0"
hint.ehci.1.addr=0xce000000
hint.ehci.1.irq=33
seems I never committed these 2008-12-17 00:53:59 +00:00			`# $FreeBSD$`

			`#`
			`# Device wiring for the Gateworks Cambria 2358.`
			`#`

			`# DBGU is unit 0`
			`hint.uart.0.at="ixp0"`
			`hint.uart.0.addr=0xc8000000`
			`hint.uart.0.irq=15`
			`hint.uart.0.flags=0x10`
o remove hack to write UUE+RTOIE in the uart's IER; force them with hints o honor hints for the rclk 2009-06-22 22:46:37 +00:00			`hint.uart.0.ier_rxbits=0x5d # NB: need UUE+RTOIE`
seems I never committed these 2008-12-17 00:53:59 +00:00
fix typo 2009-06-22 22:47:06 +00:00			`# NB: no UART1 on ixp435`
seems I never committed these 2008-12-17 00:53:59 +00:00
enable optional GPS+RS485 uarts 2009-06-22 22:54:44 +00:00			`# optional GPS serial port`
temporarily disable optional uarts; apparently we hang when probing them (and they are not present) 2009-06-25 18:07:19 +00:00			`#hint.uart.1.at="ixp0"`
			`#hint.uart.1.addr=0x53fc0000`
			`#hint.uart.1.irq=20`
			`#hint.uart.1.ier_rxbits=0x1`
			`#hint.uart.1.rclk=1843200`
enable optional GPS+RS485 uarts 2009-06-22 22:54:44 +00:00			`# optional RS485 serial port`
temporarily disable optional uarts; apparently we hang when probing them (and they are not present) 2009-06-25 18:07:19 +00:00			`#hint.uart.2.at="ixp0"`
			`#hint.uart.2.addr=0x53f80000`
			`#hint.uart.2.irq=21`
			`#hint.uart.2.rclk=1843200`
enable optional GPS+RS485 uarts 2009-06-22 22:54:44 +00:00
seems I never committed these 2008-12-17 00:53:59 +00:00			`# NPE Hardware Queue Manager`
			`hint.ixpqmgr.0.at="ixp0"`

Grammar fix: s/NIC's/NICs/ MFC after: 3 days 2012-08-26 01:21:02 +00:00			`# NPE wired NICs, requires ixpqmgr`
seems I never committed these 2008-12-17 00:53:59 +00:00			`hint.npe.0.at="ixp0"`
			`hint.npe.0.npeid="C"`
			`hint.npe.0.mac="C"`
			`hint.npe.0.mii="C"`
			`hint.npe.0.phy=1`
enable npe-a now that it works 2009-06-17 17:58:18 +00:00			`hint.npe.1.at="ixp0"`
			`hint.npe.1.npeid="A"`
			`hint.npe.1.mac="A"`
			`hint.npe.1.mii="C"`
			`hint.npe.1.phy=2`
seems I never committed these 2008-12-17 00:53:59 +00:00
configure flash support 2009-03-10 21:49:51 +00:00			`# FLASH`
			`hint.cfi.0.at="ixp0"`
			`hint.cfi.0.addr=0x50000000`

seems I never committed these 2008-12-17 00:53:59 +00:00			`# CF IDE controller`
			`hint.ata_avila.0.at="ixp0"`

			`# Front Panel LED`
			`hint.fled.0.at="iicbus0"`
			`hint.fled.0.addr=0x5a`

			`# Octal LED Latch`
			`hint.led_cambria.0.at="ixp0"`

Add a GPIO driver for the Gateworks Cambria platform. The external gpio pins are connected to a PLD on the i2c bus, unfortunatley this device does not conform by failing to send an ack after each byte written. The iicbb driver will abort the transfer when the address is not ack'd and it would introduce a lot of churn to be able to pass a flag down to iicbb_start/iicbb_write. Instead we do bad things by grabbing the iicbus but then doing our own bit banging. 2010-11-11 20:18:33 +00:00			`# GPIO pins`
			`hint.gpio_cambria.0.at="iicbus0"`
			`hint.gpio_cambria.0.addr=0x56`

seems I never committed these 2008-12-17 00:53:59 +00:00			`# Analog Devices AD7418 temperature sensor`
			`hint.ad7418.0.at="iicbus0"`
			`hint.ad7418.0.addr=0x50`

			`# Dallas Semiconductor DS1672 RTC`
- Rename ds1672 and ds133x devices to "ds1672_rtc" and "ds133x_rtc" respectivly. This will allow one to have a kernel with both devices present and use it for multiple boards with different types of RTC sitting on a bus. Discussed with: imp 2009-04-21 22:48:12 +00:00			`hint.ds1672_rtc.0.at="iicbus0"`
			`hint.ds1672_rtc.0.addr=0xd0`
seems I never committed these 2008-12-17 00:53:59 +00:00
			`# USB is part of the chip`
			`hint.ehci.0.at="ixp0"`
			`hint.ehci.0.addr=0xcd000000`
			`hint.ehci.0.irq=32`
			`hint.ehci.1.at="ixp0"`
			`hint.ehci.1.addr=0xce000000`
			`hint.ehci.1.irq=33`