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freebsd-dev/sys/powerpc/include/intr_machdep.h

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/* -> /*- for license, minor formatting changes
2005-01-07 02:29:27 +00:00
/*-
Add interrupt handling support code. I've tried to make this fairly platform-independant as some PowerPC platforms may not have openpic-style interrupt controllers. This may not have the best performance but it works for now.
2002-07-09 11:12:20 +00:00
* Copyright (C) 2002 Benno Rice.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _MACHINE_INTR_MACHDEP_H_
#define _MACHINE_INTR_MACHDEP_H_
Revamp the interrupt handling in support of INTR_FILTER. This includes: o Revamp the PIC I/F to only abstract the PIC hardware. The resource handling has been moved to nexus, where it belongs. o Include EOI and MASK+EOI methods to the PIC I/F in support of INTR_FILTER. o With the allocation of interrupt resources and setup of interrupt handlers in the common platform code we can delay talking to the PIC hardware after enumeration of all devices. Introduce a call to powerpc_intr_enable() in configure_final() to achieve that and have powerpc_setup_intr() only program the PIC when !cold. o As a consequence of the above, remove all early_attach() glue from the OpenPIC and Heathrow PIC drivers and have them register themselves when they're found during enumeration. o Decouple the interrupt vector from the interrupt request line. Allocate vectors increasingly so that they can be used for the intrcnt index as well. Extend the Heathrow PIC driver to translate between IRQ and vector. The OpenPIC driver already has the support for vectors in hardware. Approved by: re (blanket)
2007-08-11 19:25:32 +00:00
#define INTR_VECTORS 256
Provide for multiple, cascaded PICs on PowerPC systems, and extend the OFW interrupt map interface to also return the device's interrupt parent. MFC after: 8.1-RELEASE
2010-06-18 14:06:27 +00:00
#define MAX_PICS 5
#define IGN_SHIFT 8
#define INTR_INTLINE(irq) (irq & ((1 << IGN_SHIFT) - 1))
#define INTR_IGN(irq) (irq >> IGN_SHIFT)
Missed commit in r209310: the IRQ number in INTR_VEC() should have parantheses around it to allow arithmetic expressions to be passed. Submitted by: Andreas Tobler
2010-06-18 21:24:17 +00:00
#define INTR_VEC(pic_id, irq) ((powerpc_ign_lookup(pic_id) << IGN_SHIFT) | (irq))
Add interrupt handling support code. I've tried to make this fairly platform-independant as some PowerPC platforms may not have openpic-style interrupt controllers. This may not have the best performance but it works for now.
2002-07-09 11:12:20 +00:00
Add support for the U4 PCI-Express bridge chipset used in late-generation Powermac G5 systems. MSI and several other things are not presently supported. The U3/U4 internal device support portions of this change were contributed by Andreas Tobler. MFC after: 1 week
2010-05-16 15:18:25 +00:00
/*
* Default base address for MSI messages on PowerPC
*/
#define MSI_INTEL_ADDR_BASE 0xfee00000
Provide for multiple, cascaded PICs on PowerPC systems, and extend the OFW interrupt map interface to also return the device's interrupt parent. MFC after: 8.1-RELEASE
2010-06-18 14:06:27 +00:00
extern device_t root_pic;
Add interrupt handling support code. I've tried to make this fairly platform-independant as some PowerPC platforms may not have openpic-style interrupt controllers. This may not have the best performance but it works for now.
2002-07-09 11:12:20 +00:00
Revamp the interrupt handling in support of INTR_FILTER. This includes: o Revamp the PIC I/F to only abstract the PIC hardware. The resource handling has been moved to nexus, where it belongs. o Include EOI and MASK+EOI methods to the PIC I/F in support of INTR_FILTER. o With the allocation of interrupt resources and setup of interrupt handlers in the common platform code we can delay talking to the PIC hardware after enumeration of all devices. Introduce a call to powerpc_intr_enable() in configure_final() to achieve that and have powerpc_setup_intr() only program the PIC when !cold. o As a consequence of the above, remove all early_attach() glue from the OpenPIC and Heathrow PIC drivers and have them register themselves when they're found during enumeration. o Decouple the interrupt vector from the interrupt request line. Allocate vectors increasingly so that they can be used for the intrcnt index as well. Extend the Heathrow PIC driver to translate between IRQ and vector. The OpenPIC driver already has the support for vectors in hardware. Approved by: re (blanket)
2007-08-11 19:25:32 +00:00
struct trapframe;
Add interrupt handling support code. I've tried to make this fairly platform-independant as some PowerPC platforms may not have openpic-style interrupt controllers. This may not have the best performance but it works for now.
2002-07-09 11:12:20 +00:00
Add PIC support for IPIs. When registering an interrupt handler, the PIC also informs the platform at which IRQ level it can start assigning IPIs, since this can depend on the number of IRQs supported for external interrupts.
2008-02-12 18:14:46 +00:00
driver_filter_t powerpc_ipi_handler;
void powerpc_register_pic(device_t, u_int);
Provide for multiple, cascaded PICs on PowerPC systems, and extend the OFW interrupt map interface to also return the device's interrupt parent. MFC after: 8.1-RELEASE
2010-06-18 14:06:27 +00:00
int powerpc_ign_lookup(uint32_t pic_id);
Eliminate <machine/interruptvar.h> as it has only a single prototype. In the future that prototype will not be needed at all anyway, but for now it's moved to intr_machdep.h. Approved by: re (blanket)
2007-08-07 23:33:35 +00:00
Revamp the interrupt handling in support of INTR_FILTER. This includes: o Revamp the PIC I/F to only abstract the PIC hardware. The resource handling has been moved to nexus, where it belongs. o Include EOI and MASK+EOI methods to the PIC I/F in support of INTR_FILTER. o With the allocation of interrupt resources and setup of interrupt handlers in the common platform code we can delay talking to the PIC hardware after enumeration of all devices. Introduce a call to powerpc_intr_enable() in configure_final() to achieve that and have powerpc_setup_intr() only program the PIC when !cold. o As a consequence of the above, remove all early_attach() glue from the OpenPIC and Heathrow PIC drivers and have them register themselves when they're found during enumeration. o Decouple the interrupt vector from the interrupt request line. Allocate vectors increasingly so that they can be used for the intrcnt index as well. Extend the Heathrow PIC driver to translate between IRQ and vector. The OpenPIC driver already has the support for vectors in hardware. Approved by: re (blanket)
2007-08-11 19:25:32 +00:00
void powerpc_dispatch_intr(u_int, struct trapframe *);
int powerpc_enable_intr(void);
Provide for multiple, cascaded PICs on PowerPC systems, and extend the OFW interrupt map interface to also return the device's interrupt parent. MFC after: 8.1-RELEASE
2010-06-18 14:06:27 +00:00
int powerpc_setup_intr(const char *, u_int, driver_filter_t, driver_intr_t,
void *, enum intr_type, void **);
Revamp the interrupt handling in support of INTR_FILTER. This includes: o Revamp the PIC I/F to only abstract the PIC hardware. The resource handling has been moved to nexus, where it belongs. o Include EOI and MASK+EOI methods to the PIC I/F in support of INTR_FILTER. o With the allocation of interrupt resources and setup of interrupt handlers in the common platform code we can delay talking to the PIC hardware after enumeration of all devices. Introduce a call to powerpc_intr_enable() in configure_final() to achieve that and have powerpc_setup_intr() only program the PIC when !cold. o As a consequence of the above, remove all early_attach() glue from the OpenPIC and Heathrow PIC drivers and have them register themselves when they're found during enumeration. o Decouple the interrupt vector from the interrupt request line. Allocate vectors increasingly so that they can be used for the intrcnt index as well. Extend the Heathrow PIC driver to translate between IRQ and vector. The OpenPIC driver already has the support for vectors in hardware. Approved by: re (blanket)
2007-08-11 19:25:32 +00:00
int powerpc_teardown_intr(void *);
Add support for the BUS_CONFIG_INTR() method to the platform and to openpic(4). Make use of it in ocpbus(4). On the MPC85xxCDS, IRQ0:4 are active-low.
2008-03-07 22:08:43 +00:00
int powerpc_config_intr(int, enum intr_trigger, enum intr_polarity);
Add interrupt handling support code. I've tried to make this fairly platform-independant as some PowerPC platforms may not have openpic-style interrupt controllers. This may not have the best performance but it works for now.
2002-07-09 11:12:20 +00:00
#endif /* _MACHINE_INTR_MACHDEP_H_ */
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