d/freebsd-dev
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
c989441af6
freebsd-dev/sys/powerpc/include/psl.h

107 lines
4.7 KiB
C
Raw Normal View History

/* -> /*- for license, minor formatting changes
2005-01-07 02:29:27 +00:00
/*-
Bring in NetBSD code used in the PowerPC port. Reviewed by: obrien, dfr Obtained from: NetBSD
2001-06-10 02:39:37 +00:00
* Copyright (C) 1995, 1996 Wolfgang Solfrank.
* Copyright (C) 1995, 1996 TooLs GmbH.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by TooLs GmbH.
* 4. The name of TooLs GmbH may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
Add the PSL_VEC flag for AltiVec (no, it's not here yet =))
2002-05-19 04:03:11 +00:00
* $NetBSD: psl.h,v 1.5 2000/11/19 19:52:37 matt Exp $
Bring in NetBSD code used in the PowerPC port. Reviewed by: obrien, dfr Obtained from: NetBSD
2001-06-10 02:39:37 +00:00
* $FreeBSD$
*/
#ifndef _MACHINE_PSL_H_
#define _MACHINE_PSL_H_
Rework and extend PowerPC headers definitons towards Book-E/e500 CPUs support. Approved by: cognet (mentor) Obtained from: Juniper, Semihalf MFp4: e500
2008-03-03 13:20:52 +00:00
/*
Remove some #ifdef and duplication in the MSR bit definitions. This adds some security features to the Book-E kernel as well.
2013-10-25 14:37:15 +00:00
* Machine State Register (MSR) - All cores
Rework and extend PowerPC headers definitons towards Book-E/e500 CPUs support. Approved by: cognet (mentor) Obtained from: Juniper, Semihalf MFp4: e500
2008-03-03 13:20:52 +00:00
*/
Remove some #ifdef and duplication in the MSR bit definitions. This adds some security features to the Book-E kernel as well.
2013-10-25 14:37:15 +00:00
#define PSL_VEC 0x02000000UL /* AltiVec/SPE vector unit available */
Kernel support for the Vector-Scalar eXtension (VSX) found on the POWER7 and POWER8. This instruction set unifies the 32 64-bit scalar floating point registers with the 32 128-bit vector registers into a single bank of 64 128-bit registers. Kernel support mostly amounts to saving and restoring the wider version of the floating point registers and making sure that both scalar FP and vector registers are enabled once a VSX instruction is executed. get_mcontext() and friends currently cannot see the high bits, which will require a little more work. As the system compiler (GCC 4.2) does not support VSX, making use of this from userland requires either newer GCC or clang. Relnotes: yes Sponsored by: FreeBSD Foundation
2015-02-22 21:40:27 +00:00
#define PSL_VSX 0x00800000UL /* Vector-Scalar unit available */
Remove some #ifdef and duplication in the MSR bit definitions. This adds some security features to the Book-E kernel as well.
2013-10-25 14:37:15 +00:00
#define PSL_EE 0x00008000UL /* external interrupt enable */
#define PSL_PR 0x00004000UL /* privilege mode (1 == user) */
#define PSL_FP 0x00002000UL /* floating point enable */
#define PSL_ME 0x00001000UL /* machine check enable */
#define PSL_FE0 0x00000800UL /* floating point interrupt mode 0 */
#define PSL_BE 0x00000200UL /* branch trace enable */
#define PSL_FE1 0x00000100UL /* floating point interrupt mode 1 */
#define PSL_PMM 0x00000004UL /* performance monitor mark */
/* Machine State Register - Book-E cores */
MFppc64: Kernel sources for 64-bit PowerPC, along with build-system changes to keep 32-bit kernels compiling (build system changes for 64-bit kernels are coming later). Existing 32-bit PowerPC kernel configurations must be updated after this change to specify their architecture.
2010-07-13 05:32:19 +00:00
#define PSL_UCLE 0x04000000UL /* User mode cache lock enable */
#define PSL_WE 0x00040000UL /* Wait state enable */
#define PSL_CE 0x00020000UL /* Critical interrupt enable */
Remove some #ifdef and duplication in the MSR bit definitions. This adds some security features to the Book-E kernel as well.
2013-10-25 14:37:15 +00:00
#define PSL_UBLE 0x00000400UL /* BTB lock enable - e500 only */
#define PSL_DWE 0x00000400UL /* Debug Wait Enable - 440 only*/
MFppc64: Kernel sources for 64-bit PowerPC, along with build-system changes to keep 32-bit kernels compiling (build system changes for 64-bit kernels are coming later). Existing 32-bit PowerPC kernel configurations must be updated after this change to specify their architecture.
2010-07-13 05:32:19 +00:00
#define PSL_DE 0x00000200UL /* Debug interrupt enable */
#define PSL_IS 0x00000020UL /* Instruction address space */
#define PSL_DS 0x00000010UL /* Data address space */
Remove some #ifdef and duplication in the MSR bit definitions. This adds some security features to the Book-E kernel as well.
2013-10-25 14:37:15 +00:00
/* Machine State Register (MSR) - AIM cores */
MFppc64: Kernel sources for 64-bit PowerPC, along with build-system changes to keep 32-bit kernels compiling (build system changes for 64-bit kernels are coming later). Existing 32-bit PowerPC kernel configurations must be updated after this change to specify their architecture.
2010-07-13 05:32:19 +00:00
#ifdef __powerpc64__
#define PSL_SF 0x8000000000000000UL /* 64-bit addressing */
#define PSL_HV 0x1000000000000000UL /* hyper-privileged mode */
#endif
#define PSL_POW 0x00040000UL /* power management */
#define PSL_ILE 0x00010000UL /* interrupt endian mode (1 == le) */
#define PSL_SE 0x00000400UL /* single-step trace enable */
Remove some #ifdef and duplication in the MSR bit definitions. This adds some security features to the Book-E kernel as well.
2013-10-25 14:37:15 +00:00
#define PSL_IP 0x00000040UL /* interrupt prefix - 601 only */
MFppc64: Kernel sources for 64-bit PowerPC, along with build-system changes to keep 32-bit kernels compiling (build system changes for 64-bit kernels are coming later). Existing 32-bit PowerPC kernel configurations must be updated after this change to specify their architecture.
2010-07-13 05:32:19 +00:00
#define PSL_IR 0x00000020UL /* instruction address relocation */
#define PSL_DR 0x00000010UL /* data address relocation */
#define PSL_RI 0x00000002UL /* recoverable interrupt */
#define PSL_LE 0x00000001UL /* endian mode (1 == le) */
Bring in NetBSD code used in the PowerPC port. Reviewed by: obrien, dfr Obtained from: NetBSD
2001-06-10 02:39:37 +00:00
/*
* Floating-point exception modes:
*/
#define PSL_FE_DIS 0 /* none */
#define PSL_FE_NONREC PSL_FE1 /* imprecise non-recoverable */
#define PSL_FE_REC PSL_FE0 /* imprecise recoverable */
#define PSL_FE_PREC (PSL_FE0 | PSL_FE1) /* precise */
#define PSL_FE_DFLT PSL_FE_DIS /* default == none */
Remove some #ifdef and duplication in the MSR bit definitions. This adds some security features to the Book-E kernel as well.
2013-10-25 14:37:15 +00:00
#if defined(BOOKE_E500)
/* Initial kernel MSR, use IS=1 ad DS=1. */
#define PSL_KERNSET_INIT (PSL_IS | PSL_DS)
#define PSL_KERNSET (PSL_CE | PSL_ME | PSL_EE)
Define PSL_SRR1_MASK for BOOK-E too so MPC85XX compiles again.
2014-03-25 22:49:33 +00:00
#define PSL_SRR1_MASK 0x00000000UL /* No mask on Book-E */
Remove some #ifdef and duplication in the MSR bit definitions. This adds some security features to the Book-E kernel as well.
2013-10-25 14:37:15 +00:00
#elif defined(BOOKE_PPC4XX)
#define PSL_KERNSET (PSL_CE | PSL_ME | PSL_EE | PSL_FP)
Mask out SRR1 bits that aren't exported to the MSR. This appears to fix a strange condition with X on 32-bit PowerBooks I observed, caused by one of these bits getting set in the mcontext, but not set in the thread, which may be a symptom of another problem, more difficult to diagnose. Since these bits aren't exported anyway, this change makes it more explicit that the bits aren't MSR-related in SRR1. MFC after: 3 weeks
2014-03-21 04:45:57 +00:00
#define PSL_SRR1_MASK 0x00000000UL /* No mask on Book-E */
Remove some #ifdef and duplication in the MSR bit definitions. This adds some security features to the Book-E kernel as well.
2013-10-25 14:37:15 +00:00
#elif defined(AIM)
MFppc64: Kernel sources for 64-bit PowerPC, along with build-system changes to keep 32-bit kernels compiling (build system changes for 64-bit kernels are coming later). Existing 32-bit PowerPC kernel configurations must be updated after this change to specify their architecture.
2010-07-13 05:32:19 +00:00
#ifdef __powerpc64__
#define PSL_KERNSET (PSL_SF | PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI)
#else
Create a new definition, PSL_KERNSET, which is used for setting the MSR in kernel mode. Redefine PSL_USERSET in terms of this by or'ing in PSL_PR.
2004-11-30 09:04:41 +00:00
#define PSL_KERNSET (PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI)
MFppc64: Kernel sources for 64-bit PowerPC, along with build-system changes to keep 32-bit kernels compiling (build system changes for 64-bit kernels are coming later). Existing 32-bit PowerPC kernel configurations must be updated after this change to specify their architecture.
2010-07-13 05:32:19 +00:00
#endif
Correct the SRR1 mask, it's 10-15 not 10-11. X-MFC-with: r263464,r263752
2014-04-06 06:18:43 +00:00
#define PSL_SRR1_MASK 0x783f0000UL /* Bits 1-4, 10-15 (ppc32), 33-36, 42-47 (ppc64) */
Remove some #ifdef and duplication in the MSR bit definitions. This adds some security features to the Book-E kernel as well.
2013-10-25 14:37:15 +00:00
#endif
Bring in NetBSD code used in the PowerPC port. Reviewed by: obrien, dfr Obtained from: NetBSD
2001-06-10 02:39:37 +00:00
Remove some #ifdef and duplication in the MSR bit definitions. This adds some security features to the Book-E kernel as well.
2013-10-25 14:37:15 +00:00
#define PSL_USERSET (PSL_KERNSET | PSL_PR)
Mask out SRR1 bits that aren't exported to the MSR. This appears to fix a strange condition with X on 32-bit PowerBooks I observed, caused by one of these bits getting set in the mcontext, but not set in the thread, which may be a symptom of another problem, more difficult to diagnose. Since these bits aren't exported anyway, this change makes it more explicit that the bits aren't MSR-related in SRR1. MFC after: 3 weeks
2014-03-21 04:45:57 +00:00
#define PSL_USERSTATIC (~(PSL_VEC | PSL_FP | PSL_FE0 | PSL_FE1) & ~PSL_SRR1_MASK)
Bring in NetBSD code used in the PowerPC port. Reviewed by: obrien, dfr Obtained from: NetBSD
2001-06-10 02:39:37 +00:00
#endif /* _MACHINE_PSL_H_ */
Reference in New Issue Copy Permalink