293 lines
9.0 KiB
C
293 lines
9.0 KiB
C
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/*------------------------------------------------------------------
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* octeon_pko.h Packet Output Block
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*
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*------------------------------------------------------------------
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*/
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#ifndef ___OCTEON_PKO__H___
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#define ___OCTEON_PKO__H___
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/*
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* PKO Command Buffer Register.
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* Specify Pool-# and Size of each entry in Pool. For Output Cmd Buffers.
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*/
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typedef union {
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uint64_t word64;
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struct {
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uint64_t unused_mbz : 41; /* Must be zero */
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uint64_t pool : 3; /* FPA Pool to use */
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uint64_t unused_mbz2 : 7; /* Must be zero */
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uint64_t size : 13; /* Size of the pool blocks */
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} bits;
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} octeon_pko_pool_cfg_t;
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/*
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* PKO GMX Mode Register
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* Specify the # of GMX1 ports and GMX0 ports
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*/
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typedef union {
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uint64_t word64;
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struct {
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uint64_t unused_mbz : 58; /* MBZ */
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uint64_t mode1 : 3; /* # GMX1 ports; */
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/* 16 >> MODE1, 0 <= MODE1 <=4 */
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uint64_t mode0 : 3; /* # GMX0 ports; */
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/* 16 >> MODE0, 0 <= MODE0 <=4 */
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} bits;
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} octeon_pko_reg_gmx_port_mode_t;
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typedef union {
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uint64_t word64;
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struct {
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uint64_t unused_mbz : 62; /* MBZ */
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uint64_t mode : 2; /* Queues Mode */
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} bits;
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} octeon_pko_queue_mode_t;
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typedef union {
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uint64_t word64;
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struct {
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uint64_t unused_mbz : 32; /* MBZ */
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uint64_t crc_ports_mask : 32; /* CRC Ports Enable mask */
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} bits;
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} octeon_pko_crc_ports_enable_t;
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#define OCTEON_PKO_QUEUES_MAX 128
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#define OCTEON_PKO_PORTS_MAX 36
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#define OCTEON_PKO_PORT_ILLEGAL 63
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/* Defines how the PKO command buffer FAU register is used */
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#define OCTEON_PKO_INDEX_BITS 12
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#define OCTEON_PKO_INDEX_MASK ((1ull << OCTEON_PKO_INDEX_BITS) - 1)
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typedef enum {
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OCTEON_PKO_SUCCESS,
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OCTEON_PKO_INVALID_PORT,
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OCTEON_PKO_INVALID_QUEUE,
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OCTEON_PKO_INVALID_PRIORITY,
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OCTEON_PKO_NO_MEMORY
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} octeon_pko_status_t;
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typedef struct {
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long packets;
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uint64_t octets;
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uint64_t doorbell;
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} octeon_pko_port_status_t;
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typedef union {
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uint64_t word64;
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struct {
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octeon_mips_space_t mem_space : 2; /* Octeon IO_SEG */
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uint64_t unused_mbz :13; /* Must be zero */
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uint64_t is_io : 1; /* Must be one */
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uint64_t did : 8; /* device-ID on non-coherent bus*/
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uint64_t unused_mbz2 : 4; /* Must be zero */
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uint64_t unused_mbz3 :18; /* Must be zero */
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uint64_t port : 6; /* output port */
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uint64_t queue : 9; /* output queue to send */
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uint64_t unused_mbz4 : 3; /* Must be zero */
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} bits;
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} octeon_pko_doorbell_address_t;
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/*
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* Structure of the first packet output command word.
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*/
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typedef union {
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uint64_t word64;
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struct {
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octeon_fau_op_size_t size1 : 2; /* The size of reg1 operation */
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/* - could be 8, 16, 32, or 64 bits */
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octeon_fau_op_size_t size0 : 2; /* The size of the reg0 operation */
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/* - could be 8, 16, 32, or 64 bits */
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uint64_t subone1 : 1; /* Subtract 1, else sub pkt size */
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uint64_t reg1 :11; /* The register, subtract will be */
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/* done if reg1 is non-zero */
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uint64_t subone0 : 1; /* Subtract 1, else sub pkt size */
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uint64_t reg0 :11; /* The register, subtract will be */
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/* done if reg0 is non-zero */
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uint64_t unused : 2; /* Must be zero */
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uint64_t wqp : 1; /* If rsp, then word3 contains a */
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/* ptr to a work queue entry */
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uint64_t rsp : 1; /* HW will respond when done */
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uint64_t gather : 1; /* If set, the supplied pkt_ptr is */
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/* a ptr to a list of pkt_ptr's */
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uint64_t ipoffp1 : 7; /* Off to IP hdr. For HW checksum */
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uint64_t ignore_i : 1; /* Ignore I bit in all pointers */
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uint64_t dontfree : 1; /* Don't free buffs containing pkt */
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uint64_t segs : 6; /* Number of segs. If gather set, */
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/* also gather list length */
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uint64_t total_bytes :16; /* Includes L2, w/o trailing CRC */
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} bits;
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} octeon_pko_command_word0_t;
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typedef union {
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void* ptr;
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uint64_t word64;
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struct {
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uint64_t i : 1; /* Invert the "free" pick of the overall pkt. */
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/* For inbound pkts, HW always sets this to 0 */
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uint64_t back : 4; /* Amount to back up to get to buffer start */
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/* in cache lines. This is mostly less than 1 */
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/* complete cache line; so the value is zero */
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uint64_t pool : 3; /* FPA pool that the buffer belongs to */
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uint64_t size :16; /* segment size (bytes) pointed at by addr */
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uint64_t addr :40; /* Ptr to 1st data byte. NOT buffer */
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} bits;
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} octeon_pko_packet_ptr_t;
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/*
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* Definition of the hardware structure used to configure an
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* output queue.
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*/
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typedef union {
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uint64_t word64;
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struct {
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uint64_t unused_mbz : 3; /* Must be zero */
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uint64_t qos_mask : 8; /* Control Mask priority */
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/* across 8 QOS levels */
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uint64_t buf_ptr : 36; /* Command buffer pointer, */
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/* 8 byte-aligned */
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uint64_t tail : 1; /* Set if this queue is the tail */
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/* of the port queue array */
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uint64_t index : 3; /* Index (distance from head) in */
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/* the port queue array */
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uint64_t port : 6; /* Port ID for this queue mapping */
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uint64_t queue : 7; /* Hardware queue number */
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} bits;
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} octeon_pko_queue_cfg_t;
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typedef union {
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uint64_t word64;
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struct {
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uint64_t unused_mbz : 48;
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uint64_t inc : 8;
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uint64_t idx : 8;
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} bits;
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} octeon_pko_read_idx_t;
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typedef struct octeon_pko_sw_queue_info_t_
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{
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uint64_t xmit_command_state;
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octeon_spinlock_t lock;
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uint32_t pad[29];
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} octeon_pko_sw_queue_info_t;
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#define OCTEON_DID_PKT 10ULL
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#define OCTEON_DID_PKT_SEND OCTEON_ADDR_FULL_DID(OCTEON_DID_PKT,2ULL)
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/*
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* Ring the packet output doorbell. This tells the packet
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* output hardware that "len" command words have been added
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* to its pending list. This command includes the required
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* SYNCW before the doorbell ring.
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*
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* @param port Port the packet is for
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* @param queue Queue the packet is for
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* @param len Length of the command in 64 bit words
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*/
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extern void octeon_pko_doorbell_data(u_int port);
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//#define CORE_0_ONLY 1
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static inline void octeon_pko_ring_doorbell (u_int port, u_int queue,
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u_int len)
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{
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octeon_pko_doorbell_address_t ptr;
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ptr.word64 = 0;
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ptr.bits.mem_space = OCTEON_IO_SEG;
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ptr.bits.did = OCTEON_DID_PKT_SEND;
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ptr.bits.is_io = 1;
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ptr.bits.port = port;
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ptr.bits.queue = queue;
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OCTEON_SYNCWS;
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oct_write64(ptr.word64, len);
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}
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#define OCTEON_PKO_QUEUES_PER_PORT_INTERFACE0 1
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#define OCTEON_PKO_QUEUES_PER_PORT_INTERFACE1 1
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#define OCTEON_PKO_QUEUES_PER_PORT_PCI 1
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/*
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* octeon_pko_get_base_queue
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*
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* For a given port number, return the base pko output queue
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* for the port.
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*/
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static inline u_int octeon_pko_get_base_queue (u_int port)
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{
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if (port < 16) {
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return (port * OCTEON_PKO_QUEUES_PER_PORT_INTERFACE0);
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}
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if (port < 32) {
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return (16 * OCTEON_PKO_QUEUES_PER_PORT_INTERFACE0 +
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(port - 16) * OCTEON_PKO_QUEUES_PER_PORT_INTERFACE1);
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}
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return (16 * OCTEON_PKO_QUEUES_PER_PORT_INTERFACE0 +
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16 * OCTEON_PKO_QUEUES_PER_PORT_INTERFACE1 +
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(port - 32) * OCTEON_PKO_QUEUES_PER_PORT_PCI);
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}
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/*
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* For a given port number, return the number of pko output queues.
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*
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* @param port Port number
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* @return Number of output queues
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*/
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static inline u_int octeon_pko_get_num_queues(u_int port)
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{
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if (port < 16) {
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return (OCTEON_PKO_QUEUES_PER_PORT_INTERFACE0);
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} else if (port<32) {
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return (OCTEON_PKO_QUEUES_PER_PORT_INTERFACE1);
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}
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return (OCTEON_PKO_QUEUES_PER_PORT_PCI);
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}
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/*
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* Externs
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*/
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extern void octeon_pko_init(void);
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extern void octeon_pko_enable(void);
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extern void octeon_pko_disable(void);
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extern void octeon_pko_show(u_int start_port, u_int end_port);
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extern void octeon_pko_config(void);
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extern void octeon_pko_config_cmdbuf_global_defaults(u_int cmdbuf_pool, u_int elem_size);
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extern void octeon_pko_config_rgmx_ports(void);
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extern void octeon_pko_get_port_status(u_int, u_int, octeon_pko_port_status_t *status);
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extern octeon_pko_status_t octeon_pko_config_port(u_int port,
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u_int base_queue,
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u_int num_queues,
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const u_int priority[],
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u_int pko_output_cmdbuf_fpa_pool,
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octeon_pko_sw_queue_info_t sw_queues[]);
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#endif /* ___OCTEON_PKO__H___ */
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