2012-02-26 13:45:25 +00:00
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/*-
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* Copyright (c) 2012 Justin Hibbits
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/systm.h>
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#include <sys/module.h>
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#include <sys/kernel.h>
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#include <sys/rman.h>
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#include <sys/sysctl.h>
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#include <machine/bus.h>
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#include <dev/ofw/openfirm.h>
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/* From the xf86-video-ati driver's radeon_reg.h */
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#define RADEON_LVDS_GEN_CNTL 0x02d0
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#define RADEON_LVDS_ON (1 << 0)
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#define RADEON_LVDS_DISPLAY_DIS (1 << 1)
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#define RADEON_LVDS_PANEL_TYPE (1 << 2)
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#define RADEON_LVDS_PANEL_FORMAT (1 << 3)
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#define RADEON_LVDS_RST_FM (1 << 6)
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#define RADEON_LVDS_EN (1 << 7)
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#define RADEON_LVDS_BL_MOD_LEVEL_SHIFT 8
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#define RADEON_LVDS_BL_MOD_LEVEL_MASK (0xff << 8)
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#define RADEON_LVDS_BL_MOD_EN (1 << 16)
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#define RADEON_LVDS_DIGON (1 << 18)
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#define RADEON_LVDS_BLON (1 << 19)
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2013-12-20 16:37:03 +00:00
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#define RADEON_LVDS_PLL_CNTL 0x02d4
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#define RADEON_LVDS_PLL_EN (1 << 16)
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#define RADEON_LVDS_PLL_RESET (1 << 17)
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#define RADEON_PIXCLKS_CNTL 0x002d
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#define RADEON_PIXCLK_LVDS_ALWAYS_ONb (1 << 14)
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2014-04-06 21:48:45 +00:00
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#define RADEON_DISP_PWR_MAN 0x0d08
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#define RADEON_AUTO_PWRUP_EN (1 << 26)
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#define RADEON_CLOCK_CNTL_DATA 0x000c
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#define RADEON_CLOCK_CNTL_INDEX 0x0008
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#define RADEON_PLL_WR_EN (1 << 7)
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#define RADEON_CRTC_GEN_CNTL 0x0050
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2012-02-26 13:45:25 +00:00
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struct atibl_softc {
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struct resource *sc_memr;
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2013-12-20 16:37:03 +00:00
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int sc_level;
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2012-02-26 13:45:25 +00:00
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};
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static void atibl_identify(driver_t *driver, device_t parent);
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static int atibl_probe(device_t dev);
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static int atibl_attach(device_t dev);
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static int atibl_setlevel(struct atibl_softc *sc, int newlevel);
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static int atibl_getlevel(struct atibl_softc *sc);
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2013-12-20 16:37:03 +00:00
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static int atibl_resume(device_t dev);
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static int atibl_suspend(device_t dev);
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2012-02-26 13:45:25 +00:00
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static int atibl_sysctl(SYSCTL_HANDLER_ARGS);
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static device_method_t atibl_methods[] = {
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/* Device interface */
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2013-12-20 16:37:03 +00:00
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DEVMETHOD(device_identify, atibl_identify),
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DEVMETHOD(device_probe, atibl_probe),
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DEVMETHOD(device_attach, atibl_attach),
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DEVMETHOD(device_suspend, atibl_suspend),
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DEVMETHOD(device_resume, atibl_resume),
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2012-02-26 13:45:25 +00:00
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{0, 0},
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};
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static driver_t atibl_driver = {
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"backlight",
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atibl_methods,
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sizeof(struct atibl_softc)
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};
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static devclass_t atibl_devclass;
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DRIVER_MODULE(atibl, vgapci, atibl_driver, atibl_devclass, 0, 0);
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static void
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atibl_identify(driver_t *driver, device_t parent)
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{
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2013-08-31 16:31:48 +00:00
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if (OF_finddevice("mac-io/backlight") == -1)
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return;
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2012-02-26 13:45:25 +00:00
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if (device_find_child(parent, "backlight", -1) == NULL)
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device_add_child(parent, "backlight", -1);
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}
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static int
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atibl_probe(device_t dev)
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{
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char control[8];
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phandle_t handle;
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handle = OF_finddevice("mac-io/backlight");
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2012-08-21 23:55:29 +00:00
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if (handle == -1)
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2012-02-26 13:45:25 +00:00
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return (ENXIO);
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if (OF_getprop(handle, "backlight-control", &control, sizeof(control)) < 0)
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return (ENXIO);
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if (strcmp(control, "ati") != 0)
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return (ENXIO);
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2012-08-21 23:55:29 +00:00
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device_set_desc(dev, "PowerBook backlight for ATI graphics");
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2012-02-26 13:45:25 +00:00
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return (0);
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}
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static int
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atibl_attach(device_t dev)
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{
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struct atibl_softc *sc;
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struct sysctl_ctx_list *ctx;
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struct sysctl_oid *tree;
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int rid;
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sc = device_get_softc(dev);
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rid = 0x18; /* BAR[2], for the MMIO register */
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sc->sc_memr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE | RF_SHAREABLE);
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if (sc->sc_memr == NULL) {
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device_printf(dev, "Could not alloc mem resource!\n");
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return (ENXIO);
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}
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ctx = device_get_sysctl_ctx(dev);
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tree = device_get_sysctl_tree(dev);
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SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
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2013-12-20 16:37:03 +00:00
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"level", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
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atibl_sysctl, "I", "Backlight level (0-100)");
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2012-02-26 13:45:25 +00:00
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return (0);
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}
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2014-04-06 21:48:45 +00:00
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static uint32_t __inline
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atibl_pll_rreg(struct atibl_softc *sc, uint32_t reg)
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{
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uint32_t data, save, tmp;
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bus_write_1(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX,
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((reg & 0x3f) | RADEON_PLL_WR_EN));
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(void)bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA);
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(void)bus_read_4(sc->sc_memr, RADEON_CRTC_GEN_CNTL);
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data = bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA);
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/* Only necessary on R300, bt won't hurt others. */
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save = bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX);
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tmp = save & (~0x3f | RADEON_PLL_WR_EN);
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bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, tmp);
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tmp = bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA);
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bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, save);
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return data;
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}
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static void __inline
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atibl_pll_wreg(struct atibl_softc *sc, uint32_t reg, uint32_t val)
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{
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uint32_t save, tmp;
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bus_write_1(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX,
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((reg & 0x3f) | RADEON_PLL_WR_EN));
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(void)bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA);
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(void)bus_read_4(sc->sc_memr, RADEON_CRTC_GEN_CNTL);
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bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA, val);
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DELAY(5000);
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/* Only necessary on R300, bt won't hurt others. */
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save = bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX);
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tmp = save & (~0x3f | RADEON_PLL_WR_EN);
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bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, tmp);
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tmp = bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA);
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bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, save);
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}
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2012-02-26 13:45:25 +00:00
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static int
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atibl_setlevel(struct atibl_softc *sc, int newlevel)
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{
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uint32_t lvds_gen_cntl;
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2013-12-20 16:37:03 +00:00
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uint32_t lvds_pll_cntl;
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uint32_t pixclks_cntl;
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2014-04-06 21:48:45 +00:00
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uint32_t disp_pwr_reg;
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2012-02-26 13:45:25 +00:00
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if (newlevel > 100)
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newlevel = 100;
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if (newlevel < 0)
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newlevel = 0;
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lvds_gen_cntl = bus_read_4(sc->sc_memr, RADEON_LVDS_GEN_CNTL);
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2013-12-20 16:37:03 +00:00
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if (newlevel > 0) {
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newlevel = (newlevel * 5) / 2 + 5;
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2014-04-06 21:48:45 +00:00
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disp_pwr_reg = bus_read_4(sc->sc_memr, RADEON_DISP_PWR_MAN);
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disp_pwr_reg |= RADEON_AUTO_PWRUP_EN;
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bus_write_4(sc->sc_memr, RADEON_DISP_PWR_MAN, disp_pwr_reg);
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2013-12-20 16:37:03 +00:00
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lvds_pll_cntl = bus_read_4(sc->sc_memr, RADEON_LVDS_PLL_CNTL);
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lvds_pll_cntl |= RADEON_LVDS_PLL_EN;
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bus_write_4(sc->sc_memr, RADEON_LVDS_PLL_CNTL, lvds_pll_cntl);
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lvds_pll_cntl &= ~RADEON_LVDS_PLL_RESET;
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bus_write_4(sc->sc_memr, RADEON_LVDS_PLL_CNTL, lvds_pll_cntl);
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2014-04-06 21:48:45 +00:00
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DELAY(1000);
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2013-12-20 16:37:03 +00:00
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lvds_gen_cntl &= ~(RADEON_LVDS_DISPLAY_DIS |
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RADEON_LVDS_BL_MOD_LEVEL_MASK);
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lvds_gen_cntl |= RADEON_LVDS_ON | RADEON_LVDS_EN |
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RADEON_LVDS_DIGON | RADEON_LVDS_BLON;
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lvds_gen_cntl |= (newlevel << RADEON_LVDS_BL_MOD_LEVEL_SHIFT) &
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RADEON_LVDS_BL_MOD_LEVEL_MASK;
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lvds_gen_cntl |= RADEON_LVDS_BL_MOD_EN;
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2014-04-06 23:57:19 +00:00
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DELAY(200000);
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2013-12-20 16:37:03 +00:00
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bus_write_4(sc->sc_memr, RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
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} else {
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2014-04-06 21:48:45 +00:00
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pixclks_cntl = atibl_pll_rreg(sc, RADEON_PIXCLKS_CNTL);
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atibl_pll_wreg(sc, RADEON_PIXCLKS_CNTL,
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2013-12-20 16:37:03 +00:00
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pixclks_cntl & ~RADEON_PIXCLK_LVDS_ALWAYS_ONb);
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lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS;
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2014-04-06 23:57:19 +00:00
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lvds_gen_cntl &= ~(RADEON_LVDS_BL_MOD_EN | RADEON_LVDS_BL_MOD_LEVEL_MASK);
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2013-12-20 16:37:03 +00:00
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bus_write_4(sc->sc_memr, RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
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lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_EN);
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2014-04-06 23:57:19 +00:00
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DELAY(200000);
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2013-12-20 16:37:03 +00:00
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bus_write_4(sc->sc_memr, RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
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2014-04-06 21:48:45 +00:00
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atibl_pll_wreg(sc, RADEON_PIXCLKS_CNTL, pixclks_cntl);
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2014-04-06 23:57:19 +00:00
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DELAY(200000);
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2013-12-20 16:37:03 +00:00
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}
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2012-02-26 13:45:25 +00:00
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return (0);
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}
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static int
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atibl_getlevel(struct atibl_softc *sc)
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{
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uint32_t lvds_gen_cntl;
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int level;
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lvds_gen_cntl = bus_read_4(sc->sc_memr, RADEON_LVDS_GEN_CNTL);
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level = ((lvds_gen_cntl & RADEON_LVDS_BL_MOD_LEVEL_MASK) >>
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2013-12-20 16:37:03 +00:00
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RADEON_LVDS_BL_MOD_LEVEL_SHIFT);
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if (level != 0)
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level = ((level - 5) * 2) / 5;
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2012-02-26 13:45:25 +00:00
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return (level);
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}
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2013-12-20 16:37:03 +00:00
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static int
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atibl_suspend(device_t dev)
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{
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struct atibl_softc *sc;
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sc = device_get_softc(dev);
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sc->sc_level = atibl_getlevel(sc);
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atibl_setlevel(sc, 0);
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return (0);
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}
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static int
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atibl_resume(device_t dev)
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{
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struct atibl_softc *sc;
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sc = device_get_softc(dev);
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atibl_setlevel(sc, sc->sc_level);
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return (0);
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}
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2012-02-26 13:45:25 +00:00
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static int
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atibl_sysctl(SYSCTL_HANDLER_ARGS)
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{
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struct atibl_softc *sc;
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int newlevel, error;
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|
|
|
sc = arg1;
|
|
|
|
|
|
|
|
newlevel = atibl_getlevel(sc);
|
|
|
|
|
|
|
|
error = sysctl_handle_int(oidp, &newlevel, 0, req);
|
|
|
|
|
|
|
|
if (error || !req->newptr)
|
|
|
|
return (error);
|
|
|
|
|
|
|
|
return (atibl_setlevel(sc, newlevel));
|
|
|
|
}
|