2011-05-13 04:54:01 +00:00
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/*-
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* Copyright (c) 2011 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/linker_set.h>
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#include <sys/stat.h>
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#include <sys/uio.h>
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#include <sys/ioctl.h>
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2012-12-08 02:37:18 +00:00
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#include <sys/disk.h>
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2011-05-13 04:54:01 +00:00
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#include <errno.h>
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#include <fcntl.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <string.h>
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#include <strings.h>
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#include <unistd.h>
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#include <assert.h>
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#include <pthread.h>
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2012-12-13 01:58:11 +00:00
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#include "bhyverun.h"
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2011-05-13 04:54:01 +00:00
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#include "pci_emul.h"
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#include "virtio.h"
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#define VTBLK_RINGSZ 64
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#define VTBLK_CFGSZ 28
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2013-02-01 16:58:59 +00:00
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#define VTBLK_R_CFG VTCFG_R_CFG1
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2011-05-13 04:54:01 +00:00
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#define VTBLK_R_CFG_END VTBLK_R_CFG + VTBLK_CFGSZ -1
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#define VTBLK_R_MAX VTBLK_R_CFG_END
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#define VTBLK_REGSZ VTBLK_R_MAX+1
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#define VTBLK_MAXSEGS 32
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#define VTBLK_S_OK 0
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#define VTBLK_S_IOERR 1
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/*
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* Host capabilities
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*/
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#define VTBLK_S_HOSTCAPS \
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( 0x00000004 | /* host maximum request segments */ \
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0x10000000 ) /* supports indirect descriptors */
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2013-02-01 16:58:59 +00:00
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static int use_msix = 1;
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2011-05-13 04:54:01 +00:00
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struct vring_hqueue {
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/* Internal state */
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uint16_t hq_size;
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uint16_t hq_cur_aidx; /* trails behind 'avail_idx' */
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/* Host-context pointers to the queue */
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struct virtio_desc *hq_dtable;
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uint16_t *hq_avail_flags;
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uint16_t *hq_avail_idx; /* monotonically increasing */
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uint16_t *hq_avail_ring;
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uint16_t *hq_used_flags;
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uint16_t *hq_used_idx; /* monotonically increasing */
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struct virtio_used *hq_used_ring;
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};
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/*
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* Config space
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*/
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struct vtblk_config {
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uint64_t vbc_capacity;
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uint32_t vbc_size_max;
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uint32_t vbc_seg_max;
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uint16_t vbc_geom_c;
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uint8_t vbc_geom_h;
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uint8_t vbc_geom_s;
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uint32_t vbc_blk_size;
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uint32_t vbc_sectors_max;
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} __packed;
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CTASSERT(sizeof(struct vtblk_config) == VTBLK_CFGSZ);
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/*
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* Fixed-size block header
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*/
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struct virtio_blk_hdr {
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#define VBH_OP_READ 0
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#define VBH_OP_WRITE 1
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uint32_t vbh_type;
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uint32_t vbh_ioprio;
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uint64_t vbh_sector;
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} __packed;
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/*
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* Debug printf
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*/
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static int pci_vtblk_debug;
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#define DPRINTF(params) if (pci_vtblk_debug) printf params
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#define WPRINTF(params) printf params
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/*
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* Per-device softc
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*/
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struct pci_vtblk_softc {
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struct pci_devinst *vbsc_pi;
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int vbsc_fd;
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int vbsc_status;
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int vbsc_isr;
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int vbsc_lastq;
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uint32_t vbsc_features;
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uint64_t vbsc_pfn;
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struct vring_hqueue vbsc_q;
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struct vtblk_config vbsc_cfg;
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2013-02-01 16:58:59 +00:00
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uint16_t msix_table_idx_req;
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uint16_t msix_table_idx_cfg;
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2011-05-13 04:54:01 +00:00
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};
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2013-02-01 16:58:59 +00:00
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/*
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* Return the size of IO BAR that maps virtio header and device specific
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* region. The size would vary depending on whether MSI-X is enabled or
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* not
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*/
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static uint64_t
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pci_vtblk_iosize(struct pci_devinst *pi)
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{
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if (pci_msix_enabled(pi))
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return (VTBLK_REGSZ);
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else
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return (VTBLK_REGSZ - (VTCFG_R_CFG1 - VTCFG_R_MSIX));
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}
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2011-05-13 04:54:01 +00:00
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/*
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* Return the number of available descriptors in the vring taking care
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* of the 16-bit index wraparound.
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*/
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static int
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hq_num_avail(struct vring_hqueue *hq)
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{
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int ndesc;
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if (*hq->hq_avail_idx >= hq->hq_cur_aidx)
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ndesc = *hq->hq_avail_idx - hq->hq_cur_aidx;
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else
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ndesc = UINT16_MAX - hq->hq_cur_aidx + *hq->hq_avail_idx + 1;
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assert(ndesc >= 0 && ndesc <= hq->hq_size);
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return (ndesc);
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}
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static void
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pci_vtblk_update_status(struct pci_vtblk_softc *sc, uint32_t value)
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{
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if (value == 0) {
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DPRINTF(("vtblk: device reset requested !\n"));
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}
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sc->vbsc_status = value;
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}
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static void
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pci_vtblk_proc(struct pci_vtblk_softc *sc, struct vring_hqueue *hq)
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{
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struct iovec iov[VTBLK_MAXSEGS];
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struct virtio_blk_hdr *vbh;
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struct virtio_desc *vd, *vid;
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struct virtio_used *vu;
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uint8_t *status;
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int i;
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int err;
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int iolen;
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int nsegs;
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int uidx, aidx, didx;
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int writeop;
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off_t offset;
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uidx = *hq->hq_used_idx;
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aidx = hq->hq_cur_aidx;
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didx = hq->hq_avail_ring[aidx % hq->hq_size];
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assert(didx >= 0 && didx < hq->hq_size);
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vd = &hq->hq_dtable[didx];
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/*
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* Verify that the descriptor is indirect, and obtain
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* the pointer to the indirect descriptor.
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* There has to be space for at least 3 descriptors
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* in the indirect descriptor array: the block header,
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* 1 or more data descriptors, and a status byte.
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*/
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assert(vd->vd_flags & VRING_DESC_F_INDIRECT);
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nsegs = vd->vd_len / sizeof(struct virtio_desc);
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assert(nsegs >= 3);
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assert(nsegs < VTBLK_MAXSEGS + 2);
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vid = paddr_guest2host(vd->vd_addr);
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assert((vid->vd_flags & VRING_DESC_F_INDIRECT) == 0);
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/*
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* The first descriptor will be the read-only fixed header
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*/
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vbh = paddr_guest2host(vid[0].vd_addr);
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assert(vid[0].vd_len == sizeof(struct virtio_blk_hdr));
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assert(vid[0].vd_flags & VRING_DESC_F_NEXT);
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assert((vid[0].vd_flags & VRING_DESC_F_WRITE) == 0);
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writeop = (vbh->vbh_type == VBH_OP_WRITE);
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offset = vbh->vbh_sector * DEV_BSIZE;
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/*
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* Build up the iovec based on the guest's data descriptors
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*/
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for (i = 1, iolen = 0; i < nsegs - 1; i++) {
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iov[i-1].iov_base = paddr_guest2host(vid[i].vd_addr);
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iov[i-1].iov_len = vid[i].vd_len;
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iolen += vid[i].vd_len;
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assert(vid[i].vd_flags & VRING_DESC_F_NEXT);
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assert((vid[i].vd_flags & VRING_DESC_F_INDIRECT) == 0);
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/*
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* - write op implies read-only descriptor,
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* - read op implies write-only descriptor,
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* therefore test the inverse of the descriptor bit
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* to the op.
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*/
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assert(((vid[i].vd_flags & VRING_DESC_F_WRITE) == 0) ==
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writeop);
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}
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/* Lastly, get the address of the status byte */
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status = paddr_guest2host(vid[nsegs - 1].vd_addr);
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assert(vid[nsegs - 1].vd_len == 1);
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assert((vid[nsegs - 1].vd_flags & VRING_DESC_F_NEXT) == 0);
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assert(vid[nsegs - 1].vd_flags & VRING_DESC_F_WRITE);
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DPRINTF(("virtio-block: %s op, %d bytes, %d segs, offset %ld\n\r",
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writeop ? "write" : "read", iolen, nsegs - 2, offset));
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if (writeop){
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err = pwritev(sc->vbsc_fd, iov, nsegs - 2, offset);
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} else {
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err = preadv(sc->vbsc_fd, iov, nsegs - 2, offset);
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}
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*status = err < 0 ? VTBLK_S_IOERR : VTBLK_S_OK;
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/*
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* Return the single indirect descriptor back to the host
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*/
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vu = &hq->hq_used_ring[uidx % hq->hq_size];
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vu->vu_idx = didx;
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vu->vu_tlen = 1;
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hq->hq_cur_aidx++;
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*hq->hq_used_idx += 1;
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}
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static void
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pci_vtblk_qnotify(struct pci_vtblk_softc *sc)
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{
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struct vring_hqueue *hq = &sc->vbsc_q;
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int i;
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int ndescs;
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/*
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* Calculate number of ring entries to process
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*/
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ndescs = hq_num_avail(hq);
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if (ndescs == 0)
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return;
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/*
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* Run through all the entries, placing them into iovecs and
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* sending when an end-of-packet is found
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*/
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for (i = 0; i < ndescs; i++)
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pci_vtblk_proc(sc, hq);
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/*
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* Generate an interrupt if able
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*/
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2013-02-01 16:58:59 +00:00
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if ((*hq->hq_avail_flags & VRING_AVAIL_F_NO_INTERRUPT) == 0) {
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if (use_msix) {
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pci_generate_msix(sc->vbsc_pi, sc->msix_table_idx_req);
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} else if (sc->vbsc_isr == 0) {
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sc->vbsc_isr = 1;
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pci_generate_msi(sc->vbsc_pi, 0);
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}
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2011-05-13 04:54:01 +00:00
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}
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}
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static void
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pci_vtblk_ring_init(struct pci_vtblk_softc *sc, uint64_t pfn)
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{
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struct vring_hqueue *hq;
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sc->vbsc_pfn = pfn << VRING_PFN;
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/*
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* Set up host pointers to the various parts of the
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* queue
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*/
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hq = &sc->vbsc_q;
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hq->hq_size = VTBLK_RINGSZ;
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hq->hq_dtable = paddr_guest2host(pfn << VRING_PFN);
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hq->hq_avail_flags = (uint16_t *)(hq->hq_dtable + hq->hq_size);
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hq->hq_avail_idx = hq->hq_avail_flags + 1;
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hq->hq_avail_ring = hq->hq_avail_flags + 2;
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hq->hq_used_flags = (uint16_t *)roundup2((uintptr_t)hq->hq_avail_ring,
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VRING_ALIGN);
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hq->hq_used_idx = hq->hq_used_flags + 1;
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hq->hq_used_ring = (struct virtio_used *)(hq->hq_used_flags + 2);
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/*
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* Initialize queue indexes
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*/
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hq->hq_cur_aidx = 0;
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}
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static int
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pci_vtblk_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
|
|
|
|
{
|
|
|
|
struct stat sbuf;
|
|
|
|
struct pci_vtblk_softc *sc;
|
2012-12-08 02:37:18 +00:00
|
|
|
off_t size;
|
2011-05-13 04:54:01 +00:00
|
|
|
int fd;
|
2012-12-08 02:37:18 +00:00
|
|
|
int sectsz;
|
2013-02-01 16:58:59 +00:00
|
|
|
const char *env_msi;
|
2011-05-13 04:54:01 +00:00
|
|
|
|
|
|
|
if (opts == NULL) {
|
|
|
|
printf("virtio-block: backing device required\n");
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Access to guest memory is required. Fail if
|
|
|
|
* memory not mapped
|
|
|
|
*/
|
|
|
|
if (paddr_guest2host(0) == NULL)
|
|
|
|
return (1);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The supplied backing file has to exist
|
|
|
|
*/
|
|
|
|
fd = open(opts, O_RDWR);
|
|
|
|
if (fd < 0) {
|
|
|
|
perror("Could not open backing file");
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (fstat(fd, &sbuf) < 0) {
|
|
|
|
perror("Could not stat backing file");
|
|
|
|
close(fd);
|
|
|
|
return (1);
|
|
|
|
}
|
2012-12-08 02:37:18 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Deal with raw devices
|
|
|
|
*/
|
|
|
|
size = sbuf.st_size;
|
|
|
|
sectsz = DEV_BSIZE;
|
|
|
|
if (S_ISCHR(sbuf.st_mode)) {
|
|
|
|
if (ioctl(fd, DIOCGMEDIASIZE, &size) < 0 ||
|
|
|
|
ioctl(fd, DIOCGSECTORSIZE, §sz)) {
|
|
|
|
perror("Could not fetch dev blk/sector size");
|
|
|
|
close(fd);
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
assert(size != 0);
|
|
|
|
assert(sectsz != 0);
|
|
|
|
}
|
|
|
|
|
2011-05-13 04:54:01 +00:00
|
|
|
sc = malloc(sizeof(struct pci_vtblk_softc));
|
|
|
|
memset(sc, 0, sizeof(struct pci_vtblk_softc));
|
|
|
|
|
|
|
|
pi->pi_arg = sc;
|
|
|
|
sc->vbsc_pi = pi;
|
|
|
|
sc->vbsc_fd = fd;
|
|
|
|
|
|
|
|
/* setup virtio block config space */
|
2012-12-08 02:37:18 +00:00
|
|
|
sc->vbsc_cfg.vbc_capacity = size / sectsz;
|
2011-05-13 04:54:01 +00:00
|
|
|
sc->vbsc_cfg.vbc_seg_max = VTBLK_MAXSEGS;
|
2012-12-08 02:37:18 +00:00
|
|
|
sc->vbsc_cfg.vbc_blk_size = sectsz;
|
2011-05-13 04:54:01 +00:00
|
|
|
sc->vbsc_cfg.vbc_size_max = 0; /* not negotiated */
|
|
|
|
sc->vbsc_cfg.vbc_geom_c = 0; /* no geometry */
|
|
|
|
sc->vbsc_cfg.vbc_geom_h = 0;
|
|
|
|
sc->vbsc_cfg.vbc_geom_s = 0;
|
|
|
|
sc->vbsc_cfg.vbc_sectors_max = 0;
|
|
|
|
|
|
|
|
/* initialize config space */
|
|
|
|
pci_set_cfgdata16(pi, PCIR_DEVICE, VIRTIO_DEV_BLOCK);
|
|
|
|
pci_set_cfgdata16(pi, PCIR_VENDOR, VIRTIO_VENDOR);
|
|
|
|
pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_STORAGE);
|
|
|
|
pci_set_cfgdata16(pi, PCIR_SUBDEV_0, VIRTIO_TYPE_BLOCK);
|
2013-02-01 16:58:59 +00:00
|
|
|
|
|
|
|
if ((env_msi = getenv("BHYVE_USE_MSI"))) {
|
|
|
|
if (strcasecmp(env_msi, "yes") == 0)
|
|
|
|
use_msix = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (use_msix) {
|
|
|
|
/* MSI-X Support */
|
|
|
|
sc->msix_table_idx_req = VIRTIO_MSI_NO_VECTOR;
|
|
|
|
sc->msix_table_idx_cfg = VIRTIO_MSI_NO_VECTOR;
|
|
|
|
|
|
|
|
if (pci_emul_add_msixcap(pi, 2, 1))
|
|
|
|
return (1);
|
|
|
|
} else {
|
|
|
|
/* MSI Support */
|
|
|
|
pci_emul_add_msicap(pi, 1);
|
|
|
|
}
|
|
|
|
|
2012-10-19 18:11:17 +00:00
|
|
|
pci_emul_alloc_bar(pi, 0, PCIBAR_IO, VTBLK_REGSZ);
|
2011-05-13 04:54:01 +00:00
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
2013-02-01 16:58:59 +00:00
|
|
|
static uint64_t
|
|
|
|
vtblk_adjust_offset(struct pci_devinst *pi, uint64_t offset)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Device specific offsets used by guest would change
|
|
|
|
* based on whether MSI-X capability is enabled or not
|
|
|
|
*/
|
|
|
|
if (!pci_msix_enabled(pi)) {
|
|
|
|
if (offset >= VTCFG_R_MSIX)
|
|
|
|
return (offset + (VTCFG_R_CFG1 - VTCFG_R_MSIX));
|
|
|
|
}
|
|
|
|
|
|
|
|
return (offset);
|
|
|
|
}
|
|
|
|
|
2011-05-13 04:54:01 +00:00
|
|
|
static void
|
2012-10-19 18:11:17 +00:00
|
|
|
pci_vtblk_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
|
|
|
|
int baridx, uint64_t offset, int size, uint64_t value)
|
2011-05-13 04:54:01 +00:00
|
|
|
{
|
|
|
|
struct pci_vtblk_softc *sc = pi->pi_arg;
|
2012-10-19 18:11:17 +00:00
|
|
|
|
2013-02-01 16:58:59 +00:00
|
|
|
if (use_msix) {
|
|
|
|
if (baridx == pci_msix_table_bar(pi) ||
|
|
|
|
baridx == pci_msix_pba_bar(pi)) {
|
|
|
|
pci_emul_msix_twrite(pi, offset, size, value);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-10-19 18:11:17 +00:00
|
|
|
assert(baridx == 0);
|
|
|
|
|
2013-02-01 16:58:59 +00:00
|
|
|
if (offset + size > pci_vtblk_iosize(pi)) {
|
2012-10-19 18:11:17 +00:00
|
|
|
DPRINTF(("vtblk_write: 2big, offset %ld size %d\n",
|
2011-05-13 04:54:01 +00:00
|
|
|
offset, size));
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2013-02-01 16:58:59 +00:00
|
|
|
offset = vtblk_adjust_offset(pi, offset);
|
|
|
|
|
2011-05-13 04:54:01 +00:00
|
|
|
switch (offset) {
|
|
|
|
case VTCFG_R_GUESTCAP:
|
|
|
|
assert(size == 4);
|
|
|
|
sc->vbsc_features = value & VTBLK_S_HOSTCAPS;
|
|
|
|
break;
|
|
|
|
case VTCFG_R_PFN:
|
|
|
|
assert(size == 4);
|
|
|
|
pci_vtblk_ring_init(sc, value);
|
|
|
|
break;
|
|
|
|
case VTCFG_R_QSEL:
|
|
|
|
assert(size == 2);
|
|
|
|
sc->vbsc_lastq = value;
|
|
|
|
break;
|
|
|
|
case VTCFG_R_QNOTIFY:
|
|
|
|
assert(size == 2);
|
|
|
|
assert(value == 0);
|
|
|
|
pci_vtblk_qnotify(sc);
|
|
|
|
break;
|
|
|
|
case VTCFG_R_STATUS:
|
|
|
|
assert(size == 1);
|
|
|
|
pci_vtblk_update_status(sc, value);
|
|
|
|
break;
|
2013-02-01 16:58:59 +00:00
|
|
|
case VTCFG_R_CFGVEC:
|
|
|
|
assert(size == 2);
|
|
|
|
sc->msix_table_idx_cfg = value;
|
|
|
|
break;
|
|
|
|
case VTCFG_R_QVEC:
|
|
|
|
assert(size == 2);
|
|
|
|
sc->msix_table_idx_req = value;
|
|
|
|
break;
|
2011-05-13 04:54:01 +00:00
|
|
|
case VTCFG_R_HOSTCAP:
|
|
|
|
case VTCFG_R_QNUM:
|
|
|
|
case VTCFG_R_ISR:
|
|
|
|
case VTBLK_R_CFG ... VTBLK_R_CFG_END:
|
2012-10-19 18:11:17 +00:00
|
|
|
DPRINTF(("vtblk: write to readonly reg %ld\n\r", offset));
|
2011-05-13 04:54:01 +00:00
|
|
|
break;
|
|
|
|
default:
|
2012-10-19 18:11:17 +00:00
|
|
|
DPRINTF(("vtblk: unknown i/o write offset %ld\n\r", offset));
|
2011-05-13 04:54:01 +00:00
|
|
|
value = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-10-19 18:11:17 +00:00
|
|
|
uint64_t
|
|
|
|
pci_vtblk_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
|
|
|
|
int baridx, uint64_t offset, int size)
|
2011-05-13 04:54:01 +00:00
|
|
|
{
|
|
|
|
struct pci_vtblk_softc *sc = pi->pi_arg;
|
2011-06-07 18:35:45 +00:00
|
|
|
void *ptr;
|
2011-05-13 04:54:01 +00:00
|
|
|
uint32_t value;
|
|
|
|
|
2013-02-01 16:58:59 +00:00
|
|
|
if (use_msix) {
|
|
|
|
if (baridx == pci_msix_table_bar(pi) ||
|
|
|
|
baridx == pci_msix_pba_bar(pi)) {
|
|
|
|
return (pci_emul_msix_tread(pi, offset, size));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-10-19 18:11:17 +00:00
|
|
|
assert(baridx == 0);
|
|
|
|
|
2013-02-01 16:58:59 +00:00
|
|
|
if (offset + size > pci_vtblk_iosize(pi)) {
|
2012-10-19 18:11:17 +00:00
|
|
|
DPRINTF(("vtblk_read: 2big, offset %ld size %d\n",
|
2011-05-13 04:54:01 +00:00
|
|
|
offset, size));
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
2013-02-01 16:58:59 +00:00
|
|
|
offset = vtblk_adjust_offset(pi, offset);
|
|
|
|
|
2011-05-13 04:54:01 +00:00
|
|
|
switch (offset) {
|
|
|
|
case VTCFG_R_HOSTCAP:
|
|
|
|
assert(size == 4);
|
|
|
|
value = VTBLK_S_HOSTCAPS;
|
|
|
|
break;
|
|
|
|
case VTCFG_R_GUESTCAP:
|
|
|
|
assert(size == 4);
|
|
|
|
value = sc->vbsc_features; /* XXX never read ? */
|
|
|
|
break;
|
|
|
|
case VTCFG_R_PFN:
|
|
|
|
assert(size == 4);
|
|
|
|
value = sc->vbsc_pfn >> VRING_PFN;
|
|
|
|
break;
|
|
|
|
case VTCFG_R_QNUM:
|
|
|
|
value = (sc->vbsc_lastq == 0) ? VTBLK_RINGSZ: 0;
|
|
|
|
break;
|
|
|
|
case VTCFG_R_QSEL:
|
|
|
|
assert(size == 2);
|
|
|
|
value = sc->vbsc_lastq; /* XXX never read ? */
|
|
|
|
break;
|
|
|
|
case VTCFG_R_QNOTIFY:
|
|
|
|
assert(size == 2);
|
|
|
|
value = 0; /* XXX never read ? */
|
|
|
|
break;
|
|
|
|
case VTCFG_R_STATUS:
|
|
|
|
assert(size == 1);
|
|
|
|
value = sc->vbsc_status;
|
|
|
|
break;
|
|
|
|
case VTCFG_R_ISR:
|
|
|
|
assert(size == 1);
|
|
|
|
value = sc->vbsc_isr;
|
|
|
|
sc->vbsc_isr = 0; /* a read clears this flag */
|
|
|
|
break;
|
2013-02-01 16:58:59 +00:00
|
|
|
case VTCFG_R_CFGVEC:
|
|
|
|
assert(size == 2);
|
|
|
|
value = sc->msix_table_idx_cfg;
|
|
|
|
break;
|
|
|
|
case VTCFG_R_QVEC:
|
|
|
|
assert(size == 2);
|
|
|
|
value = sc->msix_table_idx_req;
|
|
|
|
break;
|
2011-05-13 04:54:01 +00:00
|
|
|
case VTBLK_R_CFG ... VTBLK_R_CFG_END:
|
2011-06-07 18:35:45 +00:00
|
|
|
assert(size + offset <= (VTBLK_R_CFG_END + 1));
|
|
|
|
ptr = (uint8_t *)&sc->vbsc_cfg + offset - VTBLK_R_CFG;
|
|
|
|
if (size == 1) {
|
|
|
|
value = *(uint8_t *) ptr;
|
|
|
|
} else if (size == 2) {
|
|
|
|
value = *(uint16_t *) ptr;
|
|
|
|
} else {
|
|
|
|
value = *(uint32_t *) ptr;
|
|
|
|
}
|
2011-05-13 04:54:01 +00:00
|
|
|
break;
|
|
|
|
default:
|
2012-10-19 18:11:17 +00:00
|
|
|
DPRINTF(("vtblk: unknown i/o read offset %ld\n\r", offset));
|
2011-05-13 04:54:01 +00:00
|
|
|
value = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return (value);
|
|
|
|
}
|
|
|
|
|
|
|
|
struct pci_devemu pci_de_vblk = {
|
2012-10-19 18:11:17 +00:00
|
|
|
.pe_emu = "virtio-blk",
|
|
|
|
.pe_init = pci_vtblk_init,
|
|
|
|
.pe_barwrite = pci_vtblk_write,
|
|
|
|
.pe_barread = pci_vtblk_read
|
2011-05-13 04:54:01 +00:00
|
|
|
};
|
|
|
|
PCI_EMUL_SET(pci_de_vblk);
|