2012-07-23 03:52:18 +00:00
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/*-
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* Copyright (c) 2012 Adrian Chadd <adrian@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Driver for the Atheros Wireless LAN controller.
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*
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* This software is derived from work of Atsushi Onoe; his contribution
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* is greatly appreciated.
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*/
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#include "opt_inet.h"
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#include "opt_ath.h"
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/*
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* This is needed for register operations which are performed
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* by the driver - eg, calls to ath_hal_gettsf32().
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*
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* It's also required for any AH_DEBUG checks in here, eg the
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* module dependencies.
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*/
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#include "opt_ah.h"
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#include "opt_wlan.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/sysctl.h>
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#include <sys/mbuf.h>
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#include <sys/malloc.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/sockio.h>
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#include <sys/errno.h>
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#include <sys/callout.h>
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <sys/kthread.h>
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#include <sys/taskqueue.h>
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#include <sys/priv.h>
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#include <sys/module.h>
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#include <sys/ktr.h>
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#include <sys/smp.h> /* for mp_ncpus */
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#include <machine/bus.h>
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#include <net/if.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/if_types.h>
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#include <net/if_arp.h>
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#include <net/ethernet.h>
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#include <net/if_llc.h>
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#include <net80211/ieee80211_var.h>
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#include <net80211/ieee80211_regdomain.h>
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#ifdef IEEE80211_SUPPORT_SUPERG
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#include <net80211/ieee80211_superg.h>
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#endif
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#ifdef IEEE80211_SUPPORT_TDMA
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#include <net80211/ieee80211_tdma.h>
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#endif
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#include <net/bpf.h>
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#ifdef INET
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#include <netinet/in.h>
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#include <netinet/if_ether.h>
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#endif
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#include <dev/ath/if_athvar.h>
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#include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */
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#include <dev/ath/ath_hal/ah_diagcodes.h>
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#include <dev/ath/if_ath_debug.h>
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#include <dev/ath/if_ath_misc.h>
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#include <dev/ath/if_ath_tsf.h>
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#include <dev/ath/if_ath_tx.h>
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#include <dev/ath/if_ath_sysctl.h>
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#include <dev/ath/if_ath_led.h>
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#include <dev/ath/if_ath_keycache.h>
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#include <dev/ath/if_ath_rx.h>
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#include <dev/ath/if_ath_beacon.h>
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#include <dev/ath/if_athdfs.h>
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#ifdef ATH_TX99_DIAG
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#include <dev/ath/ath_tx99/ath_tx99.h>
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#endif
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#include <dev/ath/if_ath_tx_edma.h>
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/*
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* some general macros
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2012-07-27 10:41:54 +00:00
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*/
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2012-07-23 03:52:18 +00:00
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#define INCR(_l, _sz) (_l) ++; (_l) &= ((_sz) - 1)
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#define DECR(_l, _sz) (_l) --; (_l) &= ((_sz) - 1)
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2012-07-27 10:41:54 +00:00
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/*
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* XXX doesn't belong here, and should be tunable
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*/
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#define ATH_TXSTATUS_RING_SIZE 512
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2012-07-23 03:52:18 +00:00
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MALLOC_DECLARE(M_ATHDEV);
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2012-07-31 02:28:32 +00:00
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/*
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* Re-initialise the DMA FIFO with the current contents of
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* said FIFO.
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*
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* This should only be called as part of the chip reset path, as it
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* assumes the FIFO is currently empty.
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*
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* TODO: verify that a cold/warm reset does clear the TX FIFO, so
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* writing in a partially-filled FIFO will not cause double-entries
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* to appear.
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*/
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static void
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ath_edma_dma_restart(struct ath_softc *sc, struct ath_txq *txq)
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{
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device_printf(sc->sc_dev, "%s: called: txq=%p, qnum=%d\n",
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__func__,
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txq,
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txq->axq_qnum);
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}
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/*
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* Handoff this frame to the hardware.
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*
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* For the multicast queue, this will treat it as a software queue
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* and append it to the list, after updating the MORE_DATA flag
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* in the previous frame. The cabq processing code will ensure
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* that the queue contents gets transferred over.
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*
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* For the hardware queues, this will queue a frame to the queue
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* like before, then populate the FIFO from that. Since the
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* EDMA hardware has 8 FIFO slots per TXQ, this ensures that
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* frames such as management frames don't get prematurely dropped.
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*
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* This does imply that a similar flush-hwq-to-fifoq method will
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* need to be called from the processq function, before the
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* per-node software scheduler is called.
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*/
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static void
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ath_edma_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq,
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struct ath_buf *bf)
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{
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device_printf(sc->sc_dev, "%s: called; bf=%p, txq=%p, qnum=%d\n",
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__func__,
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bf,
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txq,
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txq->axq_qnum);
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/*
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* XXX For now this is a placeholder; free the buffer
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* and inform the stack that the TX failed.
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*/
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ath_tx_default_comp(sc, bf, 1);
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}
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2012-07-28 04:42:05 +00:00
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static int
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ath_edma_setup_txfifo(struct ath_softc *sc, int qnum)
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{
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struct ath_tx_edma_fifo *te = &sc->sc_txedma[qnum];
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te->m_fifo = malloc(sizeof(struct ath_buf *) * HAL_TXFIFO_DEPTH,
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M_ATHDEV,
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M_NOWAIT | M_ZERO);
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if (te->m_fifo == NULL) {
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device_printf(sc->sc_dev, "%s: malloc failed\n",
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__func__);
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return (-ENOMEM);
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}
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/*
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* Set initial "empty" state.
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*/
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te->m_fifo_head = te->m_fifo_tail = te->m_fifo_depth = 0;
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return (0);
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}
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static int
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ath_edma_free_txfifo(struct ath_softc *sc, int qnum)
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{
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struct ath_tx_edma_fifo *te = &sc->sc_txedma[qnum];
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/* XXX TODO: actually deref the ath_buf entries? */
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free(te->m_fifo, M_ATHDEV);
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return (0);
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}
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2012-07-23 03:52:18 +00:00
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static int
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ath_edma_dma_txsetup(struct ath_softc *sc)
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{
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2012-07-27 10:41:54 +00:00
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int error;
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2012-07-28 04:42:05 +00:00
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int i;
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2012-07-27 10:41:54 +00:00
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error = ath_descdma_alloc_desc(sc, &sc->sc_txsdma,
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NULL, "txcomp", sc->sc_tx_statuslen, ATH_TXSTATUS_RING_SIZE);
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if (error != 0)
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return (error);
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ath_hal_setuptxstatusring(sc->sc_ah,
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(void *) sc->sc_txsdma.dd_desc,
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sc->sc_txsdma.dd_desc_paddr,
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ATH_TXSTATUS_RING_SIZE);
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2012-07-28 04:42:05 +00:00
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for (i = 0; i < HAL_NUM_TX_QUEUES; i++) {
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ath_edma_setup_txfifo(sc, i);
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}
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2012-07-23 03:52:18 +00:00
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return (0);
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}
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static int
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ath_edma_dma_txteardown(struct ath_softc *sc)
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{
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2012-07-28 04:42:05 +00:00
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int i;
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for (i = 0; i < HAL_NUM_TX_QUEUES; i++) {
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ath_edma_free_txfifo(sc, i);
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}
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2012-07-23 03:52:18 +00:00
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2012-07-27 10:41:54 +00:00
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ath_descdma_cleanup(sc, &sc->sc_txsdma, NULL);
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2012-07-23 03:52:18 +00:00
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return (0);
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}
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2012-07-31 03:09:48 +00:00
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static int
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ath_edma_tx_processq(struct ath_softc *sc, struct ath_txq *txq, int dosched)
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{
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return (0);
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}
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static void
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ath_edma_tx_draintxq(struct ath_softc *sc, struct ath_txq *txq)
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{
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}
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static void
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ath_edma_tx_proc(void *arg, int npending)
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{
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struct ath_softc *sc = (struct ath_softc *) arg;
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device_printf(sc->sc_dev, "%s: called, npending=%d\n",
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__func__, npending);
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}
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static void
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ath_edma_attach_comp_func(struct ath_softc *sc)
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{
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TASK_INIT(&sc->sc_txtask, 0, ath_edma_tx_proc, sc);
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}
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2012-07-23 03:52:18 +00:00
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void
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ath_xmit_setup_edma(struct ath_softc *sc)
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{
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/* Fetch EDMA field and buffer sizes */
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(void) ath_hal_gettxdesclen(sc->sc_ah, &sc->sc_tx_desclen);
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(void) ath_hal_gettxstatuslen(sc->sc_ah, &sc->sc_tx_statuslen);
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(void) ath_hal_getntxmaps(sc->sc_ah, &sc->sc_tx_nmaps);
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device_printf(sc->sc_dev, "TX descriptor length: %d\n",
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sc->sc_tx_desclen);
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device_printf(sc->sc_dev, "TX status length: %d\n",
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sc->sc_tx_statuslen);
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device_printf(sc->sc_dev, "TX buffers per descriptor: %d\n",
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sc->sc_tx_nmaps);
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sc->sc_tx.xmit_setup = ath_edma_dma_txsetup;
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sc->sc_tx.xmit_teardown = ath_edma_dma_txteardown;
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2012-07-31 03:09:48 +00:00
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sc->sc_tx.xmit_attach_comp_func = ath_edma_attach_comp_func;
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2012-07-31 02:28:32 +00:00
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sc->sc_tx.xmit_dma_restart = ath_edma_dma_restart;
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sc->sc_tx.xmit_handoff = ath_edma_xmit_handoff;
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2012-07-31 03:09:48 +00:00
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sc->sc_tx.xmit_processq = ath_edma_tx_processq;
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sc->sc_tx.xmit_drainq = ath_edma_tx_draintxq;
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2012-07-23 03:52:18 +00:00
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}
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