1996-09-18 05:35:50 +00:00
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/* Save and restore call-clobbered registers which are live across a call.
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1999-10-16 06:09:09 +00:00
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Copyright (C) 1989, 1992, 94-95, 97, 98, 1999 Free Software Foundation, Inc.
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1996-09-18 05:35:50 +00:00
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This file is part of GNU CC.
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GNU CC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GNU CC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GNU CC; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "config.h"
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1999-08-26 09:30:50 +00:00
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#include "system.h"
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1996-09-18 05:35:50 +00:00
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#include "rtl.h"
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#include "insn-config.h"
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#include "flags.h"
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#include "regs.h"
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#include "hard-reg-set.h"
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#include "recog.h"
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#include "basic-block.h"
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#include "reload.h"
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#include "expr.h"
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1999-08-26 09:30:50 +00:00
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#include "toplev.h"
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1996-09-18 05:35:50 +00:00
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#ifndef MAX_MOVE_MAX
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#define MAX_MOVE_MAX MOVE_MAX
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#endif
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#ifndef MIN_UNITS_PER_WORD
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#define MIN_UNITS_PER_WORD UNITS_PER_WORD
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#endif
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1999-10-16 06:09:09 +00:00
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#define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
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1996-09-18 05:35:50 +00:00
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/* Modes for each hard register that we can save. The smallest mode is wide
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enough to save the entire contents of the register. When saving the
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register because it is live we first try to save in multi-register modes.
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If that is not possible the save is done one register at a time. */
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static enum machine_mode
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regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
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/* For each hard register, a place on the stack where it can be saved,
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if needed. */
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static rtx
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regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
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/* We will only make a register eligible for caller-save if it can be
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saved in its widest mode with a simple SET insn as long as the memory
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address is valid. We record the INSN_CODE is those insns here since
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when we emit them, the addresses might not be valid, so they might not
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be recognized. */
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static enum insn_code
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reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
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static enum insn_code
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reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
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/* Set of hard regs currently residing in save area (during insn scan). */
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static HARD_REG_SET hard_regs_saved;
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1999-10-16 06:09:09 +00:00
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/* Number of registers currently in hard_regs_saved. */
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1996-09-18 05:35:50 +00:00
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1999-10-16 06:09:09 +00:00
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static int n_regs_saved;
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1996-09-18 05:35:50 +00:00
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1999-10-16 06:09:09 +00:00
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/* Computed by mark_referenced_regs, all regs referenced in a given
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insn. */
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static HARD_REG_SET referenced_regs;
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1996-09-18 05:35:50 +00:00
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1999-10-16 06:09:09 +00:00
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/* Computed in mark_set_regs, holds all registers set by the current
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instruction. */
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static HARD_REG_SET this_insn_sets;
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1996-09-18 05:35:50 +00:00
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1999-10-16 06:09:09 +00:00
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static void mark_set_regs PROTO((rtx, rtx));
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static void mark_referenced_regs PROTO((rtx));
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static int insert_save PROTO((struct insn_chain *, int, int,
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HARD_REG_SET *));
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static int insert_restore PROTO((struct insn_chain *, int, int,
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int));
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static void insert_one_insn PROTO((struct insn_chain *, int,
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enum insn_code, rtx));
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1996-09-18 05:35:50 +00:00
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/* Initialize for caller-save.
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Look at all the hard registers that are used by a call and for which
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regclass.c has not already excluded from being used across a call.
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Ensure that we can find a mode to save the register and that there is a
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simple insn to save and restore the register. This latter check avoids
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problems that would occur if we tried to save the MQ register of some
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machines directly into memory. */
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void
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init_caller_save ()
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{
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char *first_obj = (char *) oballoc (0);
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rtx addr_reg;
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int offset;
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rtx address;
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int i, j;
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/* First find all the registers that we need to deal with and all
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the modes that they can have. If we can't find a mode to use,
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we can't have the register live over calls. */
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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{
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if (call_used_regs[i] && ! call_fixed_regs[i])
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{
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1999-10-16 06:09:09 +00:00
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for (j = 1; j <= MOVE_MAX_WORDS; j++)
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1996-09-18 05:35:50 +00:00
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{
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1999-10-16 06:09:09 +00:00
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regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j);
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1996-09-18 05:35:50 +00:00
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if (regno_save_mode[i][j] == VOIDmode && j == 1)
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{
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call_fixed_regs[i] = 1;
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SET_HARD_REG_BIT (call_fixed_reg_set, i);
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}
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}
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}
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else
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regno_save_mode[i][1] = VOIDmode;
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}
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/* The following code tries to approximate the conditions under which
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we can easily save and restore a register without scratch registers or
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other complexities. It will usually work, except under conditions where
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the validity of an insn operand is dependent on the address offset.
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No such cases are currently known.
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We first find a typical offset from some BASE_REG_CLASS register.
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This address is chosen by finding the first register in the class
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and by finding the smallest power of two that is a valid offset from
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that register in every mode we will use to save registers. */
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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if (TEST_HARD_REG_BIT (reg_class_contents[(int) BASE_REG_CLASS], i))
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break;
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if (i == FIRST_PSEUDO_REGISTER)
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abort ();
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1999-08-26 09:30:50 +00:00
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addr_reg = gen_rtx_REG (Pmode, i);
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1996-09-18 05:35:50 +00:00
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for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
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{
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1999-08-26 09:30:50 +00:00
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address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
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1996-09-18 05:35:50 +00:00
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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if (regno_save_mode[i][1] != VOIDmode
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&& ! strict_memory_address_p (regno_save_mode[i][1], address))
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break;
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if (i == FIRST_PSEUDO_REGISTER)
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break;
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}
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/* If we didn't find a valid address, we must use register indirect. */
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if (offset == 0)
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address = addr_reg;
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/* Next we try to form an insn to save and restore the register. We
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see if such an insn is recognized and meets its constraints. */
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start_sequence ();
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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1999-10-16 06:09:09 +00:00
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for (j = 1; j <= MOVE_MAX_WORDS; j++)
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1996-09-18 05:35:50 +00:00
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if (regno_save_mode[i][j] != VOIDmode)
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{
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1999-08-26 09:30:50 +00:00
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rtx mem = gen_rtx_MEM (regno_save_mode[i][j], address);
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rtx reg = gen_rtx_REG (regno_save_mode[i][j], i);
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rtx savepat = gen_rtx_SET (VOIDmode, mem, reg);
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rtx restpat = gen_rtx_SET (VOIDmode, reg, mem);
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1996-09-18 05:35:50 +00:00
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rtx saveinsn = emit_insn (savepat);
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rtx restinsn = emit_insn (restpat);
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int ok;
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reg_save_code[i][j] = recog_memoized (saveinsn);
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reg_restore_code[i][j] = recog_memoized (restinsn);
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1999-08-26 09:30:50 +00:00
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/* Now extract both insns and see if we can meet their
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constraints. */
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1999-10-16 06:09:09 +00:00
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ok = (reg_save_code[i][j] != (enum insn_code)-1
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&& reg_restore_code[i][j] != (enum insn_code)-1);
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1996-09-18 05:35:50 +00:00
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if (ok)
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{
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1999-10-16 06:09:09 +00:00
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extract_insn (saveinsn);
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ok = constrain_operands (1);
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extract_insn (restinsn);
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ok &= constrain_operands (1);
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1996-09-18 05:35:50 +00:00
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}
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if (! ok)
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{
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regno_save_mode[i][j] = VOIDmode;
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if (j == 1)
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{
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call_fixed_regs[i] = 1;
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SET_HARD_REG_BIT (call_fixed_reg_set, i);
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}
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}
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}
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end_sequence ();
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obfree (first_obj);
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}
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/* Initialize save areas by showing that we haven't allocated any yet. */
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void
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init_save_areas ()
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{
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int i, j;
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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1999-10-16 06:09:09 +00:00
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for (j = 1; j <= MOVE_MAX_WORDS; j++)
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1996-09-18 05:35:50 +00:00
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regno_save_mem[i][j] = 0;
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}
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/* Allocate save areas for any hard registers that might need saving.
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We take a conservative approach here and look for call-clobbered hard
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registers that are assigned to pseudos that cross calls. This may
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overestimate slightly (especially if some of these registers are later
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used as spill registers), but it should not be significant.
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Future work:
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In the fallback case we should iterate backwards across all possible
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modes for the save, choosing the largest available one instead of
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falling back to the smallest mode immediately. (eg TF -> DF -> SF).
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We do not try to use "move multiple" instructions that exist
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on some machines (such as the 68k moveml). It could be a win to try
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and use them when possible. The hard part is doing it in a way that is
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machine independent since they might be saving non-consecutive
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registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
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1999-10-16 06:09:09 +00:00
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void
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setup_save_areas ()
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1996-09-18 05:35:50 +00:00
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{
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int i, j, k;
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HARD_REG_SET hard_regs_used;
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/* Allocate space in the save area for the largest multi-register
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pseudos first, then work backwards to single register
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pseudos. */
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/* Find and record all call-used hard-registers in this function. */
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CLEAR_HARD_REG_SET (hard_regs_used);
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for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
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1999-08-26 09:30:50 +00:00
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if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
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1996-09-18 05:35:50 +00:00
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{
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int regno = reg_renumber[i];
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int endregno
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= regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i]));
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int nregs = endregno - regno;
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for (j = 0; j < nregs; j++)
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{
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if (call_used_regs[regno+j])
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SET_HARD_REG_BIT (hard_regs_used, regno+j);
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}
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}
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/* Now run through all the call-used hard-registers and allocate
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space for them in the caller-save area. Try to allocate space
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in a manner which allows multi-register saves/restores to be done. */
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
1999-10-16 06:09:09 +00:00
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for (j = MOVE_MAX_WORDS; j > 0; j--)
|
1996-09-18 05:35:50 +00:00
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{
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1999-10-16 06:09:09 +00:00
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int do_save = 1;
|
1996-09-18 05:35:50 +00:00
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/* If no mode exists for this size, try another. Also break out
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if we have already saved this hard register. */
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|
|
if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
/* See if any register in this group has been saved. */
|
|
|
|
|
for (k = 0; k < j; k++)
|
|
|
|
|
if (regno_save_mem[i + k][1])
|
|
|
|
|
{
|
|
|
|
|
do_save = 0;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
if (! do_save)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
for (k = 0; k < j; k++)
|
1999-10-16 06:09:09 +00:00
|
|
|
|
if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
|
1996-09-18 05:35:50 +00:00
|
|
|
|
{
|
1999-10-16 06:09:09 +00:00
|
|
|
|
do_save = 0;
|
|
|
|
|
break;
|
1996-09-18 05:35:50 +00:00
|
|
|
|
}
|
1999-10-16 06:09:09 +00:00
|
|
|
|
if (! do_save)
|
|
|
|
|
continue;
|
1996-09-18 05:35:50 +00:00
|
|
|
|
|
1999-08-26 09:30:50 +00:00
|
|
|
|
/* We have found an acceptable mode to store in. */
|
1999-10-16 06:09:09 +00:00
|
|
|
|
regno_save_mem[i][j]
|
|
|
|
|
= assign_stack_local (regno_save_mode[i][j],
|
|
|
|
|
GET_MODE_SIZE (regno_save_mode[i][j]), 0);
|
|
|
|
|
|
|
|
|
|
/* Setup single word save area just in case... */
|
|
|
|
|
for (k = 0; k < j; k++)
|
1996-09-18 05:35:50 +00:00
|
|
|
|
{
|
1999-10-16 06:09:09 +00:00
|
|
|
|
/* This should not depend on WORDS_BIG_ENDIAN.
|
|
|
|
|
The order of words in regs is the same as in memory. */
|
|
|
|
|
rtx temp = gen_rtx_MEM (regno_save_mode[i+k][1],
|
|
|
|
|
XEXP (regno_save_mem[i][j], 0));
|
1996-09-18 05:35:50 +00:00
|
|
|
|
|
1999-10-16 06:09:09 +00:00
|
|
|
|
regno_save_mem[i+k][1]
|
|
|
|
|
= adj_offsettable_operand (temp, k * UNITS_PER_WORD);
|
1996-09-18 05:35:50 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
1999-10-16 06:09:09 +00:00
|
|
|
|
/* Find the places where hard regs are live across calls and save them. */
|
1996-09-18 05:35:50 +00:00
|
|
|
|
void
|
1999-10-16 06:09:09 +00:00
|
|
|
|
save_call_clobbered_regs ()
|
1996-09-18 05:35:50 +00:00
|
|
|
|
{
|
1999-10-16 06:09:09 +00:00
|
|
|
|
struct insn_chain *chain, *next;
|
|
|
|
|
|
|
|
|
|
CLEAR_HARD_REG_SET (hard_regs_saved);
|
|
|
|
|
n_regs_saved = 0;
|
1996-09-18 05:35:50 +00:00
|
|
|
|
|
1999-10-16 06:09:09 +00:00
|
|
|
|
for (chain = reload_insn_chain; chain != 0; chain = next)
|
1996-09-18 05:35:50 +00:00
|
|
|
|
{
|
1999-10-16 06:09:09 +00:00
|
|
|
|
rtx insn = chain->insn;
|
|
|
|
|
enum rtx_code code = GET_CODE (insn);
|
|
|
|
|
|
|
|
|
|
next = chain->next;
|
|
|
|
|
|
|
|
|
|
if (chain->is_caller_save_insn)
|
|
|
|
|
abort ();
|
|
|
|
|
|
|
|
|
|
if (GET_RTX_CLASS (code) == 'i')
|
1996-09-18 05:35:50 +00:00
|
|
|
|
{
|
1999-10-16 06:09:09 +00:00
|
|
|
|
/* If some registers have been saved, see if INSN references
|
|
|
|
|
any of them. We must restore them before the insn if so. */
|
1996-09-18 05:35:50 +00:00
|
|
|
|
|
1999-10-16 06:09:09 +00:00
|
|
|
|
if (n_regs_saved)
|
1996-09-18 05:35:50 +00:00
|
|
|
|
{
|
1999-10-16 06:09:09 +00:00
|
|
|
|
int regno;
|
|
|
|
|
|
|
|
|
|
if (code == JUMP_INSN)
|
|
|
|
|
/* Restore all registers if this is a JUMP_INSN. */
|
|
|
|
|
COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
|
1996-09-18 05:35:50 +00:00
|
|
|
|
else
|
|
|
|
|
{
|
1999-10-16 06:09:09 +00:00
|
|
|
|
CLEAR_HARD_REG_SET (referenced_regs);
|
|
|
|
|
mark_referenced_regs (PATTERN (insn));
|
|
|
|
|
AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
|
1996-09-18 05:35:50 +00:00
|
|
|
|
}
|
|
|
|
|
|
1999-10-16 06:09:09 +00:00
|
|
|
|
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
|
|
|
|
|
if (TEST_HARD_REG_BIT (referenced_regs, regno))
|
|
|
|
|
regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS);
|
1996-09-18 05:35:50 +00:00
|
|
|
|
}
|
|
|
|
|
|
1999-10-16 06:09:09 +00:00
|
|
|
|
if (code == CALL_INSN)
|
|
|
|
|
{
|
|
|
|
|
rtx x;
|
|
|
|
|
int regno, nregs;
|
|
|
|
|
HARD_REG_SET hard_regs_to_save;
|
|
|
|
|
|
|
|
|
|
/* Use the register life information in CHAIN to compute which
|
|
|
|
|
regs are live before the call. */
|
|
|
|
|
REG_SET_TO_HARD_REG_SET (hard_regs_to_save, chain->live_before);
|
|
|
|
|
compute_use_by_pseudos (&hard_regs_to_save, chain->live_before);
|
|
|
|
|
|
|
|
|
|
/* Record all registers set in this call insn. These don't need
|
|
|
|
|
to be saved. */
|
|
|
|
|
CLEAR_HARD_REG_SET (this_insn_sets);
|
|
|
|
|
note_stores (PATTERN (insn), mark_set_regs);
|
|
|
|
|
|
|
|
|
|
/* Compute which hard regs must be saved before this call. */
|
|
|
|
|
AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
|
|
|
|
|
AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
|
|
|
|
|
AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
|
|
|
|
|
AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
|
|
|
|
|
|
|
|
|
|
/* Registers used for function parameters need not be saved. */
|
|
|
|
|
for (x = CALL_INSN_FUNCTION_USAGE (insn); x != 0;
|
|
|
|
|
x = XEXP (x, 1))
|
|
|
|
|
{
|
|
|
|
|
rtx y;
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (XEXP (x, 0)) != USE)
|
|
|
|
|
continue;
|
|
|
|
|
y = XEXP (XEXP (x, 0), 0);
|
|
|
|
|
if (GET_CODE (y) != REG)
|
|
|
|
|
abort ();
|
|
|
|
|
regno = REGNO (y);
|
|
|
|
|
if (REGNO (y) >= FIRST_PSEUDO_REGISTER)
|
|
|
|
|
abort ();
|
|
|
|
|
nregs = HARD_REGNO_NREGS (regno, GET_MODE (y));
|
|
|
|
|
while (nregs-- > 0)
|
|
|
|
|
CLEAR_HARD_REG_BIT (hard_regs_to_save, regno + nregs);
|
|
|
|
|
}
|
1996-09-18 05:35:50 +00:00
|
|
|
|
|
1999-10-16 06:09:09 +00:00
|
|
|
|
/* Neither do registers for which we find a death note. */
|
|
|
|
|
for (x = REG_NOTES (insn); x != 0; x = XEXP (x, 1))
|
|
|
|
|
{
|
|
|
|
|
rtx y = XEXP (x, 0);
|
|
|
|
|
|
|
|
|
|
if (REG_NOTE_KIND (x) != REG_DEAD)
|
|
|
|
|
continue;
|
|
|
|
|
if (GET_CODE (y) != REG)
|
|
|
|
|
abort ();
|
|
|
|
|
regno = REGNO (y);
|
|
|
|
|
|
|
|
|
|
if (regno >= FIRST_PSEUDO_REGISTER)
|
|
|
|
|
regno = reg_renumber[regno];
|
|
|
|
|
if (regno < 0)
|
|
|
|
|
continue;
|
|
|
|
|
nregs = HARD_REGNO_NREGS (regno, GET_MODE (y));
|
|
|
|
|
while (nregs-- > 0)
|
|
|
|
|
CLEAR_HARD_REG_BIT (hard_regs_to_save, regno + nregs);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
|
|
|
|
|
if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
|
|
|
|
|
regno += insert_save (chain, 1, regno, &hard_regs_to_save);
|
|
|
|
|
|
|
|
|
|
/* Must recompute n_regs_saved. */
|
|
|
|
|
n_regs_saved = 0;
|
|
|
|
|
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
|
|
|
|
|
if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
|
|
|
|
|
n_regs_saved++;
|
|
|
|
|
}
|
|
|
|
|
}
|
1996-09-18 05:35:50 +00:00
|
|
|
|
|
1999-10-16 06:09:09 +00:00
|
|
|
|
if (chain->next == 0 || chain->next->block > chain->block)
|
|
|
|
|
{
|
|
|
|
|
int regno;
|
|
|
|
|
/* At the end of the basic block, we must restore any registers that
|
|
|
|
|
remain saved. If the last insn in the block is a JUMP_INSN, put
|
|
|
|
|
the restore before the insn, otherwise, put it after the insn. */
|
|
|
|
|
|
|
|
|
|
if (n_regs_saved)
|
|
|
|
|
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
|
|
|
|
|
if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
|
|
|
|
|
regno += insert_restore (chain, GET_CODE (insn) == JUMP_INSN,
|
|
|
|
|
regno, MOVE_MAX_WORDS);
|
|
|
|
|
}
|
|
|
|
|
}
|
1996-09-18 05:35:50 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Here from note_stores when an insn stores a value in a register.
|
1999-10-16 06:09:09 +00:00
|
|
|
|
Set the proper bit or bits in this_insn_sets. All pseudos that have
|
1996-09-18 05:35:50 +00:00
|
|
|
|
been assigned hard regs have had their register number changed already,
|
|
|
|
|
so we can ignore pseudos. */
|
|
|
|
|
static void
|
1999-10-16 06:09:09 +00:00
|
|
|
|
mark_set_regs (reg, setter)
|
1999-08-26 09:30:50 +00:00
|
|
|
|
rtx reg;
|
|
|
|
|
rtx setter ATTRIBUTE_UNUSED;
|
1996-09-18 05:35:50 +00:00
|
|
|
|
{
|
|
|
|
|
register int regno, endregno, i;
|
|
|
|
|
enum machine_mode mode = GET_MODE (reg);
|
|
|
|
|
int word = 0;
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (reg) == SUBREG)
|
|
|
|
|
{
|
|
|
|
|
word = SUBREG_WORD (reg);
|
|
|
|
|
reg = SUBREG_REG (reg);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
regno = REGNO (reg) + word;
|
|
|
|
|
endregno = regno + HARD_REGNO_NREGS (regno, mode);
|
|
|
|
|
|
|
|
|
|
for (i = regno; i < endregno; i++)
|
1999-10-16 06:09:09 +00:00
|
|
|
|
SET_HARD_REG_BIT (this_insn_sets, i);
|
1996-09-18 05:35:50 +00:00
|
|
|
|
}
|
|
|
|
|
|
1999-10-16 06:09:09 +00:00
|
|
|
|
/* Walk X and record all referenced registers in REFERENCED_REGS. */
|
1996-09-18 05:35:50 +00:00
|
|
|
|
static void
|
1999-10-16 06:09:09 +00:00
|
|
|
|
mark_referenced_regs (x)
|
1996-09-18 05:35:50 +00:00
|
|
|
|
rtx x;
|
|
|
|
|
{
|
|
|
|
|
enum rtx_code code = GET_CODE (x);
|
|
|
|
|
char *fmt;
|
|
|
|
|
int i, j;
|
|
|
|
|
|
1999-10-16 06:09:09 +00:00
|
|
|
|
if (code == SET)
|
|
|
|
|
mark_referenced_regs (SET_SRC (x));
|
|
|
|
|
if (code == SET || code == CLOBBER)
|
|
|
|
|
{
|
|
|
|
|
x = SET_DEST (x);
|
|
|
|
|
code = GET_CODE (x);
|
|
|
|
|
if (code == REG || code == PC || code == CC0
|
|
|
|
|
|| (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
if (code == MEM || code == SUBREG)
|
|
|
|
|
{
|
|
|
|
|
x = XEXP (x, 0);
|
|
|
|
|
code = GET_CODE (x);
|
|
|
|
|
}
|
1996-09-18 05:35:50 +00:00
|
|
|
|
|
|
|
|
|
if (code == REG)
|
|
|
|
|
{
|
|
|
|
|
int regno = REGNO (x);
|
1999-10-16 06:09:09 +00:00
|
|
|
|
int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
|
|
|
|
|
: reg_renumber[regno]);
|
1996-09-18 05:35:50 +00:00
|
|
|
|
|
1999-10-16 06:09:09 +00:00
|
|
|
|
if (hardregno >= 0)
|
1996-09-18 05:35:50 +00:00
|
|
|
|
{
|
1999-10-16 06:09:09 +00:00
|
|
|
|
int nregs = HARD_REGNO_NREGS (hardregno, GET_MODE (x));
|
|
|
|
|
while (nregs-- > 0)
|
|
|
|
|
SET_HARD_REG_BIT (referenced_regs, hardregno + nregs);
|
1996-09-18 05:35:50 +00:00
|
|
|
|
}
|
1999-10-16 06:09:09 +00:00
|
|
|
|
/* If this is a pseudo that did not get a hard register, scan its
|
|
|
|
|
memory location, since it might involve the use of another
|
|
|
|
|
register, which might be saved. */
|
|
|
|
|
else if (reg_equiv_mem[regno] != 0)
|
|
|
|
|
mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
|
|
|
|
|
else if (reg_equiv_address[regno] != 0)
|
|
|
|
|
mark_referenced_regs (reg_equiv_address[regno]);
|
1996-09-18 05:35:50 +00:00
|
|
|
|
return;
|
|
|
|
|
}
|
1999-10-16 06:09:09 +00:00
|
|
|
|
|
1996-09-18 05:35:50 +00:00
|
|
|
|
fmt = GET_RTX_FORMAT (code);
|
|
|
|
|
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
|
|
|
|
|
{
|
|
|
|
|
if (fmt[i] == 'e')
|
1999-10-16 06:09:09 +00:00
|
|
|
|
mark_referenced_regs (XEXP (x, i));
|
1996-09-18 05:35:50 +00:00
|
|
|
|
else if (fmt[i] == 'E')
|
|
|
|
|
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
|
1999-10-16 06:09:09 +00:00
|
|
|
|
mark_referenced_regs (XVECEXP (x, i, j));
|
1996-09-18 05:35:50 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
1999-10-16 06:09:09 +00:00
|
|
|
|
/* Insert a sequence of insns to restore. Place these insns in front of
|
|
|
|
|
CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
|
|
|
|
|
the maximum number of registers which should be restored during this call.
|
|
|
|
|
It should never be less than 1 since we only work with entire registers.
|
1996-09-18 05:35:50 +00:00
|
|
|
|
|
|
|
|
|
Note that we have verified in init_caller_save that we can do this
|
|
|
|
|
with a simple SET, so use it. Set INSN_CODE to what we save there
|
|
|
|
|
since the address might not be valid so the insn might not be recognized.
|
|
|
|
|
These insns will be reloaded and have register elimination done by
|
|
|
|
|
find_reload, so we need not worry about that here.
|
|
|
|
|
|
|
|
|
|
Return the extra number of registers saved. */
|
|
|
|
|
|
|
|
|
|
static int
|
1999-10-16 06:09:09 +00:00
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insert_restore (chain, before_p, regno, maxrestore)
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struct insn_chain *chain;
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int before_p;
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1996-09-18 05:35:50 +00:00
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int regno;
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int maxrestore;
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{
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1999-10-16 06:09:09 +00:00
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int i;
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1999-08-26 09:30:50 +00:00
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rtx pat = NULL_RTX;
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enum insn_code code = CODE_FOR_nothing;
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int numregs = 0;
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1996-09-18 05:35:50 +00:00
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/* A common failure mode if register status is not correct in the RTL
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is for this routine to be called with a REGNO we didn't expect to
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save. That will cause us to write an insn with a (nil) SET_DEST
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or SET_SRC. Instead of doing so and causing a crash later, check
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for this common case and abort here instead. This will remove one
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step in debugging such problems. */
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if (regno_save_mem[regno][1] == 0)
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abort ();
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1999-10-16 06:09:09 +00:00
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/* Get the pattern to emit and update our status.
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1996-09-18 05:35:50 +00:00
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1999-10-16 06:09:09 +00:00
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See if we can restore `maxrestore' registers at once. Work
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backwards to the single register case. */
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for (i = maxrestore; i > 0; i--)
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1996-09-18 05:35:50 +00:00
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{
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1999-10-16 06:09:09 +00:00
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int j, k;
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int ok = 1;
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1996-09-18 05:35:50 +00:00
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1999-10-16 06:09:09 +00:00
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if (regno_save_mem[regno][i] == 0)
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continue;
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1996-09-18 05:35:50 +00:00
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1999-10-16 06:09:09 +00:00
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for (j = 0; j < i; j++)
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if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
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{
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ok = 0;
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break;
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}
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/* Must do this one restore at a time */
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if (! ok)
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continue;
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1996-09-18 05:35:50 +00:00
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1999-10-16 06:09:09 +00:00
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pat = gen_rtx_SET (VOIDmode,
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gen_rtx_REG (GET_MODE (regno_save_mem[regno][i]),
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regno),
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regno_save_mem[regno][i]);
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code = reg_restore_code[regno][i];
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1996-09-18 05:35:50 +00:00
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1999-10-16 06:09:09 +00:00
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/* Clear status for all registers we restored. */
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for (k = 0; k < i; k++)
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{
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CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
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n_regs_saved--;
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}
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numregs = i;
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break;
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1996-09-18 05:35:50 +00:00
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}
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1999-10-16 06:09:09 +00:00
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insert_one_insn (chain, before_p, code, pat);
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/* Tell our callers how many extra registers we saved/restored */
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return numregs - 1;
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}
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/* Like insert_restore above, but save registers instead. */
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static int
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insert_save (chain, before_p, regno, to_save)
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struct insn_chain *chain;
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int before_p;
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int regno;
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HARD_REG_SET *to_save;
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{
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int i;
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rtx pat = NULL_RTX;
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enum insn_code code = CODE_FOR_nothing;
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int numregs = 0;
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/* A common failure mode if register status is not correct in the RTL
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is for this routine to be called with a REGNO we didn't expect to
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save. That will cause us to write an insn with a (nil) SET_DEST
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or SET_SRC. Instead of doing so and causing a crash later, check
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for this common case and abort here instead. This will remove one
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step in debugging such problems. */
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if (regno_save_mem[regno][1] == 0)
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abort ();
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/* Get the pattern to emit and update our status.
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See if we can save several registers with a single instruction.
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Work backwards to the single register case. */
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for (i = MOVE_MAX_WORDS; i > 0; i--)
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1996-09-18 05:35:50 +00:00
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{
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1999-10-16 06:09:09 +00:00
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int j, k;
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int ok = 1;
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if (regno_save_mem[regno][i] == 0)
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continue;
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1996-09-18 05:35:50 +00:00
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1999-10-16 06:09:09 +00:00
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for (j = 0; j < i; j++)
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if (! TEST_HARD_REG_BIT (*to_save, regno + j))
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{
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ok = 0;
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break;
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}
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/* Must do this one save at a time */
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if (! ok)
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continue;
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1996-09-18 05:35:50 +00:00
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1999-10-16 06:09:09 +00:00
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pat = gen_rtx_SET (VOIDmode, regno_save_mem[regno][i],
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gen_rtx_REG (GET_MODE (regno_save_mem[regno][i]),
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regno));
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code = reg_save_code[regno][i];
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1996-09-18 05:35:50 +00:00
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1999-10-16 06:09:09 +00:00
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/* Set hard_regs_saved for all the registers we saved. */
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for (k = 0; k < i; k++)
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{
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SET_HARD_REG_BIT (hard_regs_saved, regno + k);
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n_regs_saved++;
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}
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1996-09-18 05:35:50 +00:00
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1999-10-16 06:09:09 +00:00
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numregs = i;
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break;
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1996-09-18 05:35:50 +00:00
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}
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1999-10-16 06:09:09 +00:00
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insert_one_insn (chain, before_p, code, pat);
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1996-09-18 05:35:50 +00:00
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/* Tell our callers how many extra registers we saved/restored */
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return numregs - 1;
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}
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1999-10-16 06:09:09 +00:00
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/* Emit a new caller-save insn and set the code. */
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static void
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insert_one_insn (chain, before_p, code, pat)
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struct insn_chain *chain;
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int before_p;
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enum insn_code code;
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rtx pat;
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{
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rtx insn = chain->insn;
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struct insn_chain *new;
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#ifdef HAVE_cc0
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/* If INSN references CC0, put our insns in front of the insn that sets
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CC0. This is always safe, since the only way we could be passed an
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insn that references CC0 is for a restore, and doing a restore earlier
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isn't a problem. We do, however, assume here that CALL_INSNs don't
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reference CC0. Guard against non-INSN's like CODE_LABEL. */
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if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
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&& before_p
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&& reg_referenced_p (cc0_rtx, PATTERN (insn)))
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chain = chain->prev, insn = chain->insn;
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#endif
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new = new_insn_chain ();
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if (before_p)
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{
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new->prev = chain->prev;
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if (new->prev != 0)
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new->prev->next = new;
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else
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reload_insn_chain = new;
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chain->prev = new;
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new->next = chain;
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new->insn = emit_insn_before (pat, insn);
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/* ??? It would be nice if we could exclude the already / still saved
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registers from the live sets. */
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COPY_REG_SET (new->live_before, chain->live_before);
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COPY_REG_SET (new->live_after, chain->live_before);
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if (chain->insn == BLOCK_HEAD (chain->block))
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BLOCK_HEAD (chain->block) = new->insn;
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}
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else
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{
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new->next = chain->next;
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if (new->next != 0)
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new->next->prev = new;
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chain->next = new;
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new->prev = chain;
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new->insn = emit_insn_after (pat, insn);
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/* ??? It would be nice if we could exclude the already / still saved
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registers from the live sets, and observe REG_UNUSED notes. */
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COPY_REG_SET (new->live_before, chain->live_after);
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COPY_REG_SET (new->live_after, chain->live_after);
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if (chain->insn == BLOCK_END (chain->block))
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BLOCK_END (chain->block) = new->insn;
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}
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new->block = chain->block;
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new->is_caller_save_insn = 1;
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INSN_CODE (new->insn) = code;
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}
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