2016-07-21 03:11:39 +00:00
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/*-
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2019-02-04 21:28:25 +00:00
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* Copyright (c) 2016 Netflix, Inc.
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2016-07-21 03:11:39 +00:00
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/buf.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/ioccom.h>
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#include <sys/malloc.h>
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#include <sys/proc.h>
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#include <sys/smp.h>
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#include <cam/cam.h>
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#include <cam/cam_ccb.h>
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#include <cam/cam_sim.h>
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#include <cam/cam_xpt_sim.h>
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#include <cam/cam_debug.h>
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2017-11-14 05:05:16 +00:00
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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2016-07-21 03:11:39 +00:00
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#include "nvme_private.h"
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#define ccb_accb_ptr spriv_ptr0
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#define ccb_ctrlr_ptr spriv_ptr1
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static void nvme_sim_action(struct cam_sim *sim, union ccb *ccb);
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static void nvme_sim_poll(struct cam_sim *sim);
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#define sim2softc(sim) ((struct nvme_sim_softc *)cam_sim_softc(sim))
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#define sim2ctrlr(sim) (sim2softc(sim)->s_ctrlr)
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struct nvme_sim_softc
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{
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struct nvme_controller *s_ctrlr;
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struct cam_sim *s_sim;
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struct cam_path *s_path;
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};
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static void
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nvme_sim_nvmeio_done(void *ccb_arg, const struct nvme_completion *cpl)
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{
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union ccb *ccb = (union ccb *)ccb_arg;
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/*
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* Let the periph know the completion, and let it sort out what
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* it means. Make our best guess, though for the status code.
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*/
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memcpy(&ccb->nvmeio.cpl, cpl, sizeof(*cpl));
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2018-01-17 17:08:26 +00:00
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ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
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2017-09-28 01:27:00 +00:00
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if (nvme_completion_is_error(cpl)) {
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2016-07-21 03:11:39 +00:00
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ccb->ccb_h.status = CAM_REQ_CMP_ERR;
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2017-09-28 01:27:00 +00:00
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xpt_done(ccb);
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} else {
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2016-07-21 03:11:39 +00:00
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ccb->ccb_h.status = CAM_REQ_CMP;
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2017-09-28 01:27:00 +00:00
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xpt_done_direct(ccb);
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}
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2016-07-21 03:11:39 +00:00
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}
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static void
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nvme_sim_nvmeio(struct cam_sim *sim, union ccb *ccb)
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{
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struct ccb_nvmeio *nvmeio = &ccb->nvmeio;
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struct nvme_request *req;
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void *payload;
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uint32_t size;
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struct nvme_controller *ctrlr;
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ctrlr = sim2ctrlr(sim);
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payload = nvmeio->data_ptr;
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size = nvmeio->dxfer_len;
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/* SG LIST ??? */
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if ((nvmeio->ccb_h.flags & CAM_DATA_MASK) == CAM_DATA_BIO)
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req = nvme_allocate_request_bio((struct bio *)payload,
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nvme_sim_nvmeio_done, ccb);
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2017-08-29 15:29:57 +00:00
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else if ((nvmeio->ccb_h.flags & CAM_DATA_SG) == CAM_DATA_SG)
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req = nvme_allocate_request_ccb(ccb, nvme_sim_nvmeio_done, ccb);
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2016-07-21 03:11:39 +00:00
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else if (payload == NULL)
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req = nvme_allocate_request_null(nvme_sim_nvmeio_done, ccb);
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else
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req = nvme_allocate_request_vaddr(payload, size,
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nvme_sim_nvmeio_done, ccb);
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if (req == NULL) {
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nvmeio->ccb_h.status = CAM_RESRC_UNAVAIL;
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xpt_done(ccb);
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return;
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}
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2018-01-17 17:08:26 +00:00
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ccb->ccb_h.status |= CAM_SIM_QUEUED;
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2016-07-21 03:11:39 +00:00
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memcpy(&req->cmd, &ccb->nvmeio.cmd, sizeof(ccb->nvmeio.cmd));
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2017-07-14 14:52:20 +00:00
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if (ccb->ccb_h.func_code == XPT_NVME_IO)
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nvme_ctrlr_submit_io_request(ctrlr, req);
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else
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nvme_ctrlr_submit_admin_request(ctrlr, req);
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2016-07-21 03:11:39 +00:00
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}
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2017-11-14 05:05:16 +00:00
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static uint32_t
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nvme_link_kBps(struct nvme_controller *ctrlr)
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{
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uint32_t speed, lanes, link[] = { 1, 250000, 500000, 985000, 1970000 };
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2017-11-15 02:24:47 +00:00
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uint32_t status;
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2017-11-14 05:05:16 +00:00
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2017-11-15 02:24:47 +00:00
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status = pcie_read_config(ctrlr->dev, PCIER_LINK_STA, 2);
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speed = status & PCIEM_LINK_STA_SPEED;
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lanes = (status & PCIEM_LINK_STA_WIDTH) >> 4;
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2017-11-14 05:05:16 +00:00
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/*
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* Failsafe on link speed indicator. If it is insane report the number of
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* lanes as the speed. Not 100% accurate, but may be diagnostic.
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*/
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if (speed >= nitems(link))
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speed = 0;
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return link[speed] * lanes;
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}
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2016-07-21 03:11:39 +00:00
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static void
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nvme_sim_action(struct cam_sim *sim, union ccb *ccb)
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{
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struct nvme_controller *ctrlr;
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CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE,
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("nvme_sim_action: func= %#x\n",
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ccb->ccb_h.func_code));
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ctrlr = sim2ctrlr(sim);
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switch (ccb->ccb_h.func_code) {
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case XPT_CALC_GEOMETRY: /* Calculate Geometry Totally nuts ? XXX */
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/*
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* Only meaningful for old-school SCSI disks since only the SCSI
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* da driver generates them. Reject all these that slip through.
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*/
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/*FALLTHROUGH*/
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case XPT_ABORT: /* Abort the specified CCB */
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ccb->ccb_h.status = CAM_REQ_INVALID;
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break;
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case XPT_SET_TRAN_SETTINGS:
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/*
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* NVMe doesn't really have different transfer settings, but
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* other parts of CAM think failure here is a big deal.
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*/
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ccb->ccb_h.status = CAM_REQ_CMP;
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break;
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case XPT_PATH_INQ: /* Path routing inquiry */
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{
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2017-12-20 19:13:55 +00:00
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struct ccb_pathinq *cpi = &ccb->cpi;
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device_t dev = ctrlr->dev;
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2016-07-21 03:11:39 +00:00
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/*
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* NVMe may have multiple LUNs on the same path. Current generation
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* of NVMe devives support only a single name space. Multiple name
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* space drives are coming, but it's unclear how we should report
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* them up the stack.
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*/
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cpi->version_num = 1;
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cpi->hba_inquiry = 0;
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cpi->target_sprt = 0;
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2018-05-25 03:34:33 +00:00
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cpi->hba_misc = PIM_UNMAPPED | PIM_NOSCAN;
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2016-07-21 03:11:39 +00:00
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cpi->hba_eng_cnt = 0;
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cpi->max_target = 0;
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cpi->max_lun = ctrlr->cdata.nn;
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2018-05-25 03:34:33 +00:00
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cpi->maxio = ctrlr->max_xfer_size;
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2016-07-21 03:11:39 +00:00
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cpi->initiator_id = 0;
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cpi->bus_id = cam_sim_bus(sim);
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2017-11-14 05:05:16 +00:00
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cpi->base_transfer_speed = nvme_link_kBps(ctrlr);
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Always null-terminate ccb_pathinq.(sim_vid|hba_vid|dev_name)
The sim_vid, hba_vid, and dev_name fields of struct ccb_pathinq are
fixed-length strings. AFAICT the only place they're read is in
sbin/camcontrol/camcontrol.c, which assumes they'll be null-terminated.
However, the kernel doesn't null-terminate them. A bunch of copy-pasted code
uses strncpy to write them, and doesn't guarantee null-termination. For at
least 4 drivers (mpr, mps, ciss, and hyperv), the hba_vid field actually
overflows. You can see the result by doing "camcontrol negotiate da0 -v".
This change null-terminates those fields everywhere they're set in the
kernel. It also shortens a few strings to ensure they'll fit within the
16-character field.
PR: 215474
Reported by: Coverity
CID: 1009997 1010000 1010001 1010002 1010003 1010004 1010005
CID: 1331519 1010006 1215097 1010007 1288967 1010008 1306000
CID: 1211924 1010009 1010010 1010011 1010012 1010013 1010014
CID: 1147190 1010017 1010016 1010018 1216435 1010020 1010021
CID: 1010022 1009666 1018185 1010023 1010025 1010026 1010027
CID: 1010028 1010029 1010030 1010031 1010033 1018186 1018187
CID: 1010035 1010036 1010042 1010041 1010040 1010039
Reviewed by: imp, sephe, slm
MFC after: 4 weeks
Sponsored by: Spectra Logic Corp
Differential Revision: https://reviews.freebsd.org/D9037
Differential Revision: https://reviews.freebsd.org/D9038
2017-01-04 20:26:42 +00:00
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strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
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strlcpy(cpi->hba_vid, "NVMe", HBA_IDLEN);
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strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
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2016-07-21 03:11:39 +00:00
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cpi->unit_number = cam_sim_unit(sim);
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2017-01-05 03:08:57 +00:00
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cpi->transport = XPORT_NVME; /* XXX XPORT_PCIE ? */
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2017-11-14 05:05:16 +00:00
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cpi->transport_version = nvme_mmio_read_4(ctrlr, vs);
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2017-01-05 03:08:57 +00:00
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cpi->protocol = PROTO_NVME;
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2017-11-14 05:05:16 +00:00
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cpi->protocol_version = nvme_mmio_read_4(ctrlr, vs);
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2018-05-25 03:34:33 +00:00
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cpi->xport_specific.nvme.nsid = xpt_path_lun_id(ccb->ccb_h.path);
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2017-12-20 19:13:55 +00:00
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cpi->xport_specific.nvme.domain = pci_get_domain(dev);
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cpi->xport_specific.nvme.bus = pci_get_bus(dev);
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cpi->xport_specific.nvme.slot = pci_get_slot(dev);
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cpi->xport_specific.nvme.function = pci_get_function(dev);
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cpi->xport_specific.nvme.extra = 0;
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2020-04-30 00:43:02 +00:00
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strncpy(cpi->xport_specific.nvme.dev_name, device_get_nameunit(ctrlr->dev),
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sizeof(cpi->xport_specific.nvme.dev_name));
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2016-07-21 03:11:39 +00:00
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cpi->ccb_h.status = CAM_REQ_CMP;
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break;
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}
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case XPT_GET_TRAN_SETTINGS: /* Get transport settings */
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{
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struct ccb_trans_settings *cts;
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struct ccb_trans_settings_nvme *nvmep;
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struct ccb_trans_settings_nvme *nvmex;
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2017-11-14 05:05:16 +00:00
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device_t dev;
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2019-06-07 18:34:48 +00:00
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uint32_t status, caps, flags;
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2016-07-21 03:11:39 +00:00
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2017-11-14 05:05:16 +00:00
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dev = ctrlr->dev;
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2016-07-21 03:11:39 +00:00
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cts = &ccb->cts;
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nvmex = &cts->xport_specific.nvme;
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nvmep = &cts->proto_specific.nvme;
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2017-11-15 02:24:47 +00:00
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status = pcie_read_config(dev, PCIER_LINK_STA, 2);
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caps = pcie_read_config(dev, PCIER_LINK_CAP, 2);
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2019-06-07 18:34:48 +00:00
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flags = pcie_read_config(dev, PCIER_FLAGS, 2);
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2017-11-14 05:05:16 +00:00
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nvmex->spec = nvme_mmio_read_4(ctrlr, vs);
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2019-06-07 18:34:48 +00:00
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nvmex->valid = CTS_NVME_VALID_SPEC;
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if ((flags & PCIEM_FLAGS_TYPE) == PCIEM_TYPE_ENDPOINT) {
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nvmex->valid |= CTS_NVME_VALID_LINK;
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nvmex->speed = status & PCIEM_LINK_STA_SPEED;
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nvmex->lanes = (status & PCIEM_LINK_STA_WIDTH) >> 4;
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nvmex->max_speed = caps & PCIEM_LINK_CAP_MAX_SPEED;
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nvmex->max_lanes = (caps & PCIEM_LINK_CAP_MAX_WIDTH) >> 4;
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}
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2017-11-14 05:05:16 +00:00
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/* XXX these should be something else maybe ? */
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nvmep->valid = 1;
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nvmep->spec = nvmex->spec;
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2016-07-21 03:11:39 +00:00
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cts->transport = XPORT_NVME;
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cts->protocol = PROTO_NVME;
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cts->ccb_h.status = CAM_REQ_CMP;
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break;
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}
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case XPT_TERM_IO: /* Terminate the I/O process */
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/*
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* every driver handles this, but nothing generates it. Assume
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* it's OK to just say 'that worked'.
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*/
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/*FALLTHROUGH*/
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case XPT_RESET_DEV: /* Bus Device Reset the specified device */
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case XPT_RESET_BUS: /* Reset the specified bus */
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/*
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* NVMe doesn't really support physically resetting the bus. It's part
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* of the bus scanning dance, so return sucess to tell the process to
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* proceed.
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*/
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ccb->ccb_h.status = CAM_REQ_CMP;
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break;
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case XPT_NVME_IO: /* Execute the requested I/O operation */
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2017-07-14 14:52:20 +00:00
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case XPT_NVME_ADMIN: /* or Admin operation */
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2016-07-21 03:11:39 +00:00
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nvme_sim_nvmeio(sim, ccb);
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return; /* no done */
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default:
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ccb->ccb_h.status = CAM_REQ_INVALID;
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break;
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}
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xpt_done(ccb);
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}
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static void
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nvme_sim_poll(struct cam_sim *sim)
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{
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2017-10-15 16:19:09 +00:00
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nvme_ctrlr_poll(sim2ctrlr(sim));
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2016-07-21 03:11:39 +00:00
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}
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static void *
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nvme_sim_new_controller(struct nvme_controller *ctrlr)
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|
|
|
{
|
2018-05-25 03:34:33 +00:00
|
|
|
struct nvme_sim_softc *sc;
|
2016-07-21 03:11:39 +00:00
|
|
|
struct cam_devq *devq;
|
|
|
|
int max_trans;
|
|
|
|
|
2017-08-28 23:54:20 +00:00
|
|
|
max_trans = ctrlr->max_hw_pend_io;
|
2016-07-21 03:11:39 +00:00
|
|
|
devq = cam_simq_alloc(max_trans);
|
|
|
|
if (devq == NULL)
|
2018-05-25 03:34:33 +00:00
|
|
|
return (NULL);
|
2016-07-21 03:11:39 +00:00
|
|
|
|
|
|
|
sc = malloc(sizeof(*sc), M_NVME, M_ZERO | M_WAITOK);
|
|
|
|
sc->s_ctrlr = ctrlr;
|
|
|
|
|
|
|
|
sc->s_sim = cam_sim_alloc(nvme_sim_action, nvme_sim_poll,
|
2018-05-25 03:34:33 +00:00
|
|
|
"nvme", sc, device_get_unit(ctrlr->dev),
|
2018-12-24 23:28:11 +00:00
|
|
|
NULL, max_trans, max_trans, devq);
|
2016-07-21 03:11:39 +00:00
|
|
|
if (sc->s_sim == NULL) {
|
|
|
|
printf("Failed to allocate a sim\n");
|
|
|
|
cam_simq_free(devq);
|
2018-05-25 03:34:33 +00:00
|
|
|
goto err1;
|
|
|
|
}
|
|
|
|
if (xpt_bus_register(sc->s_sim, ctrlr->dev, 0) != CAM_SUCCESS) {
|
|
|
|
printf("Failed to create a bus\n");
|
|
|
|
goto err2;
|
|
|
|
}
|
|
|
|
if (xpt_create_path(&sc->s_path, /*periph*/NULL, cam_sim_path(sc->s_sim),
|
|
|
|
CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
|
|
|
|
printf("Failed to create a path\n");
|
|
|
|
goto err3;
|
2016-07-21 03:11:39 +00:00
|
|
|
}
|
|
|
|
|
2018-05-25 03:34:33 +00:00
|
|
|
return (sc);
|
|
|
|
|
|
|
|
err3:
|
|
|
|
xpt_bus_deregister(cam_sim_path(sc->s_sim));
|
|
|
|
err2:
|
|
|
|
cam_sim_free(sc->s_sim, /*free_devq*/TRUE);
|
|
|
|
err1:
|
|
|
|
free(sc, M_NVME);
|
|
|
|
return (NULL);
|
2016-07-21 03:11:39 +00:00
|
|
|
}
|
|
|
|
|
2018-05-25 03:34:33 +00:00
|
|
|
static void *
|
|
|
|
nvme_sim_new_ns(struct nvme_namespace *ns, void *sc_arg)
|
2016-07-21 03:11:39 +00:00
|
|
|
{
|
2018-05-25 03:34:33 +00:00
|
|
|
struct nvme_sim_softc *sc = sc_arg;
|
2016-07-21 03:11:39 +00:00
|
|
|
union ccb *ccb;
|
|
|
|
|
|
|
|
ccb = xpt_alloc_ccb_nowait();
|
|
|
|
if (ccb == NULL) {
|
|
|
|
printf("unable to alloc CCB for rescan\n");
|
2018-05-25 03:34:33 +00:00
|
|
|
return (NULL);
|
2016-07-21 03:11:39 +00:00
|
|
|
}
|
|
|
|
|
2018-05-25 03:34:33 +00:00
|
|
|
if (xpt_create_path(&ccb->ccb_h.path, /*periph*/NULL,
|
|
|
|
cam_sim_path(sc->s_sim), 0, ns->id) != CAM_REQ_CMP) {
|
|
|
|
printf("unable to create path for rescan\n");
|
2016-07-21 03:11:39 +00:00
|
|
|
xpt_free_ccb(ccb);
|
2018-05-25 03:34:33 +00:00
|
|
|
return (NULL);
|
2016-07-21 03:11:39 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
xpt_rescan(ccb);
|
|
|
|
|
2018-05-25 03:34:33 +00:00
|
|
|
return (ns);
|
2016-07-21 03:11:39 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
nvme_sim_controller_fail(void *ctrlr_arg)
|
|
|
|
{
|
2018-05-25 03:34:33 +00:00
|
|
|
struct nvme_sim_softc *sc = ctrlr_arg;
|
|
|
|
|
|
|
|
xpt_async(AC_LOST_DEVICE, sc->s_path, NULL);
|
|
|
|
xpt_free_path(sc->s_path);
|
|
|
|
xpt_bus_deregister(cam_sim_path(sc->s_sim));
|
|
|
|
cam_sim_free(sc->s_sim, /*free_devq*/TRUE);
|
|
|
|
free(sc, M_NVME);
|
2016-07-21 03:11:39 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
struct nvme_consumer *consumer_cookie;
|
|
|
|
|
|
|
|
static void
|
|
|
|
nvme_sim_init(void)
|
|
|
|
{
|
2017-08-04 03:40:01 +00:00
|
|
|
if (nvme_use_nvd)
|
|
|
|
return;
|
2016-07-21 03:11:39 +00:00
|
|
|
|
|
|
|
consumer_cookie = nvme_register_consumer(nvme_sim_new_ns,
|
|
|
|
nvme_sim_new_controller, NULL, nvme_sim_controller_fail);
|
|
|
|
}
|
|
|
|
|
|
|
|
SYSINIT(nvme_sim_register, SI_SUB_DRIVERS, SI_ORDER_ANY,
|
|
|
|
nvme_sim_init, NULL);
|
|
|
|
|
|
|
|
static void
|
|
|
|
nvme_sim_uninit(void)
|
|
|
|
{
|
2017-08-04 03:40:01 +00:00
|
|
|
if (nvme_use_nvd)
|
|
|
|
return;
|
2016-07-21 03:11:39 +00:00
|
|
|
/* XXX Cleanup */
|
|
|
|
|
|
|
|
nvme_unregister_consumer(consumer_cookie);
|
|
|
|
}
|
|
|
|
|
|
|
|
SYSUNINIT(nvme_sim_unregister, SI_SUB_DRIVERS, SI_ORDER_ANY,
|
|
|
|
nvme_sim_uninit, NULL);
|