freebsd-dev/sys/dev/isp/isp_target.h

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/* $FreeBSD$ */
/*-
* Qlogic Target Mode Structure and Flag Definitions
*
* Copyright (c) 1997, 1998
* Patrick Stirling
* pms@psconsult.com
* All rights reserved.
*
* Additonal Copyright (c) 1997-2006 by Matthew Jacob
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
2000-09-21 20:16:04 +00:00
* 2. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*/
#ifndef _ISP_TARGET_H
#define _ISP_TARGET_H
#define QLTM_SENSELEN 18 /* non-FC cards only */
#define QLTM_SVALID 0x80
/*
* Structure for Enable Lun and Modify Lun queue entries
*/
typedef struct {
isphdr_t le_header;
uint32_t le_reserved;
uint8_t le_lun;
uint8_t le_rsvd;
uint8_t le_ops; /* Modify LUN only */
uint8_t le_tgt; /* Not for FC */
uint32_t le_flags; /* Not for FC */
uint8_t le_status;
uint8_t le_reserved2;
uint8_t le_cmd_count;
uint8_t le_in_count;
uint8_t le_cdb6len; /* Not for FC */
uint8_t le_cdb7len; /* Not for FC */
uint16_t le_timeout;
uint16_t le_reserved3[20];
} lun_entry_t;
/*
* le_flags values
*/
#define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */
#define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */
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#define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */
#define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */
/*
* le_ops values
*/
#define LUN_CCINCR 0x01 /* increment command count */
#define LUN_CCDECR 0x02 /* decrement command count */
#define LUN_ININCR 0x40 /* increment immed. notify count */
#define LUN_INDECR 0x80 /* decrement immed. notify count */
/*
* le_status values
*/
#define LUN_OK 0x01 /* we be rockin' */
#define LUN_ERR 0x04 /* request completed with error */
#define LUN_INVAL 0x06 /* invalid request */
#define LUN_NOCAP 0x16 /* can't provide requested capability */
#define LUN_ENABLED 0x3E /* LUN already enabled */
/*
* Immediate Notify Entry structure
*/
#define IN_MSGLEN 8 /* 8 bytes */
#define IN_RSVDLEN 8 /* 8 words */
typedef struct {
isphdr_t in_header;
uint32_t in_reserved;
uint8_t in_lun; /* lun */
uint8_t in_iid; /* initiator */
uint8_t in_reserved2;
uint8_t in_tgt; /* target */
uint32_t in_flags;
uint8_t in_status;
uint8_t in_rsvd2;
uint8_t in_tag_val; /* tag value */
uint8_t in_tag_type; /* tag type */
uint16_t in_seqid; /* sequence id */
uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */
uint16_t in_reserved3[IN_RSVDLEN];
uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */
} in_entry_t;
typedef struct {
isphdr_t in_header;
uint32_t in_reserved;
uint8_t in_lun; /* lun */
uint8_t in_iid; /* initiator */
uint16_t in_scclun;
uint32_t in_reserved2;
uint16_t in_status;
uint16_t in_task_flags;
uint16_t in_seqid; /* sequence id */
} in_fcentry_t;
typedef struct {
isphdr_t in_header;
uint32_t in_reserved;
uint16_t in_iid; /* initiator */
uint16_t in_scclun;
uint32_t in_reserved2;
uint16_t in_status;
uint16_t in_task_flags;
uint16_t in_seqid; /* sequence id */
} in_fcentry_e_t;
/*
* Values for the in_status field
*/
#define IN_REJECT 0x0D /* Message Reject message received */
#define IN_RESET 0x0E /* Bus Reset occurred */
#define IN_NO_RCAP 0x16 /* requested capability not available */
#define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */
#define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */
#define IN_MSG_RECEIVED 0x36 /* SCSI message received */
#define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */
#define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */
#define IN_PORT_CHANGED 0x2A /* port changed */
#define IN_GLOBAL_LOGO 0x2E /* all ports logged out */
#define IN_NO_NEXUS 0x3B /* Nexus not established */
/*
* Values for the in_task_flags field- should only get one at a time!
*/
#define TASK_FLAGS_CLEAR_ACA (1<<14)
#define TASK_FLAGS_TARGET_RESET (1<<13)
#define TASK_FLAGS_LUN_RESET (1<<12)
#define TASK_FLAGS_CLEAR_TASK_SET (1<<10)
#define TASK_FLAGS_ABORT_TASK_SET (1<<9)
#ifndef MSG_ABORT
#define MSG_ABORT 0x06
#endif
#ifndef MSG_BUS_DEV_RESET
#define MSG_BUS_DEV_RESET 0x0c
#endif
#ifndef MSG_ABORT_TAG
#define MSG_ABORT_TAG 0x0d
#endif
#ifndef MSG_CLEAR_QUEUE
#define MSG_CLEAR_QUEUE 0x0e
#endif
#ifndef MSG_REL_RECOVERY
#define MSG_REL_RECOVERY 0x10
#endif
#ifndef MSG_TERM_IO_PROC
#define MSG_TERM_IO_PROC 0x11
#endif
#ifndef MSG_LUN_RESET
#define MSG_LUN_RESET 0x17
#endif
/*
* Notify Acknowledge Entry structure
*/
#define NA_RSVDLEN 22
typedef struct {
isphdr_t na_header;
uint32_t na_reserved;
uint8_t na_lun; /* lun */
uint8_t na_iid; /* initiator */
uint8_t na_reserved2;
uint8_t na_tgt; /* target */
uint32_t na_flags;
uint8_t na_status;
uint8_t na_event;
uint16_t na_seqid; /* sequence id */
uint16_t na_reserved3[NA_RSVDLEN];
} na_entry_t;
/*
* Value for the na_event field
*/
#define NA_RST_CLRD 0x80 /* Clear an async event notification */
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#define NA_OK 0x01 /* Notify Acknowledge Succeeded */
#define NA_INVALID 0x06 /* Invalid Notify Acknowledge */
#define NA2_RSVDLEN 21
typedef struct {
isphdr_t na_header;
uint32_t na_reserved;
uint8_t na_lun; /* lun */
uint8_t na_iid; /* initiator */
uint16_t na_scclun;
uint16_t na_flags;
uint16_t na_reserved2;
uint16_t na_status;
uint16_t na_task_flags;
uint16_t na_seqid; /* sequence id */
uint16_t na_reserved3[NA2_RSVDLEN];
} na_fcentry_t;
typedef struct {
isphdr_t na_header;
uint32_t na_reserved;
uint16_t na_iid; /* initiator */
uint16_t na_scclun;
uint16_t na_flags;
uint16_t na_reserved2;
uint16_t na_status;
uint16_t na_task_flags;
uint16_t na_seqid; /* sequence id */
uint16_t na_reserved3[NA2_RSVDLEN];
} na_fcentry_e_t;
#define NAFC_RCOUNT 0x80 /* increment resource count */
#define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */
/*
* Accept Target I/O Entry structure
*/
#define ATIO_CDBLEN 26
typedef struct {
isphdr_t at_header;
uint16_t at_reserved;
uint16_t at_handle;
uint8_t at_lun; /* lun */
uint8_t at_iid; /* initiator */
uint8_t at_cdblen; /* cdb length */
uint8_t at_tgt; /* target */
uint32_t at_flags;
uint8_t at_status; /* firmware status */
uint8_t at_scsi_status; /* scsi status */
uint8_t at_tag_val; /* tag value */
uint8_t at_tag_type; /* tag type */
uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */
uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */
} at_entry_t;
/*
* at_flags values
*/
#define AT_NODISC 0x00008000 /* disconnect disabled */
#define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */
/*
* at_status values
*/
#define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */
#define AT_RESET 0x0E /* SCSI Bus Reset Occurred */
#define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */
#define AT_NOCAP 0x16 /* Requested capability not available */
#define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */
#define AT_CDB 0x3D /* CDB received */
/*
* Macros to create and fetch and test concatenated handle and tag value macros
*/
#define AT_MAKE_TAGID(tid, inst, aep) \
tid = aep->at_handle; \
if (aep->at_flags & AT_TQAE) { \
tid |= (aep->at_tag_val << 16); \
tid |= (1 << 24); \
} \
tid |= (GET_BUS_VAL(aep->at_iid) << 25); \
tid |= (inst << 26)
#define CT_MAKE_TAGID(tid, bus, inst, ct) \
tid = ct->ct_fwhandle; \
if (ct->ct_flags & CT_TQAE) { \
tid |= (ct->ct_tag_val << 16); \
tid |= (1 << 24); \
} \
tid |= ((bus & 0x1) << 25); \
tid |= (inst << 26)
#define AT_HAS_TAG(val) ((val) & (1 << 24))
#define AT_GET_TAG(val) (((val) >> 16) & 0xff)
#define AT_GET_INST(val) (((val) >> 26) & 0x3f)
#define AT_GET_BUS(val) (((val) >> 25) & 0x1)
#define AT_GET_HANDLE(val) ((val) & 0xffff)
#define IN_MAKE_TAGID(tid, inst, inp) \
tid = inp->in_seqid; \
tid |= (inp->in_tag_val << 16); \
tid |= (1 << 24); \
tid |= (GET_BUS_VAL(inp->in_iid) << 25); \
tid |= (inst << 26)
#define TAG_INSERT_INST(tid, inst) \
tid &= ~(0x3ffffff); \
tid |= (inst << 26)
#define TAG_INSERT_BUS(tid, bus) \
tid &= ~(1 << 25); \
tid |= (bus << 25)
/*
* Accept Target I/O Entry structure, Type 2
*/
#define ATIO2_CDBLEN 16
typedef struct {
isphdr_t at_header;
uint32_t at_reserved;
uint8_t at_lun; /* lun or reserved */
uint8_t at_iid; /* initiator */
uint16_t at_rxid; /* response ID */
uint16_t at_flags;
uint16_t at_status; /* firmware status */
uint8_t at_crn; /* command reference number */
uint8_t at_taskcodes;
uint8_t at_taskflags;
uint8_t at_execodes;
uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */
uint32_t at_datalen; /* allocated data len */
uint16_t at_scclun; /* SCC Lun or reserved */
uint16_t at_wwpn[4]; /* WWPN of initiator */
uint16_t at_reserved2[6];
uint16_t at_oxid;
} at2_entry_t;
typedef struct {
isphdr_t at_header;
uint32_t at_reserved;
uint16_t at_iid; /* initiator */
uint16_t at_rxid; /* response ID */
uint16_t at_flags;
uint16_t at_status; /* firmware status */
uint8_t at_crn; /* command reference number */
uint8_t at_taskcodes;
uint8_t at_taskflags;
uint8_t at_execodes;
uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */
uint32_t at_datalen; /* allocated data len */
uint16_t at_scclun; /* SCC Lun or reserved */
uint16_t at_wwpn[4]; /* WWPN of initiator */
uint16_t at_reserved2[6];
uint16_t at_oxid;
} at2e_entry_t;
#define ATIO2_WWPN_OFFSET 0x2A
#define ATIO2_OXID_OFFSET 0x3E
#define ATIO2_TC_ATTR_MASK 0x7
#define ATIO2_TC_ATTR_SIMPLEQ 0
#define ATIO2_TC_ATTR_HEADOFQ 1
#define ATIO2_TC_ATTR_ORDERED 2
#define ATIO2_TC_ATTR_ACAQ 4
#define ATIO2_TC_ATTR_UNTAGGED 5
#define ATIO2_EX_WRITE 0x1
#define ATIO2_EX_READ 0x2
/*
* Macros to create and fetch and test concatenated handle and tag value macros
*/
#define AT2_MAKE_TAGID(tid, inst, aep) \
tid = aep->at_rxid; \
tid |= (inst << 16)
#define CT2_MAKE_TAGID(tid, inst, ct) \
tid = ct->ct_rxid; \
tid |= (inst << 16)
#define AT2_HAS_TAG(val) 1
#define AT2_GET_TAG(val) ((val) & 0xffff)
#define AT2_GET_INST(val) ((val) >> 16)
#define AT2_GET_HANDLE AT2_GET_TAG
#define FC_HAS_TAG AT2_HAS_TAG
#define FC_GET_TAG AT2_GET_TAG
#define FC_GET_INST AT2_GET_INST
#define FC_GET_HANDLE AT2_GET_HANDLE
#define IN_FC_MAKE_TAGID(tid, inst, inp) \
tid = inp->in_seqid; \
tid |= (inst << 16)
#define FC_TAG_INSERT_INST(tid, inst) \
tid &= ~0xffff; \
tid |= (inst << 16)
/*
* Continue Target I/O Entry structure
* Request from driver. The response from the
* ISP firmware is the same except that the last 18
* bytes are overwritten by suggested sense data if
* the 'autosense valid' bit is set in the status byte.
*/
typedef struct {
isphdr_t ct_header;
uint16_t ct_reserved;
#define ct_syshandle ct_reserved /* we use this */
uint16_t ct_fwhandle; /* required by f/w */
uint8_t ct_lun; /* lun */
uint8_t ct_iid; /* initiator id */
uint8_t ct_reserved2;
uint8_t ct_tgt; /* our target id */
uint32_t ct_flags;
uint8_t ct_status; /* isp status */
uint8_t ct_scsi_status; /* scsi status */
uint8_t ct_tag_val; /* tag value */
uint8_t ct_tag_type; /* tag type */
uint32_t ct_xfrlen; /* transfer length */
uint32_t ct_resid; /* residual length */
uint16_t ct_timeout;
uint16_t ct_seg_count;
Major restructuring for swizzling to the request queue and unswizzling from the response queue. Instead of the ad hoc ISP_SWIZZLE_REQUEST, we now have a complete set of inline functions in isp_inline.h. Each platform is responsible for providing just one of a set of ISP_IOX_{GET,PUT}{8,16,32} macros. The reason this needs to be done is that we need to have a single set of functions that will work correctly on multiple architectures for both little and big endian machines. It also needs to work correctly in the case that we have the request or response queues in memory that has to be treated specially (e.g., have ddi_dma_sync called on it for Solaris after we update it or before we read from it). It also has to handle the SBus cards (for platforms that have them) which, while on a Big Endian machine, do *not* require *most* of the request/response queue entry fields to be swizzled or unswizzled. One thing that falls out of this is that we no longer build requests in the request queue itself. Instead, we build the request locally (e.g., on the stack) and then as part of the swizzling operation, copy it to the request queue entry we've allocated. I thought long and hard about whether this was too expensive a change to make as it in a lot of cases requires an extra copy. On balance, the flexbility is worth it. With any luck, the entry that we build locally stays in a processor writeback cache (after all, it's only 64 bytes) so that the cost of actually flushing it to the memory area that is the shared queue with the PCI device is not all that expensive. We may examine this again and try to get clever in the future to try and avoid copies. Another change that falls out of this is that MEMORYBARRIER should be taken a lot more seriously. The macro ISP_ADD_REQUEST does a MEMORYBARRIER on the entry being added. But there had been many other places this had been missing. It's now very important that it be done. Additional changes: Fix a longstanding buglet of sorts. When we get an entry via isp_getrqentry, the iptr value that gets returned is the value we intend to eventually plug into the ISP registers as the entry *one past* the last one we've written- *not* the current entry we're updating. All along we've been calling sync functions on the wrong index value. Argh. The 'fix' here is to rename all 'iptr' variables as 'nxti' to remember that this is the 'next' pointer- not the current pointer. Devote a single bit to mboxbsy- and set aside bits for output mbox registers that we need to pick up- we can have at least one command which does not have any defined output registers (MBOX_EXECUTE_FIRMWARE). MFC after: 2 weeks
2001-12-11 00:18:45 +00:00
/*
* This is so we can share tag name space with
* CTIO{2,3,4} with the minimum of pain.
*/
union {
ispds_t ct_a[ISP_RQDSEG];
} _u;
#define ct_dataseg _u.ct_a
} ct_entry_t;
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/*
* For some of the dual port SCSI adapters, port (bus #) is reported
* in the MSbit of ct_iid. Bit fields are a bit too awkward here.
*
* Note that this does not apply to FC adapters at all which can and
* do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices
* that have logged in across a SCSI fabric.
2000-01-15 01:48:24 +00:00
*/
#define GET_IID_VAL(x) (x & 0x3f)
#define GET_BUS_VAL(x) ((x >> 7) & 0x1)
#define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f))
#define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7))
2000-01-15 01:48:24 +00:00
/*
* ct_flags values
*/
#define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */
#define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction */
#define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction */
#define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */
#define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */
#define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */
#define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */
#define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */
#define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */
#define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */
#define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */
/*
* ct_status values
* - set by the firmware when it returns the CTIO
*/
#define CT_OK 0x01 /* completed without error */
#define CT_ABORTED 0x02 /* aborted by host */
#define CT_ERR 0x04 /* see sense data for error */
#define CT_INVAL 0x06 /* request for disabled lun */
#define CT_NOPATH 0x07 /* invalid ITL nexus */
#define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */
Spring MegaChange #1. ---- Make a device for each ISP- really usable only with devfs and add an ioctl entry point (this can be used to (re)set debug levels, reset the HBA, rescan the fabric, issue lips, etc). ---- Add in a kernel thread for Fibre Channel cards. The purpose of this thread is to be woken up to clean up after Fibre Channel events block things. Basically, any FC event that casts doubt on the location or identify of FC devices blocks the queues. When, and if, we get the PORT DATABASE CHANGED or NAME SERVER DATABASE CHANGED async event, we activate the kthread which will then, in full thread context, re-evaluate the local loop and/or the fabric. When it's satisfied that things are stable, it can then release the blocked queues and let commands flow again. The prior mechanism was a lazy evaluation. That is, the next command to come down the pipe after change events would pay the full price for re-evaluation. And if this was done off of a softcall, it really could hang up the system. These changes brings the FreeBSD port more in line with the Solaris, Linux and NetBSD ports. It also, more importantly, gets us being more proactive about topology changes which could then be reflected upwards to CAM so that the periph driver can be informed sooner rather than later when things arrive or depart. --- Add in the (correct) usage of locking macros- we now have lock transition macros which allow us to transition from holding the CAM lock (Giant) and grabbing the softc lock and vice versa. Switch over to having this HBA do real locking. Some folks claim this won't be a win. They're right. But you have to start somewhere, and this will begin to teach us how to DTRT for HBAs, etc. -- Start putting in prototype 2300 support. Add back in LIP and Loop Reset as async events that each platform will handle. Add in another int_bogus instrumentation point. Do some more substantial target mode cleanups. MFC after: 8 weeks
2001-05-28 21:20:43 +00:00
#define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */
#define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */
#define CT_TIMEOUT 0x0B /* timed out */
#define CT_RESET 0x0E /* SCSI Bus Reset occurred */
#define CT_PARITY 0x0F /* Uncorrectable Parity Error */
Spring MegaChange #1. ---- Make a device for each ISP- really usable only with devfs and add an ioctl entry point (this can be used to (re)set debug levels, reset the HBA, rescan the fabric, issue lips, etc). ---- Add in a kernel thread for Fibre Channel cards. The purpose of this thread is to be woken up to clean up after Fibre Channel events block things. Basically, any FC event that casts doubt on the location or identify of FC devices blocks the queues. When, and if, we get the PORT DATABASE CHANGED or NAME SERVER DATABASE CHANGED async event, we activate the kthread which will then, in full thread context, re-evaluate the local loop and/or the fabric. When it's satisfied that things are stable, it can then release the blocked queues and let commands flow again. The prior mechanism was a lazy evaluation. That is, the next command to come down the pipe after change events would pay the full price for re-evaluation. And if this was done off of a softcall, it really could hang up the system. These changes brings the FreeBSD port more in line with the Solaris, Linux and NetBSD ports. It also, more importantly, gets us being more proactive about topology changes which could then be reflected upwards to CAM so that the periph driver can be informed sooner rather than later when things arrive or depart. --- Add in the (correct) usage of locking macros- we now have lock transition macros which allow us to transition from holding the CAM lock (Giant) and grabbing the softc lock and vice versa. Switch over to having this HBA do real locking. Some folks claim this won't be a win. They're right. But you have to start somewhere, and this will begin to teach us how to DTRT for HBAs, etc. -- Start putting in prototype 2300 support. Add back in LIP and Loop Reset as async events that each platform will handle. Add in another int_bogus instrumentation point. Do some more substantial target mode cleanups. MFC after: 8 weeks
2001-05-28 21:20:43 +00:00
#define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */
#define CT_PANIC 0x13 /* Unrecoverable Error */
#define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */
#define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */
Spring MegaChange #1. ---- Make a device for each ISP- really usable only with devfs and add an ioctl entry point (this can be used to (re)set debug levels, reset the HBA, rescan the fabric, issue lips, etc). ---- Add in a kernel thread for Fibre Channel cards. The purpose of this thread is to be woken up to clean up after Fibre Channel events block things. Basically, any FC event that casts doubt on the location or identify of FC devices blocks the queues. When, and if, we get the PORT DATABASE CHANGED or NAME SERVER DATABASE CHANGED async event, we activate the kthread which will then, in full thread context, re-evaluate the local loop and/or the fabric. When it's satisfied that things are stable, it can then release the blocked queues and let commands flow again. The prior mechanism was a lazy evaluation. That is, the next command to come down the pipe after change events would pay the full price for re-evaluation. And if this was done off of a softcall, it really could hang up the system. These changes brings the FreeBSD port more in line with the Solaris, Linux and NetBSD ports. It also, more importantly, gets us being more proactive about topology changes which could then be reflected upwards to CAM so that the periph driver can be informed sooner rather than later when things arrive or depart. --- Add in the (correct) usage of locking macros- we now have lock transition macros which allow us to transition from holding the CAM lock (Giant) and grabbing the softc lock and vice versa. Switch over to having this HBA do real locking. Some folks claim this won't be a win. They're right. But you have to start somewhere, and this will begin to teach us how to DTRT for HBAs, etc. -- Start putting in prototype 2300 support. Add back in LIP and Loop Reset as async events that each platform will handle. Add in another int_bogus instrumentation point. Do some more substantial target mode cleanups. MFC after: 8 weeks
2001-05-28 21:20:43 +00:00
#define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */
#define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */
#define CT_PORTNOTAVAIL 0x28 /* port not available */
#define CT_LOGOUT 0x29 /* port logout */
#define CT_PORTCHANGED 0x2A /* port changed */
#define CT_IDE 0x33 /* Initiator Detected Error */
#define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */
#define CT_SRR 0x45 /* SRR Received */
#define CT_LUN_RESET 0x48 /* Lun Reset Received */
/*
* When the firmware returns a CTIO entry, it may overwrite the last
* part of the structure with sense data. This starts at offset 0x2E
* into the entry, which is in the middle of ct_dataseg[1]. Rather
* than define a new struct for this, I'm just using the sense data
* offset.
*/
#define CTIO_SENSE_OFFSET 0x2E
/*
* Entry length in u_longs. All entries are the same size so
* any one will do as the numerator.
*/
#define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t))
/*
* QLA2100 CTIO (type 2) entry
*/
#define MAXRESPLEN 26
typedef struct {
isphdr_t ct_header;
uint16_t ct_reserved;
uint16_t ct_fwhandle; /* just to match CTIO */
uint8_t ct_lun; /* lun */
uint8_t ct_iid; /* initiator id */
uint16_t ct_rxid; /* response ID */
uint16_t ct_flags;
uint16_t ct_status; /* isp status */
uint16_t ct_timeout;
uint16_t ct_seg_count;
uint32_t ct_reloff; /* relative offset */
2000-01-15 01:48:24 +00:00
int32_t ct_resid; /* residual length */
union {
/*
* The three different modes that the target driver
Major restructuring for swizzling to the request queue and unswizzling from the response queue. Instead of the ad hoc ISP_SWIZZLE_REQUEST, we now have a complete set of inline functions in isp_inline.h. Each platform is responsible for providing just one of a set of ISP_IOX_{GET,PUT}{8,16,32} macros. The reason this needs to be done is that we need to have a single set of functions that will work correctly on multiple architectures for both little and big endian machines. It also needs to work correctly in the case that we have the request or response queues in memory that has to be treated specially (e.g., have ddi_dma_sync called on it for Solaris after we update it or before we read from it). It also has to handle the SBus cards (for platforms that have them) which, while on a Big Endian machine, do *not* require *most* of the request/response queue entry fields to be swizzled or unswizzled. One thing that falls out of this is that we no longer build requests in the request queue itself. Instead, we build the request locally (e.g., on the stack) and then as part of the swizzling operation, copy it to the request queue entry we've allocated. I thought long and hard about whether this was too expensive a change to make as it in a lot of cases requires an extra copy. On balance, the flexbility is worth it. With any luck, the entry that we build locally stays in a processor writeback cache (after all, it's only 64 bytes) so that the cost of actually flushing it to the memory area that is the shared queue with the PCI device is not all that expensive. We may examine this again and try to get clever in the future to try and avoid copies. Another change that falls out of this is that MEMORYBARRIER should be taken a lot more seriously. The macro ISP_ADD_REQUEST does a MEMORYBARRIER on the entry being added. But there had been many other places this had been missing. It's now very important that it be done. Additional changes: Fix a longstanding buglet of sorts. When we get an entry via isp_getrqentry, the iptr value that gets returned is the value we intend to eventually plug into the ISP registers as the entry *one past* the last one we've written- *not* the current entry we're updating. All along we've been calling sync functions on the wrong index value. Argh. The 'fix' here is to rename all 'iptr' variables as 'nxti' to remember that this is the 'next' pointer- not the current pointer. Devote a single bit to mboxbsy- and set aside bits for output mbox registers that we need to pick up- we can have at least one command which does not have any defined output registers (MBOX_EXECUTE_FIRMWARE). MFC after: 2 weeks
2001-12-11 00:18:45 +00:00
* can set the CTIO{2,3,4} up as.
*
* The first is for sending FCP_DATA_IUs as well as
* (optionally) sending a terminal SCSI status FCP_RSP_IU.
*
* The second is for sending SCSI sense data in an FCP_RSP_IU.
* Note that no FCP_DATA_IUs will be sent.
*
* The third is for sending FCP_RSP_IUs as built specifically
* in system memory as located by the isp_dataseg.
*/
struct {
uint32_t _reserved;
uint16_t _reserved2;
uint16_t ct_scsi_status;
uint32_t ct_xfrlen;
Major restructuring for swizzling to the request queue and unswizzling from the response queue. Instead of the ad hoc ISP_SWIZZLE_REQUEST, we now have a complete set of inline functions in isp_inline.h. Each platform is responsible for providing just one of a set of ISP_IOX_{GET,PUT}{8,16,32} macros. The reason this needs to be done is that we need to have a single set of functions that will work correctly on multiple architectures for both little and big endian machines. It also needs to work correctly in the case that we have the request or response queues in memory that has to be treated specially (e.g., have ddi_dma_sync called on it for Solaris after we update it or before we read from it). It also has to handle the SBus cards (for platforms that have them) which, while on a Big Endian machine, do *not* require *most* of the request/response queue entry fields to be swizzled or unswizzled. One thing that falls out of this is that we no longer build requests in the request queue itself. Instead, we build the request locally (e.g., on the stack) and then as part of the swizzling operation, copy it to the request queue entry we've allocated. I thought long and hard about whether this was too expensive a change to make as it in a lot of cases requires an extra copy. On balance, the flexbility is worth it. With any luck, the entry that we build locally stays in a processor writeback cache (after all, it's only 64 bytes) so that the cost of actually flushing it to the memory area that is the shared queue with the PCI device is not all that expensive. We may examine this again and try to get clever in the future to try and avoid copies. Another change that falls out of this is that MEMORYBARRIER should be taken a lot more seriously. The macro ISP_ADD_REQUEST does a MEMORYBARRIER on the entry being added. But there had been many other places this had been missing. It's now very important that it be done. Additional changes: Fix a longstanding buglet of sorts. When we get an entry via isp_getrqentry, the iptr value that gets returned is the value we intend to eventually plug into the ISP registers as the entry *one past* the last one we've written- *not* the current entry we're updating. All along we've been calling sync functions on the wrong index value. Argh. The 'fix' here is to rename all 'iptr' variables as 'nxti' to remember that this is the 'next' pointer- not the current pointer. Devote a single bit to mboxbsy- and set aside bits for output mbox registers that we need to pick up- we can have at least one command which does not have any defined output registers (MBOX_EXECUTE_FIRMWARE). MFC after: 2 weeks
2001-12-11 00:18:45 +00:00
union {
ispds_t ct_a[ISP_RQDSEG_T2]; /* CTIO2 */
ispds64_t ct_b[ISP_RQDSEG_T3]; /* CTIO3 */
ispdslist_t ct_c; /* CTIO4 */
} _u;
#define ct_dataseg _u.ct_a
#define ct_dataseg64 _u.ct_b
#define ct_dslist _u.ct_c
} m0;
struct {
uint16_t _reserved;
uint16_t _reserved2;
uint16_t ct_senselen;
uint16_t ct_scsi_status;
uint16_t ct_resplen;
uint8_t ct_resp[MAXRESPLEN];
} m1;
struct {
uint32_t _reserved;
uint16_t _reserved2;
uint16_t _reserved3;
uint32_t ct_datalen;
ispds_t ct_fcp_rsp_iudata;
} m2;
} rsp;
} ct2_entry_t;
typedef struct {
isphdr_t ct_header;
uint16_t ct_reserved;
uint16_t ct_fwhandle; /* just to match CTIO */
uint16_t ct_iid; /* initiator id */
uint16_t ct_rxid; /* response ID */
uint16_t ct_flags;
uint16_t ct_status; /* isp status */
uint16_t ct_timeout;
uint16_t ct_seg_count;
uint32_t ct_reloff; /* relative offset */
int32_t ct_resid; /* residual length */
union {
struct {
uint32_t _reserved;
uint16_t _reserved2;
uint16_t ct_scsi_status;
uint32_t ct_xfrlen;
union {
ispds_t ct_a[ISP_RQDSEG_T2]; /* CTIO2 */
ispds64_t ct_b[ISP_RQDSEG_T3]; /* CTIO3 */
ispdslist_t ct_c; /* CTIO4 */
} _u;
} m0;
struct {
uint16_t _reserved;
uint16_t _reserved2;
uint16_t ct_senselen;
uint16_t ct_scsi_status;
uint16_t ct_resplen;
uint8_t ct_resp[MAXRESPLEN];
} m1;
struct {
uint32_t _reserved;
uint16_t _reserved2;
uint16_t _reserved3;
uint32_t ct_datalen;
ispds_t ct_fcp_rsp_iudata;
} m2;
} rsp;
} ct2e_entry_t;
/*
* ct_flags values for CTIO2
*/
#define CT2_FLAG_MMASK 0x0003
#define CT2_FLAG_MODE0 0x0000
#define CT2_FLAG_MODE1 0x0001
#define CT2_FLAG_MODE2 0x0002
#define CT2_DATA_IN CT_DATA_IN
#define CT2_DATA_OUT CT_DATA_OUT
#define CT2_NO_DATA CT_NO_DATA
#define CT2_DATAMASK CT_DATAMASK
#define CT2_CCINCR 0x0100
#define CT2_FASTPOST 0x0200
#define CT2_TERMINATE 0x4000
#define CT2_SENDSTATUS 0x8000
/*
* ct_status values are (mostly) the same as that for ct_entry.
*/
/*
* ct_scsi_status values- the low 8 bits are the normal SCSI status
* we know and love. The upper 8 bits are validity markers for FCP_RSP_IU
* fields.
*/
#define CT2_RSPLEN_VALID 0x0100
#define CT2_SNSLEN_VALID 0x0200
#define CT2_DATA_OVER 0x0400
#define CT2_DATA_UNDER 0x0800
/*
* Debug macros
*/
#define ISP_TDQE(isp, msg, idx, arg) \
if (isp->isp_dblev & ISP_LOGTDEBUG2) isp_print_qentry(isp, msg, idx, arg)
/*
Major restructuring for swizzling to the request queue and unswizzling from the response queue. Instead of the ad hoc ISP_SWIZZLE_REQUEST, we now have a complete set of inline functions in isp_inline.h. Each platform is responsible for providing just one of a set of ISP_IOX_{GET,PUT}{8,16,32} macros. The reason this needs to be done is that we need to have a single set of functions that will work correctly on multiple architectures for both little and big endian machines. It also needs to work correctly in the case that we have the request or response queues in memory that has to be treated specially (e.g., have ddi_dma_sync called on it for Solaris after we update it or before we read from it). It also has to handle the SBus cards (for platforms that have them) which, while on a Big Endian machine, do *not* require *most* of the request/response queue entry fields to be swizzled or unswizzled. One thing that falls out of this is that we no longer build requests in the request queue itself. Instead, we build the request locally (e.g., on the stack) and then as part of the swizzling operation, copy it to the request queue entry we've allocated. I thought long and hard about whether this was too expensive a change to make as it in a lot of cases requires an extra copy. On balance, the flexbility is worth it. With any luck, the entry that we build locally stays in a processor writeback cache (after all, it's only 64 bytes) so that the cost of actually flushing it to the memory area that is the shared queue with the PCI device is not all that expensive. We may examine this again and try to get clever in the future to try and avoid copies. Another change that falls out of this is that MEMORYBARRIER should be taken a lot more seriously. The macro ISP_ADD_REQUEST does a MEMORYBARRIER on the entry being added. But there had been many other places this had been missing. It's now very important that it be done. Additional changes: Fix a longstanding buglet of sorts. When we get an entry via isp_getrqentry, the iptr value that gets returned is the value we intend to eventually plug into the ISP registers as the entry *one past* the last one we've written- *not* the current entry we're updating. All along we've been calling sync functions on the wrong index value. Argh. The 'fix' here is to rename all 'iptr' variables as 'nxti' to remember that this is the 'next' pointer- not the current pointer. Devote a single bit to mboxbsy- and set aside bits for output mbox registers that we need to pick up- we can have at least one command which does not have any defined output registers (MBOX_EXECUTE_FIRMWARE). MFC after: 2 weeks
2001-12-11 00:18:45 +00:00
* The functions below are for the publicly available
* target mode functions that are internal to the Qlogic driver.
*/
/*
* This function handles new response queue entry appropriate for target mode.
*/
int isp_target_notify(ispsoftc_t *, void *, uint16_t *);
/*
* This function externalizes the ability to acknowledge an Immediate Notify
* request.
*/
void isp_notify_ack(ispsoftc_t *, void *);
/*
* Enable/Disable/Modify a logical unit.
Spring MegaChange #1. ---- Make a device for each ISP- really usable only with devfs and add an ioctl entry point (this can be used to (re)set debug levels, reset the HBA, rescan the fabric, issue lips, etc). ---- Add in a kernel thread for Fibre Channel cards. The purpose of this thread is to be woken up to clean up after Fibre Channel events block things. Basically, any FC event that casts doubt on the location or identify of FC devices blocks the queues. When, and if, we get the PORT DATABASE CHANGED or NAME SERVER DATABASE CHANGED async event, we activate the kthread which will then, in full thread context, re-evaluate the local loop and/or the fabric. When it's satisfied that things are stable, it can then release the blocked queues and let commands flow again. The prior mechanism was a lazy evaluation. That is, the next command to come down the pipe after change events would pay the full price for re-evaluation. And if this was done off of a softcall, it really could hang up the system. These changes brings the FreeBSD port more in line with the Solaris, Linux and NetBSD ports. It also, more importantly, gets us being more proactive about topology changes which could then be reflected upwards to CAM so that the periph driver can be informed sooner rather than later when things arrive or depart. --- Add in the (correct) usage of locking macros- we now have lock transition macros which allow us to transition from holding the CAM lock (Giant) and grabbing the softc lock and vice versa. Switch over to having this HBA do real locking. Some folks claim this won't be a win. They're right. But you have to start somewhere, and this will begin to teach us how to DTRT for HBAs, etc. -- Start putting in prototype 2300 support. Add back in LIP and Loop Reset as async events that each platform will handle. Add in another int_bogus instrumentation point. Do some more substantial target mode cleanups. MFC after: 8 weeks
2001-05-28 21:20:43 +00:00
* (softc, cmd, bus, tgt, lun, cmd_cnt, inotify_cnt, opaque)
*/
#define DFLT_CMND_CNT 0xfe /* unmonitored */
#define DFLT_INOT_CNT 16
int isp_lun_cmd(ispsoftc_t *, int, int, int, int, int, int, uint32_t);
/*
* General request queue 'put' routine for target mode entries.
*/
int isp_target_put_entry(ispsoftc_t *isp, void *);
/*
* General routine to put back an ATIO entry-
* used for replenishing f/w resource counts.
* The argument is a pointer to a source ATIO
* or ATIO2.
*/
int isp_target_put_atio(ispsoftc_t *, void *);
/*
* General routine to send a final CTIO for a command- used mostly for
* local responses.
*/
int isp_endcmd(ispsoftc_t *, void *, uint32_t, uint16_t);
2000-01-15 01:48:24 +00:00
#define ECMD_SVALID 0x100
/*
* Handle an asynchronous event
*
* Return nonzero if the interrupt that generated this event has been dismissed.
*/
int isp_target_async(ispsoftc_t *, int, int);
#endif /* _ISP_TARGET_H */