161 lines
4.7 KiB
C
161 lines
4.7 KiB
C
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/*-
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* Copyright (c) 2010 Aleksandr Rybalko.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _RT_SWREG_H_
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#define _RT_SWREG_H_
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/* XXX: must move to config */
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#define RT3052F
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#define RT_SW_BASE 0x10110000
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#define RT_SW_ISR 0x00
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#define WATCHDOG1_TMR_EXPIRED (1<<29)
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#define WATCHDOG0_TMR_EXPIRED (1<<28)
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#define HAS_INTRUDER (1<<27)
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#define PORT_ST_CHG (1<<26)
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#define BC_STORM (1<<25)
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#define MUST_DROP_LAN (1<<24)
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#define GLOBAL_QUE_FULL (1<<23)
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#define LAN_QUE_FULL6 (1<<20)
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#define LAN_QUE_FULL5 (1<<19)
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#define LAN_QUE_FULL4 (1<<18)
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#define LAN_QUE_FULL3 (1<<17)
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#define LAN_QUE_FULL2 (1<<16)
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#define LAN_QUE_FULL1 (1<<15)
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#define LAN_QUE_FULL0 (1<<14)
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#define RT_SW_IMR 0x04
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#define RT_SW_FCT0 0x08
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#define RT_SW_FCT1 0x0c
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#define RT_SW_PFC0 0x10
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#define RT_SW_PFC1 0x14
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#define RT_SW_PFC2 0x18
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#define RT_SW_GQS0 0x1c
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#define RT_SW_GQS1 0x20
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#define RT_SW_ATS 0x24
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#define RT_SW_ATS0 0x28
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#define RT_SW_ATS1 0x2c
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#define RT_SW_ATS2 0x30
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#define RT_SW_WMAD0 0x34
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#define RT_SW_WMAD1 0x38
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#define RT_SW_WMAD2 0x3c
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#define RT_SW_PVIDC0 0x40
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#define RT_SW_PVIDC1 0x44
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#define RT_SW_PVIDC2 0x48
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#define RT_SW_PVIDC3 0x4c
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#define RT_SW_VID0 0x50
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#define RT_SW_VID1 0x54
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#define RT_SW_VID2 0x58
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#define RT_SW_VID3 0x5c
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#define RT_SW_VID4 0x60
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#define RT_SW_VID5 0x64
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#define RT_SW_VID6 0x68
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#define RT_SW_VID7 0x6c
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#define RT_SW_VMSC0 0x70
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#define RT_SW_VMSC1 0x74
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#define RT_SW_VMSC2 0x78
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#define RT_SW_VMSC3 0x7c
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#define RT_SW_POA 0x80
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#define RT_SW_FPA 0x84
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#define RT_SW_PTS 0x88
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#define RT_SW_SOCPC 0x8c
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#define RT_SW_POC0 0x90
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#define RT_SW_POC1 0x94
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#define RT_SW_POC2 0x98
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#define RT_SW_SGC 0x9c
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#define RT_SW_STRT 0xa0
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#define RT_SW_LEDP0 0xa4
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#define RT_SW_LEDP1 0xa8
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#define RT_SW_LEDP2 0xac
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#define RT_SW_LEDP3 0xb0
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#define RT_SW_LEDP4 0xb4
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#define RT_SW_WDTR 0xb8
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#define RT_SW_DES 0xbc
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#define RT_SW_PCR0 0xc0
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#define RT_SW_PCR1 0xc4
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#define RT_SW_FPA 0xc8
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#define RT_SW_FCT2 0xcc
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#define RT_SW_QSS0 0xd0
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#define RT_SW_QSS1 0xd4
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#define RT_SW_DEC 0xd8
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#define BRIDGE_IPG_SHIFT 24
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#define DEBUG_SW_PORT_SEL_SHIFT 3
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#define DEBUG_SW_PORT_SEL_MASK 0x00000038
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#define RT_SW_MTI 0xdc
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#define SKIP_BLOCKS_SHIFT 7
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#define SKIP_BLOCKS_MASK 0x0000ff80
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#define SW_RAM_TEST_DONE (1<<6)
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#define AT_RAM_TEST_DONE (1<<5)
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#define AT_RAM_TEST_FAIL (1<<4)
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#define LK_RAM_TEST_DONE (1<<3)
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#define LK_RAM_TEST_FAIL (1<<2)
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#define DT_RAM_TEST_DONE (1<<1)
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#define DT_RAM_TEST_FAIL (1<<0)
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#define RT_SW_PPC 0xe0
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#define SW2FE_CNT_SHIFT 16
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#define FE2SW_CNT_SHIFT 0
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#define RT_SW_SGC2 0xe4
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#define FE2SW_WL_FC_EN (1<<30)
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#define LAN_PMAP_P0_IS_LAN (1<<24)
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#define LAN_PMAP_P1_IS_LAN (1<<25)
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#define LAN_PMAP_P2_IS_LAN (1<<26)
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#define LAN_PMAP_P3_IS_LAN (1<<27)
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#define LAN_PMAP_P4_IS_LAN (1<<28)
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#define LAN_PMAP_P5_IS_LAN (1<<29)
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/* Transmit CPU TPID(810x) port bit map */
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#define TX_CPU_TPID_BIT_MAP_SHIFT 16
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#define TX_CPU_TPID_BIT_MAP_MASK 0x007f0000
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#define ARBITER_LAN_EN (1<<11)
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#define CPU_TPID_EN (1<<10)
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#define P0_DOUBLE_TAG_EN (1<<0)
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#define P1_DOUBLE_TAG_EN (1<<1)
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#define P2_DOUBLE_TAG_EN (1<<2)
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#define P3_DOUBLE_TAG_EN (1<<3)
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#define P4_DOUBLE_TAG_EN (1<<4)
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#define P5_DOUBLE_TAG_EN (1<<5)
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#define RT_SW_P0PC 0xe8
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#define RT_SW_P1PC 0xec
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#define RT_SW_P2PC 0xf0
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#define RT_SW_P3PC 0xf4
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#define RT_SW_P4PC 0xf8
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#define RT_SW_P5PC 0xfc
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#define BAD_PCOUNT_SHIFT 16
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#define BAD_PCOUNT_MASK 0xffff0000
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#define GOOD_PCOUNT_SHIFT 0
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#define GOOD_PCOUNT_MASK 0x0000ffff
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#endif /* _RT_SWREG_H_ */
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