i386: Merge PAE and non-PAE pmaps into same kernel.
Effectively all i386 kernels now have two pmaps compiled in: one
managing PAE pagetables, and another non-PAE. The implementation is
selected at cold time depending on the CPU features. The vm_paddr_t is
always 64bit now. As result, nx bit can be used on all capable CPUs.
Option PAE only affects the bus_addr_t: it is still 32bit for non-PAE
configs, for drivers compatibility. Kernel layout, esp. max kernel
address, low memory PDEs and max user address (same as trampoline
start) are now same for PAE and for non-PAE regardless of the type of
page tables used.
Non-PAE kernel (when using PAE pagetables) can handle physical memory
up to 24G now, larger memory requires re-tuning the KVA consumers and
instead the code caps the maximum at 24G. Unfortunately, a lot of
drivers do not use busdma(9) properly so by default even 4G barrier is
not easy. There are two tunables added: hw.above4g_allow and
hw.above24g_allow, the first one is kept enabled for now to evaluate
the status on HEAD, second is only for dev use.
i386 now creates three freelists if there is any memory above 4G, to
allow proper bounce pages allocation. Also, VM_KMEM_SIZE_SCALE changed
from 3 to 1.
The PAE_TABLES kernel config option is retired.
In collaboarion with: pho
Discussed with: emaste
Reviewed by: markj
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential revision: https://reviews.freebsd.org/D18894
2019-01-30 02:07:13 +00:00
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/*-
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright (c) 1991 Regents of the University of California.
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* All rights reserved.
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*
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* Copyright (c) 2018 The FreeBSD Foundation
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department and William Jolitz of UUNET Technologies Inc.
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*
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* Portions of this software were developed by
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* Konstantin Belousov <kib@FreeBSD.org> under sponsorship from
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* the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* Derived from hp300 version by Mike Hibler, this version by William
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* Jolitz uses a recursive map [a pde points to the page directory] to
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* map the page tables using the pagetables themselves. This is done to
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* reduce the impact on kernel virtual memory for lots of sparse address
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* space, and to reduce the cost of memory to each process.
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*
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* from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90
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* from: @(#)pmap.h 7.4 (Berkeley) 5/12/91
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* $FreeBSD$
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*/
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#ifndef _MACHINE_PMAP_PAE_H
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#define _MACHINE_PMAP_PAE_H
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#define NTRPPTD 2 /* Number of PTDs for trampoline
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mapping */
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#define LOWPTDI 2 /* low memory map pde */
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#define KERNPTDI 4 /* start of kernel text pde */
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#define NPGPTD 4 /* Num of pages for page directory */
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#define NPGPTD_SHIFT 9
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#undef PDRSHIFT
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#define PDRSHIFT PDRSHIFT_PAE
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#undef NBPDR
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#define NBPDR (1 << PDRSHIFT_PAE) /* bytes/page dir */
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#define PG_FRAME PG_FRAME_PAE
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#define PG_PS_FRAME PG_PS_FRAME_PAE
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/*
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* Size of Kernel address space. This is the number of page table pages
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* (4MB each) to use for the kernel. 256 pages == 1 Gigabyte.
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* This **MUST** be a multiple of 4 (eg: 252, 256, 260, etc).
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* For PAE, the page table page unit size is 2MB. This means that 512 pages
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* is 1 Gigabyte. Double everything. It must be a multiple of 8 for PAE.
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*/
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#define KVA_PAGES (512*4)
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/*
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* The initial number of kernel page table pages that are constructed
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* by pmap_cold() must be sufficient to map vm_page_array. That number can
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* be calculated as follows:
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* max_phys / PAGE_SIZE * sizeof(struct vm_page) / NBPDR
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* PAE: max_phys 16G, sizeof(vm_page) 76, NBPDR 2M, 152 page table pages.
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* PAE_TABLES: max_phys 4G, sizeof(vm_page) 68, NBPDR 2M, 36 page table pages.
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* Non-PAE: max_phys 4G, sizeof(vm_page) 68, NBPDR 4M, 18 page table pages.
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*/
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#ifndef NKPT
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#define NKPT 240
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#endif
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typedef uint64_t pdpt_entry_t;
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typedef uint64_t pd_entry_t;
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typedef uint64_t pt_entry_t;
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#define PTESHIFT (3)
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#define PDESHIFT (3)
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#define pde_cmpset(pdep, old, new) atomic_cmpset_64_i586(pdep, old, new)
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#define pte_load_store(ptep, pte) atomic_swap_64_i586(ptep, pte)
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#define pte_load_clear(ptep) atomic_swap_64_i586(ptep, 0)
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#define pte_store(ptep, pte) atomic_store_rel_64_i586(ptep, pte)
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2019-02-26 09:45:44 +00:00
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#define pte_store_zero(ptep, pte) \
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do { \
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uint32_t *p; \
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\
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MPASS((*ptep & PG_V) == 0); \
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p = (void *)ptep; \
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*(p + 1) = (uint32_t)(pte >> 32); \
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__compiler_membar(); \
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*p = (uint32_t)pte; \
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} while (0)
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i386: Merge PAE and non-PAE pmaps into same kernel.
Effectively all i386 kernels now have two pmaps compiled in: one
managing PAE pagetables, and another non-PAE. The implementation is
selected at cold time depending on the CPU features. The vm_paddr_t is
always 64bit now. As result, nx bit can be used on all capable CPUs.
Option PAE only affects the bus_addr_t: it is still 32bit for non-PAE
configs, for drivers compatibility. Kernel layout, esp. max kernel
address, low memory PDEs and max user address (same as trampoline
start) are now same for PAE and for non-PAE regardless of the type of
page tables used.
Non-PAE kernel (when using PAE pagetables) can handle physical memory
up to 24G now, larger memory requires re-tuning the KVA consumers and
instead the code caps the maximum at 24G. Unfortunately, a lot of
drivers do not use busdma(9) properly so by default even 4G barrier is
not easy. There are two tunables added: hw.above4g_allow and
hw.above24g_allow, the first one is kept enabled for now to evaluate
the status on HEAD, second is only for dev use.
i386 now creates three freelists if there is any memory above 4G, to
allow proper bounce pages allocation. Also, VM_KMEM_SIZE_SCALE changed
from 3 to 1.
The PAE_TABLES kernel config option is retired.
In collaboarion with: pho
Discussed with: emaste
Reviewed by: markj
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential revision: https://reviews.freebsd.org/D18894
2019-01-30 02:07:13 +00:00
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#define pte_load(ptep) atomic_load_acq_64_i586(ptep)
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extern pdpt_entry_t *IdlePDPT;
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extern pt_entry_t pg_nx;
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extern pd_entry_t *IdlePTD_pae; /* physical address of "Idle" state directory */
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/*
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* KPTmap is a linear mapping of the kernel page table. It differs from the
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* recursive mapping in two ways: (1) it only provides access to kernel page
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* table pages, and not user page table pages, and (2) it provides access to
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* a kernel page table page after the corresponding virtual addresses have
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* been promoted to a 2/4MB page mapping.
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*
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* KPTmap is first initialized by pmap_cold() to support just NPKT page table
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* pages. Later, it is reinitialized by pmap_bootstrap() to allow for
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* expansion of the kernel page table.
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*/
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extern pt_entry_t *KPTmap_pae;
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#endif
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