2015-02-28 19:02:44 +00:00
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.\"
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.\" Copyright (c) 2014 Luiz Otavio O Souza <loos@freebsd.org>
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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2016-02-12 17:03:24 +00:00
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.Dd February 12, 2016
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2015-02-28 19:02:44 +00:00
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.Dt DS3231 4
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.Os
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.Sh NAME
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.Nm ds3231
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.Nd Extremely Accurate i2c-integrated RTC/TCXO/Crystal
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.Sh SYNOPSIS
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.Cd "device iic"
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.Cd "device iicbus"
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.Cd "device ds3231"
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.Sh DESCRIPTION
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The
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.Nm
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is a low-cost, extremely accurate I2C realtime clock (RTC) with an
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integrated temperature-compensated crystal oscillator (TCXO) and crystal.
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.Pp
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The device incorporates a battery input and maintains accurate timekeeping
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when main power to the device is interrupted.
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.Pp
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Access to
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.Nm
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data is made with the
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.Xr sysctl 8
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interface:
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.Bd -literal
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dev.ds3231.0.%desc: Maxim DS3231 RTC
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dev.ds3231.0.%driver: ds3231
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dev.ds3231.0.%location: addr=0xd0
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dev.ds3231.0.%pnpinfo: name=rtc compat=maxim,ds3231
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dev.ds3231.0.%parent: iicbus1
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dev.ds3231.0.temperature: 23.2C
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dev.ds3231.0.temp_conv: 0
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dev.ds3231.0.bbsqw: 0
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dev.ds3231.0.sqw_freq: 8192
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dev.ds3231.0.sqw_mode: interrupt
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dev.ds3231.0.32khz_enable: 1
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.Ed
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.Bl -tag -width ".Va dev.ds3231.%d.temperature"
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.It Va dev.ds3231.%d.temperature
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The read-only value of the current temperature read by the RTC.
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.It Va dev.ds3231.%d.temp_conv
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2016-05-01 22:00:41 +00:00
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Start a new temperature conversion.
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2015-02-28 19:02:44 +00:00
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When read as 1, a temperature conversion is in progress.
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2016-05-01 22:00:41 +00:00
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When read as 0 and then set to 1, a temperature conversion is started.
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2015-02-28 19:02:44 +00:00
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The temperature conversion runs automatically on power up and once every 64
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seconds afterward.
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.It Va dev.ds3231.%d.bbsqw
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If set to 1 and
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.Va dev.ds3231.%d.sqw_mode
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is set to square-wave, battery-backed square-wave output is enabled.
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If set to 0, the SQW pin will be set to high impendance when the RTC is
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being powered by battery.
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.It Va dev.ds3231.%d.sqw_freq
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Select the frequency of the SQW pin when the square-wave output is enabled on
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.Va dev.ds3231.%d.sqw_mode .
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It can be set to 1, 1024, 4096, and 8192.
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.It Va dev.ds3231.%d.sqw_mode
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Set the operation mode for the SQW pin.
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It can be set to 'interrupt' (default) or 'square-wave'.
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In interrupt mode, the SQW pin is used to generate interrupts for the RTC
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alarms.
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In square-wave mode, the SQW pin drives a square-wave of
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.Va dev.ds3231.%d.sqw_freq
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frequency.
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.It Va dev.ds3231.%d.32khz_enable
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Enable the 32kHz output.
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.El
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.Pp
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Please check the
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.Nm
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datasheet for more details.
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.Pp
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On a
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.Xr device.hints 5
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based system, such as
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.Li MIPS ,
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these values are configurable for
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.Nm :
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.Bl -tag -width ".Va hint.ds3231.%d.addr"
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.It Va hint.ds3231.%d.at
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The
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.Xr iicbus 4
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that the
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.Nm
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is connected to.
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.It Va hint.ds3231.%d.addr
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2016-02-12 16:59:42 +00:00
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The 8-bit i2c address of
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2015-02-28 19:02:44 +00:00
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.Nm .
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2016-02-12 16:59:42 +00:00
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The default 8-bit address for
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.Nm
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is 0xd0.
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2015-02-28 19:02:44 +00:00
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.El
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.Pp
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On a
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.Xr FDT 4
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based system the following properties must be set:
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.Bl -tag -width ".Va compatible"
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.It Va compatible
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Must always be set to "maxim,ds3231".
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.It Va reg
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2016-02-12 16:59:42 +00:00
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The 7-bit i2c address of
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2015-02-28 19:02:44 +00:00
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.Nm .
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2016-02-12 16:59:42 +00:00
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The default 7-bit address for
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2015-02-28 19:02:44 +00:00
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.Nm
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2016-02-12 16:59:42 +00:00
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is 0x68.
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2015-02-28 19:02:44 +00:00
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.El
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.Sh SEE ALSO
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.Xr fdt 4 ,
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.Xr iic 4 ,
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.Xr iicbus 4 ,
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.Xr sysctl 8
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.Sh HISTORY
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The
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.Nm
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driver first appeared in
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.Fx 11.0 .
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.Sh AUTHORS
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.An -nosplit
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The
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.Nm
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driver and this manual page were written by
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.An Luiz Otavio O Souza Aq Mt loos@FreeBSD.org .
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