From 00d829dae72922c7f3ab02007e42bc4edcf671ae Mon Sep 17 00:00:00 2001 From: Adrian Chadd Date: Tue, 25 Oct 2011 23:17:53 +0000 Subject: [PATCH] Correct/complete a partially-disabled TX interrupt mitigation configuration. Although a previous commit disabled TX interrupt mitigation handling and configuration, the mask register bits weren't setup correctly. --- sys/dev/ath/ath_hal/ar5416/ar5416_reset.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c b/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c index f05840aebba3..97d292e91ab8 100644 --- a/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c +++ b/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c @@ -358,12 +358,12 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMODE opmode, */ OS_REG_WRITE(ah, AR_OBS, 8); -#ifdef AH_AR5416_INTERRUPT_MITIGATION /* * Disable the "general" TX/RX mitigation timers. */ OS_REG_WRITE(ah, AR_MIRT, 0); +#ifdef AH_AR5416_INTERRUPT_MITIGATION /* * This initialises the RX interrupt mitigation timers. * @@ -631,11 +631,11 @@ ar5416InitIMR(struct ath_hal *ah, HAL_OPMODE opmode) | AR_IMR_BCNMISC; #ifdef AH_AR5416_INTERRUPT_MITIGATION - ahp->ah_maskReg |= AR_IMR_TXINTM | AR_IMR_RXINTM - | AR_IMR_TXMINTR | AR_IMR_RXMINTR; + ahp->ah_maskReg |= AR_IMR_RXINTM | AR_IMR_RXMINTR; #else - ahp->ah_maskReg |= AR_IMR_TXOK | AR_IMR_RXOK; + ahp->ah_maskReg |= AR_IMR_RXOK; #endif + ahp->ah_maskReg |= AR_IMR_TXOK; if (opmode == HAL_M_HOSTAP) ahp->ah_maskReg |= AR_IMR_MIB;