fixup r365398: add a missed file with all the new Allwinner musb_otg code
Obtained from: andrew MFC after: 5 weeks X-MFC with: r365398
This commit is contained in:
Andriy Gapon
parent
d9a65ba85b
commit
029e367dd1
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=365399
543
sys/dev/usb/controller/musb_otg_allwinner.c
Normal file
543
sys/dev/usb/controller/musb_otg_allwinner.c
Normal file
@ -0,0 +1,543 @@
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/*-
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* Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
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* Copyright (c) 2018 Andrew Turner <andrew@FreeBSD.org>
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* All rights reserved.
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
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* ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* Allwinner USB Dual-Role Device (DRD) controller
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/kernel.h>
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#include <sys/condvar.h>
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#include <sys/module.h>
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#include <machine/bus.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/usb/usb.h>
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#include <dev/usb/usbdi.h>
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#include <dev/usb/usb_core.h>
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#include <dev/usb/usb_busdma.h>
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#include <dev/usb/usb_process.h>
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#include <dev/usb/usb_util.h>
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#include <dev/usb/usb_controller.h>
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#include <dev/usb/usb_bus.h>
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#include <dev/usb/controller/musb_otg.h>
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#include <dev/extres/clk/clk.h>
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#include <dev/extres/hwreset/hwreset.h>
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#ifdef __arm__
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#include <arm/allwinner/aw_machdep.h>
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#include <arm/allwinner/a10_sramc.h>
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#endif
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#define DRD_EP_MAX 5
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#define MUSB2_REG_AWIN_VEND0 0x0043
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#define VEND0_PIO_MODE 0
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#if defined(__arm__)
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#define bs_parent_space(bs) ((bs)->bs_parent)
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typedef bus_space_tag_t awusb_bs_tag;
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#elif defined(__aarch64__)
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#define bs_parent_space(bs) (bs)
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typedef void * awusb_bs_tag;
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#endif
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#define AWUSB_OKAY 0x01
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#define AWUSB_NO_CONFDATA 0x02
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static struct ofw_compat_data compat_data[] = {
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{ "allwinner,sun4i-a10-musb", AWUSB_OKAY },
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{ "allwinner,sun6i-a31-musb", AWUSB_OKAY },
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{ "allwinner,sun8i-a33-musb", AWUSB_OKAY | AWUSB_NO_CONFDATA },
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{ NULL, 0 }
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};
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static const struct musb_otg_ep_cfg musbotg_ep_allwinner[] = {
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{
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.ep_end = 5,
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.ep_fifosz_shift = 9,
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.ep_fifosz_reg = MUSB2_VAL_FIFOSZ_512,
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},
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{
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.ep_end = -1,
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},
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};
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struct awusbdrd_softc {
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struct musbotg_softc sc;
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struct resource *res[2];
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clk_t clk;
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hwreset_t reset;
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struct bus_space bs;
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int flags;
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};
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static struct resource_spec awusbdrd_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ SYS_RES_IRQ, 0, RF_ACTIVE },
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{ -1, 0 }
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};
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#define REMAPFLAG 0x8000
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#define REGDECL(a, b) [(a)] = ((b) | REMAPFLAG)
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/* Allwinner USB DRD register mappings */
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static const uint16_t awusbdrd_regmap[] = {
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REGDECL(MUSB2_REG_EPFIFO(0), 0x0000),
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REGDECL(MUSB2_REG_EPFIFO(1), 0x0004),
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REGDECL(MUSB2_REG_EPFIFO(2), 0x0008),
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REGDECL(MUSB2_REG_EPFIFO(3), 0x000c),
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REGDECL(MUSB2_REG_EPFIFO(4), 0x0010),
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REGDECL(MUSB2_REG_EPFIFO(5), 0x0014),
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REGDECL(MUSB2_REG_POWER, 0x0040),
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REGDECL(MUSB2_REG_DEVCTL, 0x0041),
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REGDECL(MUSB2_REG_EPINDEX, 0x0042),
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REGDECL(MUSB2_REG_INTTX, 0x0044),
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REGDECL(MUSB2_REG_INTRX, 0x0046),
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REGDECL(MUSB2_REG_INTTXE, 0x0048),
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REGDECL(MUSB2_REG_INTRXE, 0x004a),
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REGDECL(MUSB2_REG_INTUSB, 0x004c),
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REGDECL(MUSB2_REG_INTUSBE, 0x0050),
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REGDECL(MUSB2_REG_FRAME, 0x0054),
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REGDECL(MUSB2_REG_TESTMODE, 0x007c),
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REGDECL(MUSB2_REG_TXMAXP, 0x0080),
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REGDECL(MUSB2_REG_TXCSRL, 0x0082),
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REGDECL(MUSB2_REG_TXCSRH, 0x0083),
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REGDECL(MUSB2_REG_RXMAXP, 0x0084),
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REGDECL(MUSB2_REG_RXCSRL, 0x0086),
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REGDECL(MUSB2_REG_RXCSRH, 0x0087),
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REGDECL(MUSB2_REG_RXCOUNT, 0x0088),
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REGDECL(MUSB2_REG_TXTI, 0x008c),
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REGDECL(MUSB2_REG_TXNAKLIMIT, 0x008d),
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REGDECL(MUSB2_REG_RXNAKLIMIT, 0x008f),
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REGDECL(MUSB2_REG_RXTI, 0x008e),
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REGDECL(MUSB2_REG_TXFIFOSZ, 0x0090),
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REGDECL(MUSB2_REG_TXFIFOADD, 0x0092),
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REGDECL(MUSB2_REG_RXFIFOSZ, 0x0094),
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REGDECL(MUSB2_REG_RXFIFOADD, 0x0096),
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REGDECL(MUSB2_REG_FADDR, 0x0098),
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REGDECL(MUSB2_REG_TXFADDR(0), 0x0098),
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REGDECL(MUSB2_REG_TXHADDR(0), 0x009a),
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REGDECL(MUSB2_REG_TXHUBPORT(0), 0x009b),
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REGDECL(MUSB2_REG_RXFADDR(0), 0x009c),
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REGDECL(MUSB2_REG_RXHADDR(0), 0x009e),
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REGDECL(MUSB2_REG_RXHUBPORT(0), 0x009f),
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REGDECL(MUSB2_REG_TXFADDR(1), 0x0098),
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REGDECL(MUSB2_REG_TXHADDR(1), 0x009a),
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REGDECL(MUSB2_REG_TXHUBPORT(1), 0x009b),
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REGDECL(MUSB2_REG_RXFADDR(1), 0x009c),
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REGDECL(MUSB2_REG_RXHADDR(1), 0x009e),
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REGDECL(MUSB2_REG_RXHUBPORT(1), 0x009f),
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REGDECL(MUSB2_REG_TXFADDR(2), 0x0098),
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REGDECL(MUSB2_REG_TXHADDR(2), 0x009a),
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REGDECL(MUSB2_REG_TXHUBPORT(2), 0x009b),
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REGDECL(MUSB2_REG_RXFADDR(2), 0x009c),
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REGDECL(MUSB2_REG_RXHADDR(2), 0x009e),
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REGDECL(MUSB2_REG_RXHUBPORT(2), 0x009f),
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REGDECL(MUSB2_REG_TXFADDR(3), 0x0098),
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REGDECL(MUSB2_REG_TXHADDR(3), 0x009a),
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REGDECL(MUSB2_REG_TXHUBPORT(3), 0x009b),
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REGDECL(MUSB2_REG_RXFADDR(3), 0x009c),
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REGDECL(MUSB2_REG_RXHADDR(3), 0x009e),
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REGDECL(MUSB2_REG_RXHUBPORT(3), 0x009f),
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REGDECL(MUSB2_REG_TXFADDR(4), 0x0098),
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REGDECL(MUSB2_REG_TXHADDR(4), 0x009a),
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REGDECL(MUSB2_REG_TXHUBPORT(4), 0x009b),
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REGDECL(MUSB2_REG_RXFADDR(4), 0x009c),
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REGDECL(MUSB2_REG_RXHADDR(4), 0x009e),
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REGDECL(MUSB2_REG_RXHUBPORT(4), 0x009f),
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REGDECL(MUSB2_REG_TXFADDR(5), 0x0098),
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REGDECL(MUSB2_REG_TXHADDR(5), 0x009a),
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REGDECL(MUSB2_REG_TXHUBPORT(5), 0x009b),
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REGDECL(MUSB2_REG_RXFADDR(5), 0x009c),
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REGDECL(MUSB2_REG_RXHADDR(5), 0x009e),
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REGDECL(MUSB2_REG_RXHUBPORT(5), 0x009f),
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REGDECL(MUSB2_REG_CONFDATA, 0x00c0),
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};
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static bus_size_t
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awusbdrd_reg(bus_size_t o)
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{
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bus_size_t v;
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KASSERT(o < nitems(awusbdrd_regmap),
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("%s: Invalid register %#lx", __func__, o));
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if (o >= nitems(awusbdrd_regmap))
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return (o);
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v = awusbdrd_regmap[o];
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KASSERT((v & REMAPFLAG) != 0, ("%s: reg %#lx not in regmap",
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__func__, o));
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return (v & ~REMAPFLAG);
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}
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static int
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awusbdrd_filt(bus_size_t o)
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{
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switch (o) {
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case MUSB2_REG_MISC:
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case MUSB2_REG_RXDBDIS:
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case MUSB2_REG_TXDBDIS:
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return (1);
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default:
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return (0);
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}
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}
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static uint8_t
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awusbdrd_bs_r_1(awusb_bs_tag t, bus_space_handle_t h, bus_size_t o)
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{
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const struct bus_space *bs = t;
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switch (o) {
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case MUSB2_REG_HWVERS:
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return (0); /* no known equivalent */
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}
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return (bus_space_read_1(bs_parent_space(bs), h, awusbdrd_reg(o)));
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}
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static uint8_t
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awusbdrd_bs_r_1_noconf(awusb_bs_tag t, bus_space_handle_t h, bus_size_t o)
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{
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/*
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* There is no confdata register on some SoCs, return the same
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* magic value as Linux.
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*/
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if (o == MUSB2_REG_CONFDATA)
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return (0xde);
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return (awusbdrd_bs_r_1(t, h, o));
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}
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static uint16_t
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awusbdrd_bs_r_2(awusb_bs_tag t, bus_space_handle_t h, bus_size_t o)
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{
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const struct bus_space *bs = t;
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return bus_space_read_2(bs_parent_space(bs), h, awusbdrd_reg(o));
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}
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static void
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awusbdrd_bs_w_1(awusb_bs_tag t, bus_space_handle_t h, bus_size_t o,
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uint8_t v)
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{
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const struct bus_space *bs = t;
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if (awusbdrd_filt(o) != 0)
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return;
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bus_space_write_1(bs_parent_space(bs), h, awusbdrd_reg(o), v);
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}
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static void
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awusbdrd_bs_w_2(awusb_bs_tag t, bus_space_handle_t h, bus_size_t o,
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uint16_t v)
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{
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const struct bus_space *bs = t;
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if (awusbdrd_filt(o) != 0)
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return;
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bus_space_write_2(bs_parent_space(bs), h, awusbdrd_reg(o), v);
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}
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static void
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awusbdrd_bs_rm_1(awusb_bs_tag t, bus_space_handle_t h, bus_size_t o,
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uint8_t *d, bus_size_t c)
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{
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const struct bus_space *bs = t;
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bus_space_read_multi_1(bs_parent_space(bs), h, awusbdrd_reg(o), d, c);
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}
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static void
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awusbdrd_bs_rm_4(awusb_bs_tag t, bus_space_handle_t h, bus_size_t o,
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uint32_t *d, bus_size_t c)
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{
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const struct bus_space *bs = t;
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bus_space_read_multi_4(bs_parent_space(bs), h, awusbdrd_reg(o), d, c);
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}
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static void
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awusbdrd_bs_wm_1(awusb_bs_tag t, bus_space_handle_t h, bus_size_t o,
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const uint8_t *d, bus_size_t c)
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{
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const struct bus_space *bs = t;
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if (awusbdrd_filt(o) != 0)
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return;
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bus_space_write_multi_1(bs_parent_space(bs), h, awusbdrd_reg(o), d, c);
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}
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static void
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awusbdrd_bs_wm_4(awusb_bs_tag t, bus_space_handle_t h, bus_size_t o,
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const uint32_t *d, bus_size_t c)
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{
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const struct bus_space *bs = t;
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if (awusbdrd_filt(o) != 0)
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return;
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bus_space_write_multi_4(bs_parent_space(bs), h, awusbdrd_reg(o), d, c);
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}
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static void
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awusbdrd_intr(void *arg)
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{
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struct awusbdrd_softc *sc = arg;
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uint8_t intusb;
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uint16_t inttx, intrx;
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intusb = MUSB2_READ_1(&sc->sc, MUSB2_REG_INTUSB);
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inttx = MUSB2_READ_2(&sc->sc, MUSB2_REG_INTTX);
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intrx = MUSB2_READ_2(&sc->sc, MUSB2_REG_INTRX);
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if (intusb == 0 && inttx == 0 && intrx == 0)
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return;
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if (intusb)
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MUSB2_WRITE_1(&sc->sc, MUSB2_REG_INTUSB, intusb);
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if (inttx)
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MUSB2_WRITE_2(&sc->sc, MUSB2_REG_INTTX, inttx);
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if (intrx)
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MUSB2_WRITE_2(&sc->sc, MUSB2_REG_INTRX, intrx);
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musbotg_interrupt(arg, intrx, inttx, intusb);
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}
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static int
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awusbdrd_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "Allwinner USB DRD");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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awusbdrd_attach(device_t dev)
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{
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struct awusbdrd_softc *sc;
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int error;
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sc = device_get_softc(dev);
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sc->flags = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
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error = bus_alloc_resources(dev, awusbdrd_spec, sc->res);
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if (error != 0)
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return (error);
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/* AHB gate clock is required */
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error = clk_get_by_ofw_index(dev, 0, 0, &sc->clk);
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if (error != 0)
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goto fail;
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/* AHB reset is only present on some SoCs */
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(void)hwreset_get_by_ofw_idx(dev, 0, 0, &sc->reset);
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/* Enable clocks */
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error = clk_enable(sc->clk);
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if (error != 0) {
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device_printf(dev, "failed to enable clock: %d\n", error);
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goto fail;
|
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}
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if (sc->reset != NULL) {
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error = hwreset_deassert(sc->reset);
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if (error != 0) {
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device_printf(dev, "failed to de-assert reset: %d\n",
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error);
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goto fail;
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}
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}
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sc->sc.sc_bus.parent = dev;
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sc->sc.sc_bus.devices = sc->sc.sc_devices;
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sc->sc.sc_bus.devices_max = MUSB2_MAX_DEVICES;
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sc->sc.sc_bus.dma_bits = 32;
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error = usb_bus_mem_alloc_all(&sc->sc.sc_bus, USB_GET_DMA_TAG(dev),
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NULL);
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if (error != 0) {
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error = ENOMEM;
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goto fail;
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}
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#if defined(__arm__)
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sc->bs.bs_parent = rman_get_bustag(sc->res[0]);
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#elif defined(__aarch64__)
|
||||
sc->bs.bs_cookie = rman_get_bustag(sc->res[0]);
|
||||
#endif
|
||||
|
||||
if ((sc->flags & AWUSB_NO_CONFDATA) == AWUSB_NO_CONFDATA)
|
||||
sc->bs.bs_r_1 = awusbdrd_bs_r_1_noconf;
|
||||
else
|
||||
sc->bs.bs_r_1 = awusbdrd_bs_r_1;
|
||||
sc->bs.bs_r_2 = awusbdrd_bs_r_2;
|
||||
sc->bs.bs_w_1 = awusbdrd_bs_w_1;
|
||||
sc->bs.bs_w_2 = awusbdrd_bs_w_2;
|
||||
sc->bs.bs_rm_1 = awusbdrd_bs_rm_1;
|
||||
sc->bs.bs_rm_4 = awusbdrd_bs_rm_4;
|
||||
sc->bs.bs_wm_1 = awusbdrd_bs_wm_1;
|
||||
sc->bs.bs_wm_4 = awusbdrd_bs_wm_4;
|
||||
|
||||
sc->sc.sc_io_tag = &sc->bs;
|
||||
sc->sc.sc_io_hdl = rman_get_bushandle(sc->res[0]);
|
||||
sc->sc.sc_io_size = rman_get_size(sc->res[0]);
|
||||
|
||||
sc->sc.sc_bus.bdev = device_add_child(dev, "usbus", -1);
|
||||
if (sc->sc.sc_bus.bdev == NULL) {
|
||||
error = ENXIO;
|
||||
goto fail;
|
||||
}
|
||||
device_set_ivars(sc->sc.sc_bus.bdev, &sc->sc.sc_bus);
|
||||
sc->sc.sc_id = 0;
|
||||
sc->sc.sc_platform_data = sc;
|
||||
sc->sc.sc_mode = MUSB2_HOST_MODE; /* XXX HOST vs DEVICE mode */
|
||||
sc->sc.sc_ep_max = DRD_EP_MAX;
|
||||
sc->sc.sc_ep_cfg = musbotg_ep_allwinner;
|
||||
|
||||
error = bus_setup_intr(dev, sc->res[1], INTR_MPSAFE | INTR_TYPE_BIO,
|
||||
NULL, awusbdrd_intr, sc, &sc->sc.sc_intr_hdl);
|
||||
if (error != 0)
|
||||
goto fail;
|
||||
|
||||
/* Enable PIO mode */
|
||||
bus_write_1(sc->res[0], MUSB2_REG_AWIN_VEND0, VEND0_PIO_MODE);
|
||||
|
||||
#ifdef __arm__
|
||||
/* Map SRAMD area to USB0 (sun4i/sun7i only) */
|
||||
switch (allwinner_soc_family()) {
|
||||
case ALLWINNERSOC_SUN4I:
|
||||
case ALLWINNERSOC_SUN7I:
|
||||
a10_map_to_otg();
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
|
||||
error = musbotg_init(&sc->sc);
|
||||
if (error != 0)
|
||||
goto fail;
|
||||
|
||||
error = device_probe_and_attach(sc->sc.sc_bus.bdev);
|
||||
if (error != 0)
|
||||
goto fail;
|
||||
|
||||
musbotg_vbus_interrupt(&sc->sc, 1); /* XXX VBUS */
|
||||
|
||||
return (0);
|
||||
|
||||
fail:
|
||||
if (sc->reset != NULL)
|
||||
hwreset_release(sc->reset);
|
||||
if (sc->clk != NULL)
|
||||
clk_release(sc->clk);
|
||||
bus_release_resources(dev, awusbdrd_spec, sc->res);
|
||||
return (error);
|
||||
}
|
||||
|
||||
static int
|
||||
awusbdrd_detach(device_t dev)
|
||||
{
|
||||
struct awusbdrd_softc *sc;
|
||||
device_t bdev;
|
||||
int error;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
|
||||
if (sc->sc.sc_bus.bdev != NULL) {
|
||||
bdev = sc->sc.sc_bus.bdev;
|
||||
device_detach(bdev);
|
||||
device_delete_child(dev, bdev);
|
||||
}
|
||||
|
||||
musbotg_uninit(&sc->sc);
|
||||
error = bus_teardown_intr(dev, sc->res[1], sc->sc.sc_intr_hdl);
|
||||
if (error != 0)
|
||||
return (error);
|
||||
|
||||
usb_bus_mem_free_all(&sc->sc.sc_bus, NULL);
|
||||
|
||||
if (sc->reset != NULL)
|
||||
hwreset_release(sc->reset);
|
||||
if (sc->clk != NULL)
|
||||
clk_release(sc->clk);
|
||||
|
||||
bus_release_resources(dev, awusbdrd_spec, sc->res);
|
||||
|
||||
device_delete_children(dev);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static device_method_t awusbdrd_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, awusbdrd_probe),
|
||||
DEVMETHOD(device_attach, awusbdrd_attach),
|
||||
DEVMETHOD(device_detach, awusbdrd_detach),
|
||||
DEVMETHOD(device_suspend, bus_generic_suspend),
|
||||
DEVMETHOD(device_resume, bus_generic_resume),
|
||||
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
||||
|
||||
DEVMETHOD_END
|
||||
};
|
||||
|
||||
static driver_t awusbdrd_driver = {
|
||||
.name = "musbotg",
|
||||
.methods = awusbdrd_methods,
|
||||
.size = sizeof(struct awusbdrd_softc),
|
||||
};
|
||||
|
||||
static devclass_t awusbdrd_devclass;
|
||||
|
||||
DRIVER_MODULE(musbotg, simplebus, awusbdrd_driver, awusbdrd_devclass, 0, 0);
|
||||
MODULE_DEPEND(musbotg, usb, 1, 1, 1);
|
||||
Loading…
Reference in New Issue
Block a user