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riscv: zero reserved PTE bits for L2 PTEs

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As was done for L3 PTEs in r362853, mask out the reserved bits when
extracting the physical address from an L2 PTE. Future versions of the
spec or custom implementations may make use of these reserved bits, in
which case the resulting physical address could be incorrect.

Submitted by:	Nathaniel Filardo <nwf20@cl.cam.ac.uk>
Reviewed by:	kp, mhorne
Differential Revision:	https://reviews.freebsd.org/D26607
This commit is contained in:
Mitchell Horne 2020-10-17 17:31:06 +00:00
parent e98c3bc667
commit 02a37049b4
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=366794
1 changed files with 5 additions and 3 deletions
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8
sys/riscv/riscv/pmap.c
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@ -342,6 +342,8 @@ pagezero(void *p)
#define PTE_TO_PHYS(pte) \
((((pte) & ~PTE_HI_MASK) >> PTE_PPN0_S) * PAGE_SIZE)
#define L2PTE_TO_PHYS(l2) \
((((l2) & ~PTE_HI_MASK) >> PTE_PPN1_S) << L2_SHIFT)
static __inline pd_entry_t *
pmap_l1(pmap_t pmap, vm_offset_t va)
@ -477,7 +479,7 @@ pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
("Invalid bootstrap L2 table"));
/* L2 is superpages */
ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
ret = L2PTE_TO_PHYS(l2[l2_slot]);
ret += (va & L2_OFFSET);
return (ret);
@ -825,7 +827,7 @@ pmap_extract(pmap_t pmap, vm_offset_t va)
}
} else {
/* L2 is superpages */
pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
pa = L2PTE_TO_PHYS(l2);
pa |= (va & L2_OFFSET);
}
}
@ -877,7 +879,7 @@ pmap_kextract(vm_offset_t va)
panic("pmap_kextract: No l2");
if ((pmap_load(l2) & PTE_RX) != 0) {
/* superpages */
pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
pa = L2PTE_TO_PHYS(pmap_load(l2));
pa |= (va & L2_OFFSET);
return (pa);
}