FCP-101: Remove wb(4)
Relnotes: yes FCP: https://github.com/freebsd/fcp/blob/master/fcp-0101.md Reviewed by: jhb, imp Differential Revision: https://reviews.freebsd.org/D20230
This commit is contained in:
Brooks Davis
parent
e8504bf9e7
commit
02fae06a11
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=347922
@ -61,6 +61,7 @@ OLD_FILES+=usr/share/man/man4/if_tx.4
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OLD_FILES+=usr/share/man/man4/txp.4
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OLD_FILES+=usr/share/man/man4/if_txp.4
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OLD_FILES+=usr/share/man/man4/vx.4
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OLD_FILES+=usr/share/man/man4/wb.4
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# 20190513: libcap_sysctl interface change
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OLD_FILES+=lib/casper/libcap_sysctl.1
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# 20190509: tests/sys/opencrypto requires the net/py-dpkt package.
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@ -550,7 +550,6 @@ MAN= aac.4 \
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vte.4 \
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${_vtnet.4} \
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watchdog.4 \
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wb.4 \
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${_wbwd.4} \
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wi.4 \
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witness.4 \
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@ -725,7 +724,6 @@ MLINKS+=vr.4 if_vr.4
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MLINKS+=vte.4 if_vte.4
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MLINKS+=${_vtnet.4} ${_if_vtnet.4}
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MLINKS+=watchdog.4 SW_WATCHDOG.4
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MLINKS+=wb.4 if_wb.4
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MLINKS+=wi.4 if_wi.4
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MLINKS+=${_wpi.4} ${_if_wpi.4}
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MLINKS+=xe.4 if_xe.4
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@ -1,204 +0,0 @@
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.\" Copyright (c) 1997, 1998
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.\" Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\" 3. All advertising materials mentioning features or use of this software
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.\" must display the following acknowledgement:
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.\" This product includes software developed by Bill Paul.
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.\" 4. Neither the name of the author nor the names of any co-contributors
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.\" may be used to endorse or promote products derived from this software
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.\" without specific prior written permission.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
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.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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.\" THE POSSIBILITY OF SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd October 24, 2018
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.Dt WB 4
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.Os
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.Sh NAME
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.Nm wb
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.Nd "Winbond W89C840F Fast Ethernet device driver"
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.Sh SYNOPSIS
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To compile this driver into the kernel,
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place the following lines in your
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kernel configuration file:
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.Bd -ragged -offset indent
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.Cd "device miibus"
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.Cd "device wb"
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.Ed
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.Pp
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Alternatively, to load the driver as a
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module at boot time, place the following line in
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.Xr loader.conf 5 :
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.Bd -literal -offset indent
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if_wb_load="YES"
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.Ed
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.Sh DEPRECATION NOTICE
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The
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.Nm
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driver is not present in
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.Fx 13.0
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and later.
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See https://github.com/freebsd/fcp/blob/master/fcp-0101.md for more
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information.
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.Sh DESCRIPTION
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The
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.Nm
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driver provides support for PCI Ethernet adapters and embedded
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controllers based on the Winbond W89C840F Fast Ethernet controller
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chip.
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The 840F should not be confused with the 940F, which is
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an NE2000 clone and only supports 10Mbps speeds.
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.Pp
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The Winbond controller uses bus master DMA and is designed to be
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a DEC 'tulip' workalike.
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It differs from the standard DEC design
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in several ways: the control and status registers are spaced 4
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bytes apart instead of 8, and the receive filter is programmed through
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registers rather than by downloading a special setup frame via
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the transmit DMA engine.
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Using an external PHY, the Winbond chip
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supports both 10 and 100Mbps speeds in either full or half duplex.
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.Pp
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The
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.Nm
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driver supports the following media types:
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.Bl -tag -width xxxxxxxxxxxxxxxxxxxx
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.It autoselect
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Enable autoselection of the media type and options.
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This is only
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supported if the PHY chip attached to the Winbond controller
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supports NWAY autonegotiation.
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The user can manually override
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the autoselected mode by adding media options to the
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.Pa /etc/rc.conf
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file.
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.It 10baseT/UTP
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Set 10Mbps operation.
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The
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.Ar mediaopt
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option can also be used to select either
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.Ar full-duplex
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or
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.Ar half-duplex
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modes.
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.It 100baseTX
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Set 100Mbps (Fast Ethernet) operation.
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The
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.Ar mediaopt
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option can also be used to select either
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.Ar full-duplex
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or
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.Ar half-duplex
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modes.
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.El
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.Pp
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The
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.Nm
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driver supports the following media options:
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.Bl -tag -width xxxxxxxxxxxxxxxxxxxx
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.It full-duplex
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Force full duplex operation.
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.It half-duplex
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Force half duplex operation.
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.El
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.Pp
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Note that the 100baseTX media type is only available if supported
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by the adapter.
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For more information on configuring this device, see
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.Xr ifconfig 8 .
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.Sh HARDWARE
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The
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.Nm
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driver supports Winbond W89C840F based Fast Ethernet
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adapters and embedded controllers including:
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.Pp
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.Bl -bullet -compact
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.It
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Trendware TE100-PCIE
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.El
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.Sh DIAGNOSTICS
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.Bl -diag
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.It "wb%d: couldn't map memory"
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A fatal initialization error has occurred.
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.It "wb%d: couldn't map interrupt"
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A fatal initialization error has occurred.
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.It "wb%d: watchdog timeout"
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The device has stopped responding to the network, or there is a problem with
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the network connection (cable).
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.It "wb%d: no memory for rx list"
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The driver failed to allocate an mbuf for the receiver ring.
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.It "wb%d: no memory for tx list"
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The driver failed to allocate an mbuf for the transmitter ring when
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allocating a pad buffer or collapsing an mbuf chain into a cluster.
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.It "wb%d: chip is in D3 power state -- setting to D0"
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This message applies only to adapters which support power
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management.
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Some operating systems place the controller in low power
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mode when shutting down, and some PCI BIOSes fail to bring the chip
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out of this state before configuring it.
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The controller loses all of
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its PCI configuration in the D3 state, so if the BIOS does not set
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it back to full power mode in time, it will not be able to configure it
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correctly.
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The driver tries to detect this condition and bring
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the adapter back to the D0 (full power) state, but this may not be
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enough to return the driver to a fully operational condition.
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If
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you see this message at boot time and the driver fails to attach
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the device as a network interface, you will have to perform second
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warm boot to have the device properly configured.
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.Pp
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Note that this condition only occurs when warm booting from another
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operating system.
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If you power down your system prior to booting
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.Fx ,
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the card should be configured correctly.
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.El
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.Sh SEE ALSO
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.Xr arp 4 ,
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.Xr miibus 4 ,
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.Xr netintro 4 ,
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.Xr ng_ether 4 ,
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.Xr ifconfig 8
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.Sh HISTORY
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The
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.Nm
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device driver first appeared in
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.Fx 3.0 .
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.Sh AUTHORS
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The
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.Nm
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driver was written by
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.An Bill Paul Aq Mt wpaul@ctr.columbia.edu .
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.Sh BUGS
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The Winbond chip seems to behave strangely in some cases when the
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link partner switches modes.
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If for example both sides are set to
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10Mbps half-duplex, and the other end is changed to 100Mbps
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full-duplex, the Winbond's receiver suddenly starts writing trash
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all over the RX descriptors.
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The
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.Nm
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driver handles this by forcing a reset of both the controller
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chip and attached PHY.
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This is drastic, but it appears to be the
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only way to recover properly from this condition.
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@ -278,7 +278,6 @@ device ste # Sundance ST201 (D-Link DFE-550TX)
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device stge # Sundance/Tamarack TC9021 gigabit Ethernet
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device vge # VIA VT612x gigabit Ethernet
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device vr # VIA Rhine, Rhine II
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device wb # Winbond W89C840F
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device xl # 3Com 3c90x (``Boomerang'', ``Cyclone'')
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# Wireless NIC cards
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@ -2000,9 +2000,6 @@ device xmphy # XaQti XMAC II
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# including the D-Link DFE520TX and D-Link DFE530TX (see 'rl' for
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# DFE530TX+), the Hawking Technologies PN102TX, and the AOpen/Acer ALN-320.
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# vte: DM&P Vortex86 RDC R6040 Fast Ethernet
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# wb: Support for fast ethernet adapters based on the Winbond W89C840F chip.
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# Note: this is not the same as the Winbond W89C940F, which is a
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# NE2000 clone.
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# wi: Lucent WaveLAN/IEEE 802.11 PCMCIA adapters. Note: this supports both
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# the PCMCIA and ISA cards: the ISA card is really a PCMCIA to ISA
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# bridge with a PCMCIA adapter plugged into it.
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@ -2054,7 +2051,6 @@ device ste # Sundance ST201 (D-Link DFE-550TX)
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device stge # Sundance/Tamarack TC9021 gigabit Ethernet
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device vr # VIA Rhine, Rhine II
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device vte # DM&P Vortex86 RDC R6040 Fast Ethernet
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device wb # Winbond W89C840F
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device xl # 3Com 3c90x (``Boomerang'', ``Cyclone'')
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# PCI/PCI-X/PCIe Ethernet NICs that use iflib infrastructure
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@ -3404,7 +3404,6 @@ dev/vte/if_vte.c optional vte pci
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dev/vx/if_vx.c optional vx
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dev/vx/if_vx_pci.c optional vx pci
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dev/watchdog/watchdog.c standard
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dev/wb/if_wb.c optional wb pci
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dev/wi/if_wi.c optional wi
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dev/wi/if_wi_pccard.c optional wi pccard
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dev/wi/if_wi_pci.c optional wi pci
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1639
sys/dev/wb/if_wb.c
1639
sys/dev/wb/if_wb.c
File diff suppressed because it is too large
Load Diff
@ -1,445 +0,0 @@
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/*-
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* SPDX-License-Identifier: BSD-4-Clause
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*
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* Copyright (c) 1997, 1998
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* Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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||||
* are met:
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||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by Bill Paul.
|
||||
* 4. Neither the name of the author nor the names of any co-contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
|
||||
* THE POSSIBILITY OF SUCH DAMAGE.
|
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*
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* $FreeBSD$
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*/
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/*
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* Winbond register definitions.
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*/
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#define WB_BUSCTL 0x00 /* bus control */
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#define WB_TXSTART 0x04 /* tx start demand */
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#define WB_RXSTART 0x08 /* rx start demand */
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#define WB_RXADDR 0x0C /* rx descriptor list start addr */
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#define WB_TXADDR 0x10 /* tx descriptor list start addr */
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#define WB_ISR 0x14 /* interrupt status register */
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#define WB_NETCFG 0x18 /* network config register */
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#define WB_IMR 0x1C /* interrupt mask */
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#define WB_FRAMESDISCARDED 0x20 /* # of discarded frames */
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#define WB_SIO 0x24 /* MII and ROM/EEPROM access */
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#define WB_BOOTROMADDR 0x28
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#define WB_TIMER 0x2C /* general timer */
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#define WB_CURRXCTL 0x30 /* current RX descriptor */
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#define WB_CURRXBUF 0x34 /* current RX buffer */
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#define WB_MAR0 0x38 /* multicast filter 0 */
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#define WB_MAR1 0x3C /* multicast filter 1 */
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#define WB_NODE0 0x40 /* station address 0 */
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#define WB_NODE1 0x44 /* station address 1 */
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#define WB_BOOTROMSIZE 0x48 /* boot ROM size */
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#define WB_CURTXCTL 0x4C /* current TX descriptor */
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#define WB_CURTXBUF 0x50 /* current TX buffer */
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/*
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* Bus control bits.
|
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*/
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#define WB_BUSCTL_RESET 0x00000001
|
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#define WB_BUSCTL_ARBITRATION 0x00000002
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#define WB_BUSCTL_SKIPLEN 0x0000007C
|
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#define WB_BUSCTL_BUF_BIGENDIAN 0x00000080
|
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#define WB_BUSCTL_BURSTLEN 0x00003F00
|
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#define WB_BUSCTL_CACHEALIGN 0x0000C000
|
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#define WB_BUSCTL_DES_BIGENDIAN 0x00100000
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#define WB_BUSCTL_WAIT 0x00200000
|
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#define WB_BUSCTL_MUSTBEONE 0x00400000
|
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|
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#define WB_SKIPLEN_1LONG 0x00000004
|
||||
#define WB_SKIPLEN_2LONG 0x00000008
|
||||
#define WB_SKIPLEN_3LONG 0x00000010
|
||||
#define WB_SKIPLEN_4LONG 0x00000020
|
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#define WB_SKIPLEN_5LONG 0x00000040
|
||||
|
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#define WB_CACHEALIGN_NONE 0x00000000
|
||||
#define WB_CACHEALIGN_8LONG 0x00004000
|
||||
#define WB_CACHEALIGN_16LONG 0x00008000
|
||||
#define WB_CACHEALIGN_32LONG 0x0000C000
|
||||
|
||||
#define WB_BURSTLEN_USECA 0x00000000
|
||||
#define WB_BURSTLEN_1LONG 0x00000100
|
||||
#define WB_BURSTLEN_2LONG 0x00000200
|
||||
#define WB_BURSTLEN_4LONG 0x00000400
|
||||
#define WB_BURSTLEN_8LONG 0x00000800
|
||||
#define WB_BURSTLEN_16LONG 0x00001000
|
||||
#define WB_BURSTLEN_32LONG 0x00002000
|
||||
|
||||
#define WB_BUSCTL_CONFIG (WB_CACHEALIGN_8LONG|WB_SKIPLEN_3LONG| \
|
||||
WB_BURSTLEN_8LONG)
|
||||
|
||||
/*
|
||||
* Interrupt status bits.
|
||||
*/
|
||||
#define WB_ISR_TX_OK 0x00000001
|
||||
#define WB_ISR_TX_IDLE 0x00000002
|
||||
#define WB_ISR_TX_NOBUF 0x00000004
|
||||
#define WB_ISR_RX_EARLY 0x00000008
|
||||
#define WB_ISR_RX_ERR 0x00000010
|
||||
#define WB_ISR_TX_UNDERRUN 0x00000020
|
||||
#define WB_ISR_RX_OK 0x00000040
|
||||
#define WB_ISR_RX_NOBUF 0x00000080
|
||||
#define WB_ISR_RX_IDLE 0x00000100
|
||||
#define WB_ISR_TX_EARLY 0x00000400
|
||||
#define WB_ISR_TIMER_EXPIRED 0x00000800
|
||||
#define WB_ISR_BUS_ERR 0x00002000
|
||||
#define WB_ISR_ABNORMAL 0x00008000
|
||||
#define WB_ISR_NORMAL 0x00010000
|
||||
#define WB_ISR_RX_STATE 0x000E0000
|
||||
#define WB_ISR_TX_STATE 0x00700000
|
||||
#define WB_ISR_BUSERRTYPE 0x03800000
|
||||
|
||||
/*
|
||||
* The RX_STATE and TX_STATE fields are not described anywhere in the
|
||||
* Winbond datasheet, however it appears that the Winbond chip is an
|
||||
* attempt at a DEC 'tulip' clone, hence the ISR register is identical
|
||||
* to that of the tulip chip and we can steal the bit definitions from
|
||||
* the tulip documentation.
|
||||
*/
|
||||
#define WB_RXSTATE_STOPPED 0x00000000 /* 000 - Stopped */
|
||||
#define WB_RXSTATE_FETCH 0x00020000 /* 001 - Fetching descriptor */
|
||||
#define WB_RXSTATE_ENDCHECK 0x00040000 /* 010 - check for rx end */
|
||||
#define WB_RXSTATE_WAIT 0x00060000 /* 011 - waiting for packet */
|
||||
#define WB_RXSTATE_SUSPEND 0x00080000 /* 100 - suspend rx */
|
||||
#define WB_RXSTATE_CLOSE 0x000A0000 /* 101 - close tx desc */
|
||||
#define WB_RXSTATE_FLUSH 0x000C0000 /* 110 - flush from FIFO */
|
||||
#define WB_RXSTATE_DEQUEUE 0x000E0000 /* 111 - dequeue from FIFO */
|
||||
|
||||
#define WB_TXSTATE_RESET 0x00000000 /* 000 - reset */
|
||||
#define WB_TXSTATE_FETCH 0x00100000 /* 001 - fetching descriptor */
|
||||
#define WB_TXSTATE_WAITEND 0x00200000 /* 010 - wait for tx end */
|
||||
#define WB_TXSTATE_READING 0x00300000 /* 011 - read and enqueue */
|
||||
#define WB_TXSTATE_RSVD 0x00400000 /* 100 - reserved */
|
||||
#define WB_TXSTATE_SETUP 0x00500000 /* 101 - setup packet */
|
||||
#define WB_TXSTATE_SUSPEND 0x00600000 /* 110 - suspend tx */
|
||||
#define WB_TXSTATE_CLOSE 0x00700000 /* 111 - close tx desc */
|
||||
|
||||
/*
|
||||
* Network config bits.
|
||||
*/
|
||||
#define WB_NETCFG_RX_ON 0x00000002
|
||||
#define WB_NETCFG_RX_ALLPHYS 0x00000008
|
||||
#define WB_NETCFG_RX_MULTI 0x00000010
|
||||
#define WB_NETCFG_RX_BROAD 0x00000020
|
||||
#define WB_NETCFG_RX_RUNT 0x00000040
|
||||
#define WB_NETCFG_RX_ERR 0x00000080
|
||||
#define WB_NETCFG_FULLDUPLEX 0x00000200
|
||||
#define WB_NETCFG_LOOPBACK 0x00000C00
|
||||
#define WB_NETCFG_TX_ON 0x00002000
|
||||
#define WB_NETCFG_TX_THRESH 0x001FC000
|
||||
#define WB_NETCFG_RX_EARLYTHRSH 0x1FE00000
|
||||
#define WB_NETCFG_100MBPS 0x20000000
|
||||
#define WB_NETCFG_TX_EARLY_ON 0x40000000
|
||||
#define WB_NETCFG_RX_EARLY_ON 0x80000000
|
||||
|
||||
/*
|
||||
* The tx threshold can be adjusted in increments of 32 bytes.
|
||||
*/
|
||||
#define WB_TXTHRESH(x) ((x >> 5) << 14)
|
||||
#define WB_TXTHRESH_CHUNK 32
|
||||
#define WB_TXTHRESH_INIT 0 /*72*/
|
||||
|
||||
/*
|
||||
* Interrupt mask bits.
|
||||
*/
|
||||
#define WB_IMR_TX_OK 0x00000001
|
||||
#define WB_IMR_TX_IDLE 0x00000002
|
||||
#define WB_IMR_TX_NOBUF 0x00000004
|
||||
#define WB_IMR_RX_EARLY 0x00000008
|
||||
#define WB_IMR_RX_ERR 0x00000010
|
||||
#define WB_IMR_TX_UNDERRUN 0x00000020
|
||||
#define WB_IMR_RX_OK 0x00000040
|
||||
#define WB_IMR_RX_NOBUF 0x00000080
|
||||
#define WB_IMR_RX_IDLE 0x00000100
|
||||
#define WB_IMR_TX_EARLY 0x00000400
|
||||
#define WB_IMR_TIMER_EXPIRED 0x00000800
|
||||
#define WB_IMR_BUS_ERR 0x00002000
|
||||
#define WB_IMR_ABNORMAL 0x00008000
|
||||
#define WB_IMR_NORMAL 0x00010000
|
||||
|
||||
#define WB_INTRS \
|
||||
(WB_IMR_RX_OK|WB_IMR_TX_OK|WB_IMR_RX_NOBUF|WB_IMR_RX_ERR| \
|
||||
WB_IMR_TX_NOBUF|WB_IMR_TX_UNDERRUN|WB_IMR_BUS_ERR| \
|
||||
WB_IMR_ABNORMAL|WB_IMR_NORMAL|WB_IMR_TX_EARLY)
|
||||
/*
|
||||
* Serial I/O (EEPROM/ROM) bits.
|
||||
*/
|
||||
#define WB_SIO_EE_CS 0x00000001 /* EEPROM chip select */
|
||||
#define WB_SIO_EE_CLK 0x00000002 /* EEPROM clock */
|
||||
#define WB_SIO_EE_DATAIN 0x00000004 /* EEPROM data output */
|
||||
#define WB_SIO_EE_DATAOUT 0x00000008 /* EEPROM data input */
|
||||
#define WB_SIO_ROMDATA4 0x00000010
|
||||
#define WB_SIO_ROMDATA5 0x00000020
|
||||
#define WB_SIO_ROMDATA6 0x00000040
|
||||
#define WB_SIO_ROMDATA7 0x00000080
|
||||
#define WB_SIO_ROMCTL_WRITE 0x00000200
|
||||
#define WB_SIO_ROMCTL_READ 0x00000400
|
||||
#define WB_SIO_EESEL 0x00000800
|
||||
#define WB_SIO_MII_CLK 0x00010000 /* MDIO clock */
|
||||
#define WB_SIO_MII_DATAIN 0x00020000 /* MDIO data out */
|
||||
#define WB_SIO_MII_DIR 0x00040000 /* MDIO dir */
|
||||
#define WB_SIO_MII_DATAOUT 0x00080000 /* MDIO data in */
|
||||
|
||||
#define WB_EECMD_WRITE 0x140
|
||||
#define WB_EECMD_READ 0x180
|
||||
#define WB_EECMD_ERASE 0x1c0
|
||||
|
||||
/*
|
||||
* Winbond TX/RX descriptor structure.
|
||||
*/
|
||||
|
||||
struct wb_desc {
|
||||
u_int32_t wb_status;
|
||||
u_int32_t wb_ctl;
|
||||
u_int32_t wb_ptr1;
|
||||
u_int32_t wb_ptr2;
|
||||
};
|
||||
|
||||
#define wb_data wb_ptr1
|
||||
#define wb_next wb_ptr2
|
||||
|
||||
#define WB_RXSTAT_CRCERR 0x00000002
|
||||
#define WB_RXSTAT_DRIBBLE 0x00000004
|
||||
#define WB_RXSTAT_MIIERR 0x00000008
|
||||
#define WB_RXSTAT_LATEEVENT 0x00000040
|
||||
#define WB_RXSTAT_GIANT 0x00000080
|
||||
#define WB_RXSTAT_LASTFRAG 0x00000100
|
||||
#define WB_RXSTAT_FIRSTFRAG 0x00000200
|
||||
#define WB_RXSTAT_MULTICAST 0x00000400
|
||||
#define WB_RXSTAT_RUNT 0x00000800
|
||||
#define WB_RXSTAT_RXTYPE 0x00003000
|
||||
#define WB_RXSTAT_RXERR 0x00008000
|
||||
#define WB_RXSTAT_RXLEN 0x3FFF0000
|
||||
#define WB_RXSTAT_RXCMP 0x40000000
|
||||
#define WB_RXSTAT_OWN 0x80000000
|
||||
|
||||
#define WB_RXBYTES(x) ((x & WB_RXSTAT_RXLEN) >> 16)
|
||||
#define WB_RXSTAT (WB_RXSTAT_FIRSTFRAG|WB_RXSTAT_LASTFRAG|WB_RXSTAT_OWN)
|
||||
|
||||
#define WB_RXCTL_BUFLEN1 0x00000FFF
|
||||
#define WB_RXCTL_BUFLEN2 0x00FFF000
|
||||
#define WB_RXCTL_RLINK 0x01000000
|
||||
#define WB_RXCTL_RLAST 0x02000000
|
||||
|
||||
#define WB_TXSTAT_DEFER 0x00000001
|
||||
#define WB_TXSTAT_UNDERRUN 0x00000002
|
||||
#define WB_TXSTAT_COLLCNT 0x00000078
|
||||
#define WB_TXSTAT_SQE 0x00000080
|
||||
#define WB_TXSTAT_ABORT 0x00000100
|
||||
#define WB_TXSTAT_LATECOLL 0x00000200
|
||||
#define WB_TXSTAT_NOCARRIER 0x00000400
|
||||
#define WB_TXSTAT_CARRLOST 0x00000800
|
||||
#define WB_TXSTAT_TXERR 0x00001000
|
||||
#define WB_TXSTAT_OWN 0x80000000
|
||||
|
||||
#define WB_TXCTL_BUFLEN1 0x000007FF
|
||||
#define WB_TXCTL_BUFLEN2 0x003FF800
|
||||
#define WB_TXCTL_PAD 0x00800000
|
||||
#define WB_TXCTL_TLINK 0x01000000
|
||||
#define WB_TXCTL_TLAST 0x02000000
|
||||
#define WB_TXCTL_NOCRC 0x08000000
|
||||
#define WB_TXCTL_FIRSTFRAG 0x20000000
|
||||
#define WB_TXCTL_LASTFRAG 0x40000000
|
||||
#define WB_TXCTL_FINT 0x80000000
|
||||
|
||||
#define WB_MAXFRAGS 16
|
||||
#define WB_RX_LIST_CNT 64
|
||||
#define WB_TX_LIST_CNT 128
|
||||
#define WB_MIN_FRAMELEN 60
|
||||
#define ETHER_ALIGN 2
|
||||
|
||||
/*
|
||||
* A transmit 'super descriptor' is actually WB_MAXFRAGS regular
|
||||
* descriptors clumped together. The idea here is to emulate the
|
||||
* multi-fragment descriptor layout found in devices such as the
|
||||
* Texas Instruments ThunderLAN and 3Com boomerang and cylone chips.
|
||||
* The advantage to using this scheme is that it avoids buffer copies.
|
||||
* The disadvantage is that there's a certain amount of overhead due
|
||||
* to the fact that each 'fragment' is 16 bytes long. In my tests,
|
||||
* this limits top speed to about 10.5MB/sec. It should be more like
|
||||
* 11.5MB/sec. However, the upshot is that you can achieve better
|
||||
* results on slower machines: a Pentium 200 can pump out packets at
|
||||
* same speed as a PII 400.
|
||||
*/
|
||||
struct wb_txdesc {
|
||||
struct wb_desc wb_frag[WB_MAXFRAGS];
|
||||
};
|
||||
|
||||
#define WB_TXNEXT(x) x->wb_ptr->wb_frag[x->wb_lastdesc].wb_next
|
||||
#define WB_TXSTATUS(x) x->wb_ptr->wb_frag[x->wb_lastdesc].wb_status
|
||||
#define WB_TXCTL(x) x->wb_ptr->wb_frag[x->wb_lastdesc].wb_ctl
|
||||
#define WB_TXDATA(x) x->wb_ptr->wb_frag[x->wb_lastdesc].wb_data
|
||||
|
||||
#define WB_TXOWN(x) x->wb_ptr->wb_frag[0].wb_status
|
||||
|
||||
#define WB_UNSENT 0x1234
|
||||
|
||||
#define WB_BUFBYTES (1024 * sizeof(u_int32_t))
|
||||
|
||||
struct wb_buf {
|
||||
u_int32_t wb_data[1024];
|
||||
};
|
||||
|
||||
struct wb_list_data {
|
||||
struct wb_buf wb_rxbufs[WB_RX_LIST_CNT];
|
||||
struct wb_desc wb_rx_list[WB_RX_LIST_CNT];
|
||||
struct wb_txdesc wb_tx_list[WB_TX_LIST_CNT];
|
||||
};
|
||||
|
||||
struct wb_chain {
|
||||
struct wb_txdesc *wb_ptr;
|
||||
struct mbuf *wb_mbuf;
|
||||
struct wb_chain *wb_nextdesc;
|
||||
u_int8_t wb_lastdesc;
|
||||
};
|
||||
|
||||
struct wb_chain_onefrag {
|
||||
struct wb_desc *wb_ptr;
|
||||
struct mbuf *wb_mbuf;
|
||||
void *wb_buf;
|
||||
struct wb_chain_onefrag *wb_nextdesc;
|
||||
u_int8_t wb_rlast;
|
||||
};
|
||||
|
||||
struct wb_chain_data {
|
||||
u_int8_t wb_pad[WB_MIN_FRAMELEN];
|
||||
struct wb_chain_onefrag wb_rx_chain[WB_RX_LIST_CNT];
|
||||
struct wb_chain wb_tx_chain[WB_TX_LIST_CNT];
|
||||
|
||||
struct wb_chain_onefrag *wb_rx_head;
|
||||
|
||||
struct wb_chain *wb_tx_head;
|
||||
struct wb_chain *wb_tx_tail;
|
||||
struct wb_chain *wb_tx_free;
|
||||
};
|
||||
|
||||
struct wb_type {
|
||||
u_int16_t wb_vid;
|
||||
u_int16_t wb_did;
|
||||
const char *wb_name;
|
||||
};
|
||||
|
||||
struct wb_softc {
|
||||
struct ifnet *wb_ifp; /* interface info */
|
||||
device_t wb_dev;
|
||||
device_t wb_miibus;
|
||||
struct resource *wb_res;
|
||||
struct resource *wb_irq;
|
||||
void *wb_intrhand;
|
||||
struct wb_type *wb_info; /* Winbond adapter info */
|
||||
u_int8_t wb_type;
|
||||
u_int16_t wb_txthresh;
|
||||
int wb_cachesize;
|
||||
int wb_timer;
|
||||
caddr_t wb_ldata_ptr;
|
||||
struct wb_list_data *wb_ldata;
|
||||
struct wb_chain_data wb_cdata;
|
||||
struct callout wb_stat_callout;
|
||||
struct mtx wb_mtx;
|
||||
};
|
||||
|
||||
#define WB_LOCK(_sc) mtx_lock(&(_sc)->wb_mtx)
|
||||
#define WB_UNLOCK(_sc) mtx_unlock(&(_sc)->wb_mtx)
|
||||
#define WB_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->wb_mtx, MA_OWNED)
|
||||
|
||||
/*
|
||||
* register space access macros
|
||||
*/
|
||||
#define CSR_WRITE_4(sc, reg, val) bus_write_4(sc->wb_res, reg, val)
|
||||
#define CSR_WRITE_2(sc, reg, val) bus_write_2(sc->wb_res, reg, val)
|
||||
#define CSR_WRITE_1(sc, reg, val) bus_write_1(sc->wb_res, reg, val)
|
||||
|
||||
#define CSR_READ_4(sc, reg) bus_read_4(sc->wb_res, reg)
|
||||
#define CSR_READ_2(sc, reg) bus_read_2(sc->wb_res, reg)
|
||||
#define CSR_READ_1(sc, reg) bus_read_1(sc->wb_res, reg)
|
||||
|
||||
#define CSR_BARRIER(sc, reg, length, flags) \
|
||||
bus_barrier(sc->wb_res, reg, length, flags)
|
||||
|
||||
#define WB_TIMEOUT 1000
|
||||
|
||||
/*
|
||||
* General constants that are fun to know.
|
||||
*
|
||||
* Winbond PCI vendor ID
|
||||
*/
|
||||
#define WB_VENDORID 0x1050
|
||||
|
||||
/*
|
||||
* Winbond device IDs.
|
||||
*/
|
||||
#define WB_DEVICEID_840F 0x0840
|
||||
|
||||
/*
|
||||
* Compex vendor ID.
|
||||
*/
|
||||
#define CP_VENDORID 0x11F6
|
||||
|
||||
/*
|
||||
* Compex device IDs.
|
||||
*/
|
||||
#define CP_DEVICEID_RL100 0x2011
|
||||
|
||||
/*
|
||||
* PCI low memory base and low I/O base register, and
|
||||
* other PCI registers.
|
||||
*/
|
||||
|
||||
#define WB_PCI_VENDOR_ID 0x00
|
||||
#define WB_PCI_DEVICE_ID 0x02
|
||||
#define WB_PCI_COMMAND 0x04
|
||||
#define WB_PCI_STATUS 0x06
|
||||
#define WB_PCI_CLASSCODE 0x09
|
||||
#define WB_PCI_CACHELEN 0x0C
|
||||
#define WB_PCI_LATENCY_TIMER 0x0D
|
||||
#define WB_PCI_HEADER_TYPE 0x0E
|
||||
#define WB_PCI_LOIO 0x10
|
||||
#define WB_PCI_LOMEM 0x14
|
||||
#define WB_PCI_BIOSROM 0x30
|
||||
#define WB_PCI_INTLINE 0x3C
|
||||
#define WB_PCI_INTPIN 0x3D
|
||||
#define WB_PCI_MINGNT 0x3E
|
||||
#define WB_PCI_MINLAT 0x0F
|
||||
#define WB_PCI_RESETOPT 0x48
|
||||
#define WB_PCI_EEPROM_DATA 0x4C
|
||||
|
||||
/* power management registers */
|
||||
#define WB_PCI_CAPID 0xDC /* 8 bits */
|
||||
#define WB_PCI_NEXTPTR 0xDD /* 8 bits */
|
||||
#define WB_PCI_PWRMGMTCAP 0xDE /* 16 bits */
|
||||
#define WB_PCI_PWRMGMTCTRL 0xE0 /* 16 bits */
|
||||
|
||||
#define WB_PSTATE_MASK 0x0003
|
||||
#define WB_PSTATE_D0 0x0000
|
||||
#define WB_PSTATE_D1 0x0002
|
||||
#define WB_PSTATE_D2 0x0002
|
||||
#define WB_PSTATE_D3 0x0003
|
||||
#define WB_PME_EN 0x0010
|
||||
#define WB_PME_STATUS 0x8000
|
||||
@ -261,7 +261,6 @@ device stge # Sundance/Tamarack TC9021 gigabit Ethernet
|
||||
device vge # VIA VT612x gigabit Ethernet
|
||||
device vr # VIA Rhine, Rhine II
|
||||
device vte # DM&P Vortex86 RDC R6040 Fast Ethernet
|
||||
device wb # Winbond W89C840F
|
||||
device xl # 3Com 3c90x (``Boomerang'', ``Cyclone'')
|
||||
|
||||
# ISA Ethernet NICs. pccard NICs included.
|
||||
|
||||
@ -374,7 +374,6 @@ SUBDIR= \
|
||||
${_vpo} \
|
||||
vr \
|
||||
vte \
|
||||
wb \
|
||||
${_wbwd} \
|
||||
${_wi} \
|
||||
wlan \
|
||||
|
||||
@ -1,9 +0,0 @@
|
||||
# $FreeBSD$
|
||||
|
||||
.PATH: ${SRCTOP}/sys/dev/wb
|
||||
|
||||
KMOD= if_wb
|
||||
SRCS= if_wb.c device_if.h
|
||||
SRCS+= bus_if.h miibus_if.h pci_if.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
||||
@ -206,7 +206,6 @@ device sk # SysKonnect SK-984x & SK-982x gigabit Ethernet
|
||||
device ste # Sundance ST201 (D-Link DFE-550TX)
|
||||
device stge # Sundance/Tamarack TC9021 gigabit Ethernet
|
||||
device vr # VIA Rhine, Rhine II
|
||||
#device wb # Winbond W89C840F
|
||||
device xl # 3Com 3c90x (``Boomerang'', ``Cyclone'')
|
||||
|
||||
# Wireless NIC cards
|
||||
|
||||
Loading…
Reference in New Issue
Block a user