Change u_intXX_t to uintXX_t. Change a couple of 'unsigned long's to
uint32_t where appropriate.
This commit is contained in:
Doug Rabson
parent
d6ed810a67
commit
03161bbcf6
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=129585
@ -108,8 +108,8 @@ static void fw_attach_dev (struct firewire_comm *);
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#ifdef FW_VMACCESS
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static void fw_vmaccess (struct fw_xfer *);
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#endif
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struct fw_xfer *asyreqq (struct firewire_comm *, u_int8_t, u_int8_t, u_int8_t,
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u_int32_t, u_int32_t, void (*)(struct fw_xfer *));
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struct fw_xfer *asyreqq (struct firewire_comm *, uint8_t, uint8_t, uint8_t,
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uint32_t, uint32_t, void (*)(struct fw_xfer *));
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static int fw_bmr (struct firewire_comm *);
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static device_method_t firewire_methods[] = {
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@ -686,14 +686,14 @@ fw_busreset(struct firewire_comm *fc)
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newrom = malloc(CROMSIZE, M_FW, M_NOWAIT | M_ZERO);
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src = &fc->crom_src_buf->src;
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crom_load(src, (u_int32_t *)newrom, CROMSIZE);
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crom_load(src, (uint32_t *)newrom, CROMSIZE);
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if (bcmp(newrom, fc->config_rom, CROMSIZE) != 0) {
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/* bump generation and reload */
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src->businfo.generation ++;
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/* generation must be between 0x2 and 0xF */
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if (src->businfo.generation < 2)
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src->businfo.generation ++;
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crom_load(src, (u_int32_t *)newrom, CROMSIZE);
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crom_load(src, (uint32_t *)newrom, CROMSIZE);
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bcopy(newrom, (void *)fc->config_rom, CROMSIZE);
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}
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free(newrom, M_FW);
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@ -831,7 +831,7 @@ void fw_init(struct firewire_comm *fc)
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* To lookup bound process from IEEE1394 address.
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*/
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struct fw_bind *
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fw_bindlookup(struct firewire_comm *fc, u_int16_t dest_hi, u_int32_t dest_lo)
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fw_bindlookup(struct firewire_comm *fc, uint16_t dest_hi, uint32_t dest_lo)
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{
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u_int64_t addr;
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struct fw_bind *tfw;
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@ -1135,7 +1135,7 @@ fw_phy_config(struct firewire_comm *fc, int root_node, int gap_count)
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* Dump self ID.
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*/
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static void
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fw_print_sid(u_int32_t sid)
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fw_print_sid(uint32_t sid)
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{
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union fw_self_id *s;
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s = (union fw_self_id *) &sid;
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@ -1151,16 +1151,16 @@ fw_print_sid(u_int32_t sid)
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/*
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* To receive self ID.
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*/
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void fw_sidrcv(struct firewire_comm* fc, u_int32_t *sid, u_int len)
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void fw_sidrcv(struct firewire_comm* fc, uint32_t *sid, u_int len)
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{
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u_int32_t *p;
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uint32_t *p;
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union fw_self_id *self_id;
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u_int i, j, node, c_port = 0, i_branch = 0;
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fc->sid_cnt = len /(sizeof(u_int32_t) * 2);
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fc->sid_cnt = len /(sizeof(uint32_t) * 2);
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fc->status = FWBUSINIT;
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fc->max_node = fc->nodeid & 0x3f;
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CSRARC(fc, NODE_IDS) = ((u_int32_t)fc->nodeid) << 16;
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CSRARC(fc, NODE_IDS) = ((uint32_t)fc->nodeid) << 16;
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fc->status = FWBUSCYMELECT;
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fc->topology_map->crc_len = 2;
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fc->topology_map->generation ++;
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@ -1220,19 +1220,19 @@ void fw_sidrcv(struct firewire_comm* fc, u_int32_t *sid, u_int len)
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device_printf(fc->bdev, "%d nodes", fc->max_node + 1);
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/* CRC */
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fc->topology_map->crc = fw_crc16(
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(u_int32_t *)&fc->topology_map->generation,
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(uint32_t *)&fc->topology_map->generation,
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fc->topology_map->crc_len * 4);
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fc->speed_map->crc = fw_crc16(
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(u_int32_t *)&fc->speed_map->generation,
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(uint32_t *)&fc->speed_map->generation,
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fc->speed_map->crc_len * 4);
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/* byteswap and copy to CSR */
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p = (u_int32_t *)fc->topology_map;
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p = (uint32_t *)fc->topology_map;
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for (i = 0; i <= fc->topology_map->crc_len; i++)
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CSRARC(fc, TOPO_MAP + i * 4) = htonl(*p++);
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p = (u_int32_t *)fc->speed_map;
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p = (uint32_t *)fc->speed_map;
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CSRARC(fc, SPED_MAP) = htonl(*p++);
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CSRARC(fc, SPED_MAP + 4) = htonl(*p++);
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/* don't byte-swap u_int8_t array */
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/* don't byte-swap uint8_t array */
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bcopy(p, &CSRARC(fc, SPED_MAP + 8), (fc->speed_map->crc_len - 1)*4);
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fc->max_hop = fc->max_node - i_branch;
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@ -1319,7 +1319,7 @@ fw_bus_explore(struct firewire_comm *fc )
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{
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int err = 0;
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struct fw_device *fwdev, *pfwdev, *tfwdev;
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u_int32_t addr;
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uint32_t addr;
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struct fw_xfer *xfer;
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struct fw_pkt *fp;
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@ -1442,8 +1442,8 @@ fw_bus_explore(struct firewire_comm *fc )
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/* Portable Async. request read quad */
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struct fw_xfer *
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asyreqq(struct firewire_comm *fc, u_int8_t spd, u_int8_t tl, u_int8_t rt,
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u_int32_t addr_hi, u_int32_t addr_lo,
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asyreqq(struct firewire_comm *fc, uint8_t spd, uint8_t tl, uint8_t rt,
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uint32_t addr_hi, uint32_t addr_lo,
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void (*hand) (struct fw_xfer*))
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{
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struct fw_xfer *xfer;
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@ -1489,7 +1489,7 @@ fw_bus_explore_callback(struct fw_xfer *xfer)
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struct csrhdr *chdr;
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struct csrdir *csrd;
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struct csrreg *csrreg;
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u_int32_t offset;
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uint32_t offset;
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if(xfer == NULL) {
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@ -1517,9 +1517,9 @@ fw_bus_explore_callback(struct fw_xfer *xfer)
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rfp = &xfer->recv.hdr;
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#if 0
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{
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u_int32_t *qld;
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uint32_t *qld;
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int i;
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qld = (u_int32_t *)xfer->recv.buf;
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qld = (uint32_t *)xfer->recv.buf;
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printf("len:%d\n", xfer->recv.len);
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for( i = 0 ; i <= xfer->recv.len && i < 32; i+= 4){
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printf("0x%08x ", rfp->mode.ld[i/4]);
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@ -1710,7 +1710,7 @@ fw_get_tlabel(struct firewire_comm *fc, struct fw_xfer *xfer)
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u_int i;
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struct tlabel *tl, *tmptl;
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int s;
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static u_int32_t label = 0;
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static uint32_t label = 0;
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s = splfw();
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for( i = 0 ; i < 0x40 ; i ++){
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@ -1767,9 +1767,9 @@ fw_rcv_copy(struct fw_rcv_buf *rb)
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/* special handling for RRESQ */
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if (pkt->mode.hdr.tcode == FWTCODE_RRESQ &&
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p != NULL && res >= sizeof(u_int32_t)) {
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*(u_int32_t *)p = pkt->mode.rresq.data;
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rb->xfer->recv.pay_len = sizeof(u_int32_t);
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p != NULL && res >= sizeof(uint32_t)) {
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*(uint32_t *)p = pkt->mode.rresq.data;
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rb->xfer->recv.pay_len = sizeof(uint32_t);
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return;
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}
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@ -1808,9 +1808,9 @@ fw_rcv(struct fw_rcv_buf *rb)
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int i, len, oldstate;
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#if 0
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{
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u_int32_t *qld;
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uint32_t *qld;
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int i;
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qld = (u_int32_t *)buf;
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qld = (uint32_t *)buf;
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printf("spd %d len:%d\n", spd, len);
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for( i = 0 ; i <= len && i < 32; i+= 4){
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printf("0x%08x ", ntohl(qld[i/4]));
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@ -2108,7 +2108,7 @@ fw_try_bmr(void *arg)
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static void
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fw_vmaccess(struct fw_xfer *xfer){
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struct fw_pkt *rfp, *sfp = NULL;
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u_int32_t *ld = (u_int32_t *)xfer->recv.buf;
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uint32_t *ld = (uint32_t *)xfer->recv.buf;
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printf("vmaccess spd:%2x len:%03x data:%08x %08x %08x %08x\n",
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xfer->spd, xfer->recv.len, ntohl(ld[0]), ntohl(ld[1]), ntohl(ld[2]), ntohl(ld[3]));
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@ -2137,7 +2137,7 @@ fw_vmaccess(struct fw_xfer *xfer){
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xfer->send.buf = malloc(12, M_FW, M_NOWAIT);
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xfer->send.len = 12;
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sfp->mode.wres.tcode = FWTCODE_WRES;
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*((u_int32_t *)(ntohl(rfp->mode.wreqb.dest_lo))) = rfp->mode.wreqq.data;
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*((uint32_t *)(ntohl(rfp->mode.wreqb.dest_lo))) = rfp->mode.wreqq.data;
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sfp->mode.wres.rtcode = 0;
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break;
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case FWTCODE_RREQB:
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@ -2145,7 +2145,7 @@ fw_vmaccess(struct fw_xfer *xfer){
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xfer->send.len = 16 + ntohs(rfp->mode.rreqb.len);
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sfp = (struct fw_pkt *)xfer->send.buf;
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bcopy((caddr_t)ntohl(rfp->mode.rreqb.dest_lo),
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sfp->mode.rresb.payload, (u_int16_t)ntohs(rfp->mode.rreqb.len));
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sfp->mode.rresb.payload, (uint16_t)ntohs(rfp->mode.rreqb.len));
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sfp->mode.rresb.tcode = FWTCODE_RRESB;
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sfp->mode.rresb.len = rfp->mode.rreqb.len;
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sfp->mode.rresb.rtcode = 0;
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@ -2155,7 +2155,7 @@ fw_vmaccess(struct fw_xfer *xfer){
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xfer->send.buf = malloc(16, M_FW, M_NOWAIT);
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xfer->send.len = 16;
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sfp = (struct fw_pkt *)xfer->send.buf;
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sfp->mode.rresq.data = *(u_int32_t *)(ntohl(rfp->mode.rreqq.dest_lo));
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sfp->mode.rresq.data = *(uint32_t *)(ntohl(rfp->mode.rreqq.dest_lo));
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sfp->mode.wres.tcode = FWTCODE_RRESQ;
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sfp->mode.rresb.rtcode = 0;
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break;
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@ -2180,9 +2180,9 @@ fw_vmaccess(struct fw_xfer *xfer){
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/*
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* CRC16 check-sum for IEEE1394 register blocks.
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*/
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u_int16_t
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fw_crc16(u_int32_t *ptr, u_int32_t len){
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u_int32_t i, sum, crc = 0;
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uint16_t
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fw_crc16(uint32_t *ptr, uint32_t len){
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uint32_t i, sum, crc = 0;
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int shift;
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len = (len + 3) & ~3;
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for(i = 0 ; i < len ; i+= 4){
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@ -2192,7 +2192,7 @@ fw_crc16(u_int32_t *ptr, u_int32_t len){
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}
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crc &= 0xffff;
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}
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return((u_int16_t) crc);
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return((uint16_t) crc);
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}
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static int
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@ -2201,7 +2201,7 @@ fw_bmr(struct firewire_comm *fc)
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struct fw_device fwdev;
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union fw_self_id *self_id;
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int cmstr;
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u_int32_t quad;
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uint32_t quad;
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/* Check to see if the current root node is cycle master capable */
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self_id = fw_find_self_id(fc, fc->max_node);
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@ -55,8 +55,8 @@ struct fw_isobufreq {
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};
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struct fw_addr {
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unsigned long hi;
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unsigned long lo;
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uint32_t hi;
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uint32_t lo;
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};
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struct fw_asybindreq {
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@ -65,8 +65,8 @@ struct fw_asybindreq {
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};
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struct fw_reg_req_t {
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unsigned long addr;
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unsigned long data;
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uint32_t addr;
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uint32_t data;
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};
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#define MAXREC(x) (2 << (x))
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@ -106,39 +106,39 @@ struct fw_reg_req_t {
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#define FWP_TL_VALID (1 << 7)
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struct fw_isohdr {
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u_int32_t hdr[1];
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uint32_t hdr[1];
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};
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struct fw_asyhdr {
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u_int32_t hdr[4];
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uint32_t hdr[4];
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};
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#if BYTE_ORDER == BIG_ENDIAN
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#define BIT4x2(x,y) u_int8_t x:4, y:4
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#define BIT16x2(x,y) u_int32_t x:16, y:16
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#define BIT4x2(x,y) uint8_t x:4, y:4
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#define BIT16x2(x,y) uint32_t x:16, y:16
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#else
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#define BIT4x2(x,y) u_int8_t y:4, x:4
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#define BIT16x2(x,y) u_int32_t y:16, x:16
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#define BIT4x2(x,y) uint8_t y:4, x:4
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#define BIT16x2(x,y) uint32_t y:16, x:16
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#endif
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#if BYTE_ORDER == BIG_ENDIAN
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#define COMMON_HDR(a,b,c,d) u_int32_t a:16,b:8,c:4,d:4
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#define COMMON_RES(a,b,c,d) u_int32_t a:16,b:4,c:4,d:8
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#define COMMON_HDR(a,b,c,d) uint32_t a:16,b:8,c:4,d:4
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#define COMMON_RES(a,b,c,d) uint32_t a:16,b:4,c:4,d:8
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#else
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#define COMMON_HDR(a,b,c,d) u_int32_t d:4,c:4,b:8,a:16
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#define COMMON_RES(a,b,c,d) u_int32_t d:8,c:4,b:4,a:16
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#define COMMON_HDR(a,b,c,d) uint32_t d:4,c:4,b:8,a:16
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#define COMMON_RES(a,b,c,d) uint32_t d:8,c:4,b:4,a:16
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#endif
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struct fw_pkt {
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union {
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u_int32_t ld[0];
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uint32_t ld[0];
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struct {
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COMMON_HDR(, , tcode, );
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} common;
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struct {
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COMMON_HDR(len, chtag, tcode, sy);
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u_int32_t payload[0];
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uint32_t payload[0];
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} stream;
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struct {
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COMMON_HDR(dst, tlrt, tcode, pri);
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@ -147,64 +147,64 @@ struct fw_pkt {
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struct {
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COMMON_HDR(dst, tlrt, tcode, pri);
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BIT16x2(src, dest_hi);
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u_int32_t dest_lo;
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uint32_t dest_lo;
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} rreqq;
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struct {
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COMMON_HDR(dst, tlrt, tcode, pri);
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COMMON_RES(src, rtcode, , );
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u_int32_t :32;
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uint32_t :32;
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} wres;
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struct {
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COMMON_HDR(dst, tlrt, tcode, pri);
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BIT16x2(src, dest_hi);
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u_int32_t dest_lo;
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uint32_t dest_lo;
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BIT16x2(len, extcode);
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} rreqb;
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struct {
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COMMON_HDR(dst, tlrt, tcode, pri);
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BIT16x2(src, dest_hi);
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u_int32_t dest_lo;
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u_int32_t data;
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uint32_t dest_lo;
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uint32_t data;
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} wreqq;
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struct {
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COMMON_HDR(dst, tlrt, tcode, pri);
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BIT16x2(src, dest_hi);
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u_int32_t dest_lo;
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u_int32_t data;
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uint32_t dest_lo;
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uint32_t data;
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} cyc;
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struct {
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COMMON_HDR(dst, tlrt, tcode, pri);
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COMMON_RES(src, rtcode, , );
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u_int32_t :32;
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u_int32_t data;
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uint32_t :32;
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uint32_t data;
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} rresq;
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struct {
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COMMON_HDR(dst, tlrt, tcode, pri);
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BIT16x2(src, dest_hi);
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u_int32_t dest_lo;
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uint32_t dest_lo;
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BIT16x2(len, extcode);
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u_int32_t payload[0];
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uint32_t payload[0];
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} wreqb;
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struct {
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COMMON_HDR(dst, tlrt, tcode, pri);
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BIT16x2(src, dest_hi);
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u_int32_t dest_lo;
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uint32_t dest_lo;
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BIT16x2(len, extcode);
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u_int32_t payload[0];
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uint32_t payload[0];
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} lreq;
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struct {
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COMMON_HDR(dst, tlrt, tcode, pri);
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COMMON_RES(src, rtcode, , );
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u_int32_t :32;
|
||||
uint32_t :32;
|
||||
BIT16x2(len, extcode);
|
||||
u_int32_t payload[0];
|
||||
uint32_t payload[0];
|
||||
} rresb;
|
||||
struct {
|
||||
COMMON_HDR(dst, tlrt, tcode, pri);
|
||||
COMMON_RES(src, rtcode, , );
|
||||
u_int32_t :32;
|
||||
uint32_t :32;
|
||||
BIT16x2(len, extcode);
|
||||
u_int32_t payload[0];
|
||||
uint32_t payload[0];
|
||||
} lres;
|
||||
} mode;
|
||||
};
|
||||
@ -237,7 +237,7 @@ struct fw_pkt {
|
||||
#define EXTCODE_WRAP_ADD 6
|
||||
|
||||
struct fw_eui64 {
|
||||
u_int32_t hi, lo;
|
||||
uint32_t hi, lo;
|
||||
};
|
||||
#define FW_EUI64_BYTE(eui, x) \
|
||||
((((x)<4)? \
|
||||
@ -261,19 +261,19 @@ struct fw_asyreq {
|
||||
}dst;
|
||||
}req;
|
||||
struct fw_pkt pkt;
|
||||
u_int32_t data[512];
|
||||
uint32_t data[512];
|
||||
};
|
||||
|
||||
struct fw_devinfo {
|
||||
struct fw_eui64 eui;
|
||||
u_int16_t dst;
|
||||
u_int16_t status;
|
||||
uint16_t dst;
|
||||
uint16_t status;
|
||||
};
|
||||
|
||||
#define FW_MAX_DEVLST 70
|
||||
struct fw_devlstreq {
|
||||
u_int16_t n;
|
||||
u_int16_t info_len;
|
||||
uint16_t n;
|
||||
uint16_t info_len;
|
||||
struct fw_devinfo dev[FW_MAX_DEVLST];
|
||||
};
|
||||
|
||||
@ -284,7 +284,7 @@ struct fw_devlstreq {
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
union fw_self_id {
|
||||
struct {
|
||||
u_int32_t id:2,
|
||||
uint32_t id:2,
|
||||
phy_id:6,
|
||||
sequel:1,
|
||||
link_active:1,
|
||||
@ -300,7 +300,7 @@ union fw_self_id {
|
||||
more_packets:1;
|
||||
} p0;
|
||||
struct {
|
||||
u_int32_t
|
||||
uint32_t
|
||||
id:2,
|
||||
phy_id:6,
|
||||
sequel:1,
|
||||
@ -321,7 +321,7 @@ union fw_self_id {
|
||||
#else
|
||||
union fw_self_id {
|
||||
struct {
|
||||
u_int32_t more_packets:1,
|
||||
uint32_t more_packets:1,
|
||||
initiated_reset:1,
|
||||
port2:2,
|
||||
port1:2,
|
||||
@ -337,7 +337,7 @@ union fw_self_id {
|
||||
id:2;
|
||||
} p0;
|
||||
struct {
|
||||
u_int32_t more_packets:1,
|
||||
uint32_t more_packets:1,
|
||||
reserved1:1,
|
||||
porth:2,
|
||||
portg:2,
|
||||
@ -358,19 +358,19 @@ union fw_self_id {
|
||||
|
||||
|
||||
struct fw_topology_map {
|
||||
u_int32_t crc:16,
|
||||
crc_len:16;
|
||||
u_int32_t generation;
|
||||
u_int32_t self_id_count:16,
|
||||
node_count:16;
|
||||
uint32_t crc:16,
|
||||
crc_len:16;
|
||||
uint32_t generation;
|
||||
uint32_t self_id_count:16,
|
||||
node_count:16;
|
||||
union fw_self_id self_id[4*64];
|
||||
};
|
||||
|
||||
struct fw_speed_map {
|
||||
u_int32_t crc:16,
|
||||
crc_len:16;
|
||||
u_int32_t generation;
|
||||
u_int8_t speed[64][64];
|
||||
uint32_t crc:16,
|
||||
crc_len:16;
|
||||
uint32_t generation;
|
||||
uint8_t speed[64][64];
|
||||
};
|
||||
|
||||
struct fw_crom_buf {
|
||||
@ -405,7 +405,7 @@ struct fw_crom_buf {
|
||||
#define FWOHCI_RDPHYREG _IOWR('S', 82, struct fw_reg_req_t)
|
||||
#define FWOHCI_WRPHYREG _IOWR('S', 83, struct fw_reg_req_t)
|
||||
|
||||
#define DUMPDMA _IOWR('S', 82, u_int32_t)
|
||||
#define DUMPDMA _IOWR('S', 82, uint32_t)
|
||||
|
||||
#ifdef _KERNEL
|
||||
|
||||
|
||||
@ -51,19 +51,19 @@ typedef struct proc fw_proc;
|
||||
#define splfw splimp
|
||||
|
||||
struct fw_device{
|
||||
u_int16_t dst;
|
||||
uint16_t dst;
|
||||
struct fw_eui64 eui;
|
||||
u_int8_t speed;
|
||||
u_int8_t maxrec;
|
||||
u_int8_t nport;
|
||||
u_int8_t power;
|
||||
uint8_t speed;
|
||||
uint8_t maxrec;
|
||||
uint8_t nport;
|
||||
uint8_t power;
|
||||
#define CSRROMOFF 0x400
|
||||
#define CSRROMSIZE 0x400
|
||||
int rommax; /* offset from 0xffff f000 0000 */
|
||||
u_int32_t csrrom[CSRROMSIZE/4];
|
||||
uint32_t csrrom[CSRROMSIZE/4];
|
||||
int rcnt;
|
||||
struct firewire_comm *fc;
|
||||
u_int32_t status;
|
||||
uint32_t status;
|
||||
#define FWDEVINIT 1
|
||||
#define FWDEVATTACHED 2
|
||||
#define FWDEVINVAL 3
|
||||
@ -101,7 +101,7 @@ struct tcode_info {
|
||||
struct firewire_comm{
|
||||
device_t dev;
|
||||
device_t bdev;
|
||||
u_int16_t busid:10,
|
||||
uint16_t busid:10,
|
||||
nodeid:6;
|
||||
u_int mode;
|
||||
u_int nport;
|
||||
@ -113,7 +113,7 @@ struct firewire_comm{
|
||||
u_int max_asyretry;
|
||||
#define FWPHYASYST (1 << 0)
|
||||
u_int retry_count;
|
||||
u_int32_t ongobus:10,
|
||||
uint32_t ongobus:10,
|
||||
ongonode:6,
|
||||
ongoaddr:16;
|
||||
struct fw_device *ongodev;
|
||||
@ -121,7 +121,7 @@ struct firewire_comm{
|
||||
#define FWMAXCSRDIR 16
|
||||
SLIST_HEAD(, csrdir) ongocsr;
|
||||
SLIST_HEAD(, csrdir) csrfree;
|
||||
u_int32_t status;
|
||||
uint32_t status;
|
||||
#define FWBUSNOTREADY (-1)
|
||||
#define FWBUSRESET 0
|
||||
#define FWBUSINIT 1
|
||||
@ -141,9 +141,9 @@ struct firewire_comm{
|
||||
STAILQ_HEAD(, fw_device) devices;
|
||||
u_int sid_cnt;
|
||||
#define CSRSIZE 0x4000
|
||||
u_int32_t csr_arc[CSRSIZE/4];
|
||||
uint32_t csr_arc[CSRSIZE/4];
|
||||
#define CROMSIZE 0x400
|
||||
u_int32_t *config_rom;
|
||||
uint32_t *config_rom;
|
||||
struct crom_src_buf *crom_src_buf;
|
||||
struct crom_src *crom_src;
|
||||
struct crom_chunk *crom_root;
|
||||
@ -153,9 +153,9 @@ struct firewire_comm{
|
||||
struct callout bmr_callout;
|
||||
struct callout timeout_callout;
|
||||
struct callout retry_probe_callout;
|
||||
u_int32_t (*cyctimer) (struct firewire_comm *);
|
||||
uint32_t (*cyctimer) (struct firewire_comm *);
|
||||
void (*ibr) (struct firewire_comm *);
|
||||
u_int32_t (*set_bmr) (struct firewire_comm *, u_int32_t);
|
||||
uint32_t (*set_bmr) (struct firewire_comm *, uint32_t);
|
||||
int (*ioctl) (dev_t, u_long, caddr_t, int, fw_proc *);
|
||||
int (*irx_enable) (struct firewire_comm *, int);
|
||||
int (*irx_disable) (struct firewire_comm *, int);
|
||||
@ -164,16 +164,16 @@ struct firewire_comm{
|
||||
void (*timeout) (void *);
|
||||
void (*poll) (struct firewire_comm *, int, int);
|
||||
void (*set_intr) (struct firewire_comm *, int);
|
||||
void (*irx_post) (struct firewire_comm *, u_int32_t *);
|
||||
void (*itx_post) (struct firewire_comm *, u_int32_t *);
|
||||
void (*irx_post) (struct firewire_comm *, uint32_t *);
|
||||
void (*itx_post) (struct firewire_comm *, uint32_t *);
|
||||
struct tcode_info *tcode;
|
||||
bus_dma_tag_t dmat;
|
||||
};
|
||||
#define CSRARC(sc, offset) ((sc)->csr_arc[(offset)/4])
|
||||
|
||||
struct csrdir{
|
||||
u_int32_t ongoaddr;
|
||||
u_int32_t off;
|
||||
uint32_t ongoaddr;
|
||||
uint32_t off;
|
||||
SLIST_ENTRY(csrdir) link;
|
||||
};
|
||||
|
||||
@ -234,8 +234,8 @@ struct fw_bind{
|
||||
#define FWACT_NULL 0
|
||||
#define FWACT_XFER 2
|
||||
#define FWACT_CH 3
|
||||
u_int8_t act_type;
|
||||
u_int8_t sub;
|
||||
uint8_t act_type;
|
||||
uint8_t sub;
|
||||
};
|
||||
|
||||
struct fw_xfer{
|
||||
@ -251,18 +251,18 @@ struct fw_xfer{
|
||||
#define FWXF_SENTERR 4
|
||||
#define FWXF_BUSY 8
|
||||
#define FWXF_RCVD 10
|
||||
u_int8_t state;
|
||||
u_int8_t retry;
|
||||
u_int8_t tl;
|
||||
uint8_t state;
|
||||
uint8_t retry;
|
||||
uint8_t tl;
|
||||
void (*retry_req) (struct fw_xfer *);
|
||||
union{
|
||||
void (*hand) (struct fw_xfer *);
|
||||
} act;
|
||||
struct {
|
||||
struct fw_pkt hdr;
|
||||
u_int32_t *payload;
|
||||
u_int16_t pay_len;
|
||||
u_int8_t spd;
|
||||
uint32_t *payload;
|
||||
uint16_t pay_len;
|
||||
uint8_t spd;
|
||||
} send, recv;
|
||||
struct mbuf *mbuf;
|
||||
STAILQ_ENTRY(fw_xfer) link;
|
||||
@ -274,10 +274,10 @@ struct fw_rcv_buf {
|
||||
struct fw_xfer *xfer;
|
||||
struct iovec *vec;
|
||||
u_int nvec;
|
||||
u_int8_t spd;
|
||||
uint8_t spd;
|
||||
};
|
||||
|
||||
void fw_sidrcv (struct firewire_comm *, u_int32_t *, u_int);
|
||||
void fw_sidrcv (struct firewire_comm *, uint32_t *, u_int);
|
||||
void fw_rcv (struct fw_rcv_buf *);
|
||||
void fw_xfer_unload ( struct fw_xfer*);
|
||||
void fw_xfer_free_buf ( struct fw_xfer*);
|
||||
@ -292,14 +292,14 @@ int fw_bindadd (struct firewire_comm *, struct fw_bind *);
|
||||
int fw_bindremove (struct firewire_comm *, struct fw_bind *);
|
||||
int fw_asyreq (struct firewire_comm *, int, struct fw_xfer*);
|
||||
void fw_busreset (struct firewire_comm *);
|
||||
u_int16_t fw_crc16 (u_int32_t *, u_int32_t);
|
||||
uint16_t fw_crc16 (uint32_t *, uint32_t);
|
||||
void fw_xfer_timeout (void *);
|
||||
void fw_xfer_done (struct fw_xfer *);
|
||||
void fw_asy_callback (struct fw_xfer *);
|
||||
void fw_asy_callback_free (struct fw_xfer *);
|
||||
struct fw_device *fw_noderesolve_nodeid (struct firewire_comm *, int);
|
||||
struct fw_device *fw_noderesolve_eui64 (struct firewire_comm *, struct fw_eui64 *);
|
||||
struct fw_bind *fw_bindlookup (struct firewire_comm *, u_int16_t, u_int32_t);
|
||||
struct fw_bind *fw_bindlookup (struct firewire_comm *, uint16_t, uint32_t);
|
||||
void fw_drain_txq (struct firewire_comm *);
|
||||
int fwdev_makedev (struct firewire_softc *);
|
||||
int fwdev_destroydev (struct firewire_softc *);
|
||||
|
||||
@ -61,11 +61,11 @@ __FBSDID("$FreeBSD$");
|
||||
#include <dev/firewire/iec13213.h>
|
||||
#endif
|
||||
|
||||
#define MAX_ROM (1024 - sizeof(u_int32_t) * 5)
|
||||
#define MAX_ROM (1024 - sizeof(uint32_t) * 5)
|
||||
#define CROM_END(cc) ((vm_offset_t)(cc)->stack[0].dir + MAX_ROM - 1)
|
||||
|
||||
void
|
||||
crom_init_context(struct crom_context *cc, u_int32_t *p)
|
||||
crom_init_context(struct crom_context *cc, uint32_t *p)
|
||||
{
|
||||
struct csrhdr *hdr;
|
||||
|
||||
@ -138,7 +138,7 @@ crom_next(struct crom_context *cc)
|
||||
|
||||
|
||||
struct csrreg *
|
||||
crom_search_key(struct crom_context *cc, u_int8_t key)
|
||||
crom_search_key(struct crom_context *cc, uint8_t key)
|
||||
{
|
||||
struct csrreg *reg;
|
||||
|
||||
@ -152,7 +152,7 @@ crom_search_key(struct crom_context *cc, u_int8_t key)
|
||||
}
|
||||
|
||||
int
|
||||
crom_has_specver(u_int32_t *p, u_int32_t spec, u_int32_t ver)
|
||||
crom_has_specver(uint32_t *p, uint32_t spec, uint32_t ver)
|
||||
{
|
||||
struct csrreg *reg;
|
||||
struct crom_context c, *cc;
|
||||
@ -183,7 +183,7 @@ crom_parse_text(struct crom_context *cc, char *buf, int len)
|
||||
{
|
||||
struct csrreg *reg;
|
||||
struct csrtext *textleaf;
|
||||
u_int32_t *bp;
|
||||
uint32_t *bp;
|
||||
int i, qlen;
|
||||
static char *nullstr = "(null)";
|
||||
|
||||
@ -205,7 +205,7 @@ crom_parse_text(struct crom_context *cc, char *buf, int len)
|
||||
|
||||
/* XXX should check spec and type */
|
||||
|
||||
bp = (u_int32_t *)&buf[0];
|
||||
bp = (uint32_t *)&buf[0];
|
||||
qlen = textleaf->crc_len - 2;
|
||||
if (len < qlen * 4)
|
||||
qlen = len/4;
|
||||
@ -218,11 +218,11 @@ crom_parse_text(struct crom_context *cc, char *buf, int len)
|
||||
buf[qlen * 4] = 0;
|
||||
}
|
||||
|
||||
u_int16_t
|
||||
crom_crc(u_int32_t *ptr, int len)
|
||||
uint16_t
|
||||
crom_crc(uint32_t *ptr, int len)
|
||||
{
|
||||
int i, shift;
|
||||
u_int32_t data, sum, crc = 0;
|
||||
uint32_t data, sum, crc = 0;
|
||||
|
||||
for (i = 0; i < len; i++) {
|
||||
data = ptr[i];
|
||||
@ -232,12 +232,12 @@ crom_crc(u_int32_t *ptr, int len)
|
||||
}
|
||||
crc &= 0xffff;
|
||||
}
|
||||
return((u_int16_t) crc);
|
||||
return((uint16_t) crc);
|
||||
}
|
||||
|
||||
#ifndef _KERNEL
|
||||
static void
|
||||
crom_desc_specver(u_int32_t spec, u_int32_t ver, char *buf, int len)
|
||||
crom_desc_specver(uint32_t spec, uint32_t ver, char *buf, int len)
|
||||
{
|
||||
char *s = NULL;
|
||||
|
||||
@ -295,7 +295,7 @@ crom_desc(struct crom_context *cc, char *buf, int len)
|
||||
struct csrreg *reg;
|
||||
struct csrdirectory *dir;
|
||||
char *desc, st;
|
||||
u_int16_t crc;
|
||||
uint16_t crc;
|
||||
|
||||
reg = crom_get(cc);
|
||||
switch (reg->key & CSRTYPE_MASK) {
|
||||
@ -316,7 +316,7 @@ crom_desc(struct crom_context *cc, char *buf, int len)
|
||||
/* XXX fall through */
|
||||
case CSRTYPE_D:
|
||||
dir = (struct csrdirectory *) (reg + reg->val);
|
||||
crc = crom_crc((u_int32_t *)&dir->entry[0], dir->crc_len);
|
||||
crc = crom_crc((uint32_t *)&dir->entry[0], dir->crc_len);
|
||||
len -= snprintf(buf, len, "len=%d crc=0x%04x(%s) ",
|
||||
dir->crc_len, dir->crc,
|
||||
(crc == dir->crc) ? "OK" : "NG");
|
||||
@ -386,7 +386,7 @@ crom_desc(struct crom_context *cc, char *buf, int len)
|
||||
#if defined(_KERNEL) || defined(TEST)
|
||||
|
||||
int
|
||||
crom_add_quad(struct crom_chunk *chunk, u_int32_t entry)
|
||||
crom_add_quad(struct crom_chunk *chunk, uint32_t entry)
|
||||
{
|
||||
int index;
|
||||
|
||||
@ -404,12 +404,12 @@ int
|
||||
crom_add_entry(struct crom_chunk *chunk, int key, int val)
|
||||
{
|
||||
struct csrreg *reg;
|
||||
u_int32_t i;
|
||||
uint32_t i;
|
||||
|
||||
reg = (struct csrreg *)&i;
|
||||
reg->key = key;
|
||||
reg->val = val;
|
||||
return(crom_add_quad(chunk, (u_int32_t) i));
|
||||
return(crom_add_quad(chunk, (uint32_t) i));
|
||||
}
|
||||
|
||||
int
|
||||
@ -439,7 +439,7 @@ crom_add_simple_text(struct crom_src *src, struct crom_chunk *parent,
|
||||
struct crom_chunk *chunk, char *buf)
|
||||
{
|
||||
struct csrtext *tl;
|
||||
u_int32_t *p;
|
||||
uint32_t *p;
|
||||
int len, i;
|
||||
char t[MAX_TEXT];
|
||||
|
||||
@ -454,37 +454,37 @@ crom_add_simple_text(struct crom_src *src, struct crom_chunk *parent,
|
||||
}
|
||||
|
||||
tl = (struct csrtext *) &chunk->data;
|
||||
tl->crc_len = howmany(sizeof(struct csrtext) + len, sizeof(u_int32_t));
|
||||
tl->crc_len = howmany(sizeof(struct csrtext) + len, sizeof(uint32_t));
|
||||
tl->spec_id = 0;
|
||||
tl->spec_type = 0;
|
||||
tl->lang_id = 0;
|
||||
bzero(&t[0], roundup2(len, sizeof(u_int32_t)));
|
||||
bzero(&t[0], roundup2(len, sizeof(uint32_t)));
|
||||
bcopy(buf, &t[0], len);
|
||||
p = (u_int32_t *)&t[0];
|
||||
for (i = 0; i < howmany(len, sizeof(u_int32_t)); i ++)
|
||||
p = (uint32_t *)&t[0];
|
||||
for (i = 0; i < howmany(len, sizeof(uint32_t)); i ++)
|
||||
tl->text[i] = ntohl(*p++);
|
||||
return (crom_add_chunk(src, parent, chunk, CROM_TEXTLEAF));
|
||||
}
|
||||
|
||||
static int
|
||||
crom_copy(u_int32_t *src, u_int32_t *dst, int *offset, int len, int maxlen)
|
||||
crom_copy(uint32_t *src, uint32_t *dst, int *offset, int len, int maxlen)
|
||||
{
|
||||
if (*offset + len > maxlen) {
|
||||
printf("Config. ROM is too large for the buffer\n");
|
||||
return(-1);
|
||||
}
|
||||
bcopy(src, (char *)(dst + *offset), len * sizeof(u_int32_t));
|
||||
bcopy(src, (char *)(dst + *offset), len * sizeof(uint32_t));
|
||||
*offset += len;
|
||||
return(0);
|
||||
}
|
||||
|
||||
int
|
||||
crom_load(struct crom_src *src, u_int32_t *buf, int maxlen)
|
||||
crom_load(struct crom_src *src, uint32_t *buf, int maxlen)
|
||||
{
|
||||
struct crom_chunk *chunk, *parent;
|
||||
struct csrhdr *hdr;
|
||||
#ifdef _KERNEL
|
||||
u_int32_t *ptr;
|
||||
uint32_t *ptr;
|
||||
int i;
|
||||
#endif
|
||||
int count, offset;
|
||||
@ -509,14 +509,14 @@ crom_load(struct crom_src *src, u_int32_t *buf, int maxlen)
|
||||
/* Calculate CRC and dump to the buffer */
|
||||
len = 1 + src->hdr.info_len;
|
||||
count = 0;
|
||||
if (crom_copy((u_int32_t *)&src->hdr, buf, &count, len, maxlen) < 0)
|
||||
if (crom_copy((uint32_t *)&src->hdr, buf, &count, len, maxlen) < 0)
|
||||
return(-1);
|
||||
STAILQ_FOREACH(chunk, &src->chunk_list, link) {
|
||||
chunk->data.crc =
|
||||
crom_crc(&chunk->data.buf[0], chunk->data.crc_len);
|
||||
|
||||
len = 1 + chunk->data.crc_len;
|
||||
if (crom_copy((u_int32_t *)&chunk->data, buf,
|
||||
if (crom_copy((uint32_t *)&chunk->data, buf,
|
||||
&count, len, maxlen) < 0)
|
||||
return(-1);
|
||||
}
|
||||
@ -543,7 +543,7 @@ main () {
|
||||
struct crom_src src;
|
||||
struct crom_chunk root,unit1,unit2,unit3;
|
||||
struct crom_chunk text1,text2,text3,text4,text5,text6,text7;
|
||||
u_int32_t buf[256], *p;
|
||||
uint32_t buf[256], *p;
|
||||
int i;
|
||||
|
||||
bzero(&src, sizeof(src));
|
||||
|
||||
@ -128,8 +128,8 @@ fwdev_allocbuf(struct firewire_comm *fc, struct fw_xferq *q,
|
||||
if (q->bulkxfer == NULL)
|
||||
return(ENOMEM);
|
||||
|
||||
b->psize = roundup2(b->psize, sizeof(u_int32_t));
|
||||
q->buf = fwdma_malloc_multiseg(fc, sizeof(u_int32_t),
|
||||
b->psize = roundup2(b->psize, sizeof(uint32_t));
|
||||
q->buf = fwdma_malloc_multiseg(fc, sizeof(uint32_t),
|
||||
b->psize, b->nchunk * b->npacket, BUS_DMA_WAITOK);
|
||||
|
||||
if (q->buf == NULL) {
|
||||
@ -347,7 +347,7 @@ fw_read (dev_t dev, struct uio *uio, int ioflag)
|
||||
return err;
|
||||
}
|
||||
err = uiomove((caddr_t)fp,
|
||||
fp->mode.stream.len + sizeof(u_int32_t), uio);
|
||||
fp->mode.stream.len + sizeof(uint32_t), uio);
|
||||
ir->queued ++;
|
||||
if(ir->queued >= ir->bnpacket){
|
||||
s = splfw();
|
||||
@ -694,7 +694,7 @@ fw_ioctl (dev_t dev, u_long cmd, caddr_t data, int flag, fw_proc *td)
|
||||
ptr = malloc(CROMSIZE, M_FW, M_WAITOK);
|
||||
len = CROMSIZE;
|
||||
for (i = 0; i < CROMSIZE/4; i++)
|
||||
((u_int32_t *)ptr)[i]
|
||||
((uint32_t *)ptr)[i]
|
||||
= ntohl(sc->fc->config_rom[i]);
|
||||
} else {
|
||||
/* found */
|
||||
|
||||
@ -127,9 +127,9 @@ struct fw_xfer *
|
||||
fwmem_read_quad(
|
||||
struct fw_device *fwdev,
|
||||
caddr_t sc,
|
||||
u_int8_t spd,
|
||||
u_int16_t dst_hi,
|
||||
u_int32_t dst_lo,
|
||||
uint8_t spd,
|
||||
uint16_t dst_hi,
|
||||
uint32_t dst_lo,
|
||||
void *data,
|
||||
void (*hand)(struct fw_xfer *))
|
||||
{
|
||||
@ -147,7 +147,7 @@ fwmem_read_quad(
|
||||
fp->mode.rreqq.dest_lo = dst_lo;
|
||||
|
||||
xfer->send.payload = NULL;
|
||||
xfer->recv.payload = (u_int32_t *)data;
|
||||
xfer->recv.payload = (uint32_t *)data;
|
||||
|
||||
if (fwmem_debug)
|
||||
printf("fwmem_read_quad: %d %04x:%08x\n", fwdev->dst,
|
||||
@ -164,9 +164,9 @@ struct fw_xfer *
|
||||
fwmem_write_quad(
|
||||
struct fw_device *fwdev,
|
||||
caddr_t sc,
|
||||
u_int8_t spd,
|
||||
u_int16_t dst_hi,
|
||||
u_int32_t dst_lo,
|
||||
uint8_t spd,
|
||||
uint16_t dst_hi,
|
||||
uint32_t dst_lo,
|
||||
void *data,
|
||||
void (*hand)(struct fw_xfer *))
|
||||
{
|
||||
@ -181,13 +181,13 @@ fwmem_write_quad(
|
||||
fp->mode.wreqq.tcode = FWTCODE_WREQQ;
|
||||
fp->mode.wreqq.dest_hi = dst_hi;
|
||||
fp->mode.wreqq.dest_lo = dst_lo;
|
||||
fp->mode.wreqq.data = *(u_int32_t *)data;
|
||||
fp->mode.wreqq.data = *(uint32_t *)data;
|
||||
|
||||
xfer->send.payload = xfer->recv.payload = NULL;
|
||||
|
||||
if (fwmem_debug)
|
||||
printf("fwmem_write_quad: %d %04x:%08x %08x\n", fwdev->dst,
|
||||
dst_hi, dst_lo, *(u_int32_t *)data);
|
||||
dst_hi, dst_lo, *(uint32_t *)data);
|
||||
|
||||
if (fw_asyreq(xfer->fc, -1, xfer) == 0)
|
||||
return xfer;
|
||||
@ -200,9 +200,9 @@ struct fw_xfer *
|
||||
fwmem_read_block(
|
||||
struct fw_device *fwdev,
|
||||
caddr_t sc,
|
||||
u_int8_t spd,
|
||||
u_int16_t dst_hi,
|
||||
u_int32_t dst_lo,
|
||||
uint8_t spd,
|
||||
uint16_t dst_hi,
|
||||
uint32_t dst_lo,
|
||||
int len,
|
||||
void *data,
|
||||
void (*hand)(struct fw_xfer *))
|
||||
@ -238,9 +238,9 @@ struct fw_xfer *
|
||||
fwmem_write_block(
|
||||
struct fw_device *fwdev,
|
||||
caddr_t sc,
|
||||
u_int8_t spd,
|
||||
u_int16_t dst_hi,
|
||||
u_int32_t dst_lo,
|
||||
uint8_t spd,
|
||||
uint16_t dst_hi,
|
||||
uint32_t dst_lo,
|
||||
int len,
|
||||
void *data,
|
||||
void (*hand)(struct fw_xfer *))
|
||||
|
||||
@ -34,14 +34,14 @@
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
struct fw_xfer *fwmem_read_quad(struct fw_device *, caddr_t, u_int8_t,
|
||||
u_int16_t, u_int32_t, void *, void (*)(struct fw_xfer *));
|
||||
struct fw_xfer *fwmem_write_quad(struct fw_device *, caddr_t, u_int8_t,
|
||||
u_int16_t, u_int32_t, void *, void (*)(struct fw_xfer *));
|
||||
struct fw_xfer *fwmem_read_block(struct fw_device *, caddr_t, u_int8_t,
|
||||
u_int16_t, u_int32_t, int, void *, void (*)(struct fw_xfer *));
|
||||
struct fw_xfer *fwmem_write_block(struct fw_device *, caddr_t, u_int8_t,
|
||||
u_int16_t, u_int32_t, int, void *, void (*)(struct fw_xfer *));
|
||||
struct fw_xfer *fwmem_read_quad(struct fw_device *, caddr_t, uint8_t,
|
||||
uint16_t, uint32_t, void *, void (*)(struct fw_xfer *));
|
||||
struct fw_xfer *fwmem_write_quad(struct fw_device *, caddr_t, uint8_t,
|
||||
uint16_t, uint32_t, void *, void (*)(struct fw_xfer *));
|
||||
struct fw_xfer *fwmem_read_block(struct fw_device *, caddr_t, uint8_t,
|
||||
uint16_t, uint32_t, int, void *, void (*)(struct fw_xfer *));
|
||||
struct fw_xfer *fwmem_write_block(struct fw_device *, caddr_t, uint8_t,
|
||||
uint16_t, uint32_t, int, void *, void (*)(struct fw_xfer *));
|
||||
|
||||
d_open_t fwmem_open;
|
||||
d_close_t fwmem_close;
|
||||
|
||||
@ -94,7 +94,7 @@ char fwohcicode[32][0x20]={
|
||||
|
||||
#define MAX_SPEED 3
|
||||
extern char *linkspeed[];
|
||||
u_int32_t tagbit[4] = { 1 << 28, 1 << 29, 1 << 30, 1 << 31};
|
||||
uint32_t tagbit[4] = { 1 << 28, 1 << 29, 1 << 30, 1 << 31};
|
||||
|
||||
static struct tcode_info tinfo[] = {
|
||||
/* hdr_len block flag*/
|
||||
@ -130,14 +130,14 @@ static void fwohci_txd (struct fwohci_softc *, struct fwohci_dbch *);
|
||||
static void fwohci_start_atq (struct firewire_comm *);
|
||||
static void fwohci_start_ats (struct firewire_comm *);
|
||||
static void fwohci_start (struct fwohci_softc *, struct fwohci_dbch *);
|
||||
static u_int32_t fwphy_wrdata ( struct fwohci_softc *, u_int32_t, u_int32_t);
|
||||
static u_int32_t fwphy_rddata ( struct fwohci_softc *, u_int32_t);
|
||||
static uint32_t fwphy_wrdata ( struct fwohci_softc *, uint32_t, uint32_t);
|
||||
static uint32_t fwphy_rddata ( struct fwohci_softc *, uint32_t);
|
||||
static int fwohci_rx_enable (struct fwohci_softc *, struct fwohci_dbch *);
|
||||
static int fwohci_tx_enable (struct fwohci_softc *, struct fwohci_dbch *);
|
||||
static int fwohci_irx_enable (struct firewire_comm *, int);
|
||||
static int fwohci_irx_disable (struct firewire_comm *, int);
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
static void fwohci_irx_post (struct firewire_comm *, u_int32_t *);
|
||||
static void fwohci_irx_post (struct firewire_comm *, uint32_t *);
|
||||
#endif
|
||||
static int fwohci_itxbuf_enable (struct firewire_comm *, int);
|
||||
static int fwohci_itx_disable (struct firewire_comm *, int);
|
||||
@ -146,10 +146,10 @@ static void fwohci_set_intr (struct firewire_comm *, int);
|
||||
|
||||
static int fwohci_add_rx_buf (struct fwohci_dbch *, struct fwohcidb_tr *, int, struct fwdma_alloc *);
|
||||
static int fwohci_add_tx_buf (struct fwohci_dbch *, struct fwohcidb_tr *, int);
|
||||
static void dump_db (struct fwohci_softc *, u_int32_t);
|
||||
static void print_db (struct fwohcidb_tr *, struct fwohcidb *, u_int32_t , u_int32_t);
|
||||
static void dump_dma (struct fwohci_softc *, u_int32_t);
|
||||
static u_int32_t fwohci_cyctimer (struct firewire_comm *);
|
||||
static void dump_db (struct fwohci_softc *, uint32_t);
|
||||
static void print_db (struct fwohcidb_tr *, struct fwohcidb *, uint32_t , uint32_t);
|
||||
static void dump_dma (struct fwohci_softc *, uint32_t);
|
||||
static uint32_t fwohci_cyctimer (struct firewire_comm *);
|
||||
static void fwohci_rbuf_update (struct fwohci_softc *, int);
|
||||
static void fwohci_tbuf_update (struct fwohci_softc *, int);
|
||||
void fwohci_txbufdb (struct fwohci_softc *, int , struct fw_bulkxfer *);
|
||||
@ -258,10 +258,10 @@ d_ioctl_t fwohci_ioctl;
|
||||
/*
|
||||
* Communication with PHY device
|
||||
*/
|
||||
static u_int32_t
|
||||
fwphy_wrdata( struct fwohci_softc *sc, u_int32_t addr, u_int32_t data)
|
||||
static uint32_t
|
||||
fwphy_wrdata( struct fwohci_softc *sc, uint32_t addr, uint32_t data)
|
||||
{
|
||||
u_int32_t fun;
|
||||
uint32_t fun;
|
||||
|
||||
addr &= 0xf;
|
||||
data &= 0xff;
|
||||
@ -273,12 +273,12 @@ fwphy_wrdata( struct fwohci_softc *sc, u_int32_t addr, u_int32_t data)
|
||||
return(fwphy_rddata( sc, addr));
|
||||
}
|
||||
|
||||
static u_int32_t
|
||||
static uint32_t
|
||||
fwohci_set_bus_manager(struct firewire_comm *fc, u_int node)
|
||||
{
|
||||
struct fwohci_softc *sc = (struct fwohci_softc *)fc;
|
||||
int i;
|
||||
u_int32_t bm;
|
||||
uint32_t bm;
|
||||
|
||||
#define OHCI_CSR_DATA 0x0c
|
||||
#define OHCI_CSR_COMP 0x10
|
||||
@ -300,10 +300,10 @@ fwohci_set_bus_manager(struct firewire_comm *fc, u_int node)
|
||||
return(bm);
|
||||
}
|
||||
|
||||
static u_int32_t
|
||||
static uint32_t
|
||||
fwphy_rddata(struct fwohci_softc *sc, u_int addr)
|
||||
{
|
||||
u_int32_t fun, stat;
|
||||
uint32_t fun, stat;
|
||||
u_int i, retry = 0;
|
||||
|
||||
addr &= 0xf;
|
||||
@ -352,7 +352,7 @@ fwohci_ioctl (dev_t dev, u_long cmd, caddr_t data, int flag, fw_proc *td)
|
||||
int unit = DEV2UNIT(dev);
|
||||
int err = 0;
|
||||
struct fw_reg_req_t *reg = (struct fw_reg_req_t *) data;
|
||||
u_int32_t *dmach = (u_int32_t *) data;
|
||||
uint32_t *dmach = (uint32_t *) data;
|
||||
|
||||
sc = devclass_get_softc(firewire_devclass, unit);
|
||||
if(sc == NULL){
|
||||
@ -413,7 +413,7 @@ fwohci_ioctl (dev_t dev, u_long cmd, caddr_t data, int flag, fw_proc *td)
|
||||
static int
|
||||
fwohci_probe_phy(struct fwohci_softc *sc, device_t dev)
|
||||
{
|
||||
u_int32_t reg, reg2;
|
||||
uint32_t reg, reg2;
|
||||
int e1394a = 1;
|
||||
/*
|
||||
* probe PHY parameters
|
||||
@ -488,7 +488,7 @@ void
|
||||
fwohci_reset(struct fwohci_softc *sc, device_t dev)
|
||||
{
|
||||
int i, max_rec, speed;
|
||||
u_int32_t reg, reg2;
|
||||
uint32_t reg, reg2;
|
||||
struct fwohcidb_tr *db_tr;
|
||||
|
||||
/* Disable interrupts */
|
||||
@ -594,8 +594,8 @@ int
|
||||
fwohci_init(struct fwohci_softc *sc, device_t dev)
|
||||
{
|
||||
int i, mver;
|
||||
u_int32_t reg;
|
||||
u_int8_t ui[8];
|
||||
uint32_t reg;
|
||||
uint8_t ui[8];
|
||||
|
||||
#if FWOHCI_TASKQUEUE
|
||||
TASK_INIT(&sc->fwohci_task_complete, 0, fwohci_complete, sc);
|
||||
@ -701,7 +701,7 @@ fwohci_init(struct fwohci_softc *sc, device_t dev)
|
||||
return ENOMEM;
|
||||
}
|
||||
|
||||
fwdma_malloc(&sc->fc, sizeof(u_int32_t), sizeof(u_int32_t),
|
||||
fwdma_malloc(&sc->fc, sizeof(uint32_t), sizeof(uint32_t),
|
||||
&sc->dummy_dma, BUS_DMA_WAITOK);
|
||||
|
||||
if (sc->dummy_dma.v_addr == NULL) {
|
||||
@ -767,7 +767,7 @@ fwohci_timeout(void *arg)
|
||||
sc = (struct fwohci_softc *)arg;
|
||||
}
|
||||
|
||||
u_int32_t
|
||||
uint32_t
|
||||
fwohci_cyctimer(struct firewire_comm *fc)
|
||||
{
|
||||
struct fwohci_softc *sc = (struct fwohci_softc *)fc;
|
||||
@ -842,13 +842,13 @@ fwohci_start(struct fwohci_softc *sc, struct fwohci_dbch *dbch)
|
||||
int i, s;
|
||||
int tcode, hdr_len, pl_off;
|
||||
int fsegment = -1;
|
||||
u_int32_t off;
|
||||
uint32_t off;
|
||||
struct fw_xfer *xfer;
|
||||
struct fw_pkt *fp;
|
||||
struct fwohci_txpkthdr *ohcifp;
|
||||
struct fwohcidb_tr *db_tr;
|
||||
struct fwohcidb *db;
|
||||
u_int32_t *ld;
|
||||
uint32_t *ld;
|
||||
struct tcode_info *info;
|
||||
static int maxdesc=0;
|
||||
|
||||
@ -1037,7 +1037,7 @@ fwohci_txd(struct fwohci_softc *sc, struct fwohci_dbch *dbch)
|
||||
struct fwohcidb_tr *tr;
|
||||
struct fwohcidb *db;
|
||||
struct fw_xfer *xfer;
|
||||
u_int32_t off;
|
||||
uint32_t off;
|
||||
u_int stat, status;
|
||||
int packets;
|
||||
struct firewire_comm *fc = (struct firewire_comm *)sc;
|
||||
@ -1311,7 +1311,7 @@ fwohci_irx_disable(struct firewire_comm *fc, int dmach)
|
||||
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
static void
|
||||
fwohci_irx_post (struct firewire_comm *fc , u_int32_t *qld)
|
||||
fwohci_irx_post (struct firewire_comm *fc , uint32_t *qld)
|
||||
{
|
||||
qld[0] = FWOHCI_DMA_READ(qld[0]);
|
||||
return;
|
||||
@ -1323,7 +1323,7 @@ fwohci_tx_enable(struct fwohci_softc *sc, struct fwohci_dbch *dbch)
|
||||
{
|
||||
int err = 0;
|
||||
int idb, z, i, dmach = 0, ldesc;
|
||||
u_int32_t off = 0;
|
||||
uint32_t off = 0;
|
||||
struct fwohcidb_tr *db_tr;
|
||||
struct fwohcidb *db;
|
||||
|
||||
@ -1382,7 +1382,7 @@ fwohci_rx_enable(struct fwohci_softc *sc, struct fwohci_dbch *dbch)
|
||||
{
|
||||
int err = 0;
|
||||
int idb, z, i, dmach = 0, ldesc;
|
||||
u_int32_t off = 0;
|
||||
uint32_t off = 0;
|
||||
struct fwohcidb_tr *db_tr;
|
||||
struct fwohcidb *db;
|
||||
|
||||
@ -1491,7 +1491,7 @@ fwohci_itxbuf_enable(struct firewire_comm *fc, int dmach)
|
||||
unsigned short tag, ich;
|
||||
struct fwohci_dbch *dbch;
|
||||
int cycle_match, cycle_now, s, ldesc;
|
||||
u_int32_t stat;
|
||||
uint32_t stat;
|
||||
struct fw_bulkxfer *first, *chunk, *prev;
|
||||
struct fw_xferq *it;
|
||||
|
||||
@ -1607,7 +1607,7 @@ fwohci_irx_enable(struct firewire_comm *fc, int dmach)
|
||||
struct fwohci_softc *sc = (struct fwohci_softc *)fc;
|
||||
int err = 0, s, ldesc;
|
||||
unsigned short tag, ich;
|
||||
u_int32_t stat;
|
||||
uint32_t stat;
|
||||
struct fwohci_dbch *dbch;
|
||||
struct fwohcidb_tr *db_tr;
|
||||
struct fw_bulkxfer *first, *prev, *chunk;
|
||||
@ -1762,9 +1762,9 @@ fwohci_resume(struct fwohci_softc *sc, device_t dev)
|
||||
|
||||
#define ACK_ALL
|
||||
static void
|
||||
fwohci_intr_body(struct fwohci_softc *sc, u_int32_t stat, int count)
|
||||
fwohci_intr_body(struct fwohci_softc *sc, uint32_t stat, int count)
|
||||
{
|
||||
u_int32_t irstat, itstat;
|
||||
uint32_t irstat, itstat;
|
||||
u_int i;
|
||||
struct firewire_comm *fc = (struct firewire_comm *)sc;
|
||||
|
||||
@ -1880,7 +1880,7 @@ fwohci_intr_body(struct fwohci_softc *sc, u_int32_t stat, int count)
|
||||
fwohci_arcv(sc, &sc->arrq, count);
|
||||
}
|
||||
if(stat & OHCI_INT_PHY_SID){
|
||||
u_int32_t *buf, node_id;
|
||||
uint32_t *buf, node_id;
|
||||
int plen;
|
||||
|
||||
#ifndef ACK_ALL
|
||||
@ -1930,7 +1930,7 @@ fwohci_intr_body(struct fwohci_softc *sc, u_int32_t stat, int count)
|
||||
goto sidout;
|
||||
}
|
||||
plen -= 4; /* chop control info */
|
||||
buf = (u_int32_t *)malloc(OHCI_SIDSIZE, M_FW, M_NOWAIT);
|
||||
buf = (uint32_t *)malloc(OHCI_SIDSIZE, M_FW, M_NOWAIT);
|
||||
if (buf == NULL) {
|
||||
device_printf(fc->dev, "malloc failed\n");
|
||||
goto sidout;
|
||||
@ -1988,7 +1988,7 @@ static void
|
||||
fwohci_complete(void *arg, int pending)
|
||||
{
|
||||
struct fwohci_softc *sc = (struct fwohci_softc *)arg;
|
||||
u_int32_t stat;
|
||||
uint32_t stat;
|
||||
|
||||
again:
|
||||
stat = atomic_readandclear_int(&sc->intstat);
|
||||
@ -2000,10 +2000,10 @@ fwohci_complete(void *arg, int pending)
|
||||
}
|
||||
#endif
|
||||
|
||||
static u_int32_t
|
||||
static uint32_t
|
||||
fwochi_check_stat(struct fwohci_softc *sc)
|
||||
{
|
||||
u_int32_t stat, irstat, itstat;
|
||||
uint32_t stat, irstat, itstat;
|
||||
|
||||
stat = OREAD(sc, FWOHCI_INTSTAT);
|
||||
if (stat == 0xffffffff) {
|
||||
@ -2032,9 +2032,9 @@ void
|
||||
fwohci_intr(void *arg)
|
||||
{
|
||||
struct fwohci_softc *sc = (struct fwohci_softc *)arg;
|
||||
u_int32_t stat;
|
||||
uint32_t stat;
|
||||
#if !FWOHCI_TASKQUEUE
|
||||
u_int32_t bus_reset = 0;
|
||||
uint32_t bus_reset = 0;
|
||||
#endif
|
||||
|
||||
if (!(sc->intmask & OHCI_INT_EN)) {
|
||||
@ -2067,7 +2067,7 @@ void
|
||||
fwohci_poll(struct firewire_comm *fc, int quick, int count)
|
||||
{
|
||||
int s;
|
||||
u_int32_t stat;
|
||||
uint32_t stat;
|
||||
struct fwohci_softc *sc;
|
||||
|
||||
|
||||
@ -2113,7 +2113,7 @@ fwohci_tbuf_update(struct fwohci_softc *sc, int dmach)
|
||||
struct fwohcidb *db;
|
||||
struct fw_bulkxfer *chunk;
|
||||
struct fw_xferq *it;
|
||||
u_int32_t stat, count;
|
||||
uint32_t stat, count;
|
||||
int s, w=0, ldesc;
|
||||
|
||||
it = fc->it[dmach];
|
||||
@ -2159,7 +2159,7 @@ fwohci_rbuf_update(struct fwohci_softc *sc, int dmach)
|
||||
struct fwohcidb_tr *db_tr;
|
||||
struct fw_bulkxfer *chunk;
|
||||
struct fw_xferq *ir;
|
||||
u_int32_t stat;
|
||||
uint32_t stat;
|
||||
int s, w=0, ldesc;
|
||||
|
||||
ir = fc->ir[dmach];
|
||||
@ -2212,9 +2212,9 @@ fwohci_rbuf_update(struct fwohci_softc *sc, int dmach)
|
||||
}
|
||||
|
||||
void
|
||||
dump_dma(struct fwohci_softc *sc, u_int32_t ch)
|
||||
dump_dma(struct fwohci_softc *sc, uint32_t ch)
|
||||
{
|
||||
u_int32_t off, cntl, stat, cmd, match;
|
||||
uint32_t off, cntl, stat, cmd, match;
|
||||
|
||||
if(ch == 0){
|
||||
off = OHCI_ATQOFF;
|
||||
@ -2257,13 +2257,13 @@ dump_dma(struct fwohci_softc *sc, u_int32_t ch)
|
||||
}
|
||||
|
||||
void
|
||||
dump_db(struct fwohci_softc *sc, u_int32_t ch)
|
||||
dump_db(struct fwohci_softc *sc, uint32_t ch)
|
||||
{
|
||||
struct fwohci_dbch *dbch;
|
||||
struct fwohcidb_tr *cp = NULL, *pp, *np = NULL;
|
||||
struct fwohcidb *curr = NULL, *prev, *next = NULL;
|
||||
int idb, jdb;
|
||||
u_int32_t cmd, off;
|
||||
uint32_t cmd, off;
|
||||
if(ch == 0){
|
||||
off = OHCI_ATQOFF;
|
||||
dbch = &sc->atrq;
|
||||
@ -2336,11 +2336,11 @@ dump_db(struct fwohci_softc *sc, u_int32_t ch)
|
||||
|
||||
void
|
||||
print_db(struct fwohcidb_tr *db_tr, struct fwohcidb *db,
|
||||
u_int32_t ch, u_int32_t max)
|
||||
uint32_t ch, uint32_t max)
|
||||
{
|
||||
fwohcireg_t stat;
|
||||
int i, key;
|
||||
u_int32_t cmd, res;
|
||||
uint32_t cmd, res;
|
||||
|
||||
if(db == NULL){
|
||||
printf("No Descriptor is found\n");
|
||||
@ -2427,7 +2427,7 @@ void
|
||||
fwohci_ibr(struct firewire_comm *fc)
|
||||
{
|
||||
struct fwohci_softc *sc;
|
||||
u_int32_t fun;
|
||||
uint32_t fun;
|
||||
|
||||
device_printf(fc->dev, "Initiate bus reset\n");
|
||||
sc = (struct fwohci_softc *)fc;
|
||||
@ -2534,7 +2534,7 @@ fwohci_add_tx_buf(struct fwohci_dbch *dbch, struct fwohcidb_tr *db_tr,
|
||||
FWOHCI_DMA_WRITE(db[0].db.desc.addr, 0);
|
||||
bzero((void *)&db[1].db.immed[0], sizeof(db[1].db.immed));
|
||||
FWOHCI_DMA_WRITE(db[2].db.desc.addr,
|
||||
fwdma_bus_addr(it->buf, poffset) + sizeof(u_int32_t));
|
||||
fwdma_bus_addr(it->buf, poffset) + sizeof(uint32_t));
|
||||
|
||||
FWOHCI_DMA_WRITE(db[2].db.desc.cmd,
|
||||
OHCI_OUTPUT_LAST | OHCI_UPDATE | OHCI_BRANCH_ALWAYS);
|
||||
@ -2568,7 +2568,7 @@ fwohci_add_rx_buf(struct fwohci_dbch *dbch, struct fwohcidb_tr *db_tr,
|
||||
} else {
|
||||
db_tr->dbcnt = 0;
|
||||
if (dummy_dma != NULL) {
|
||||
dsiz[db_tr->dbcnt] = sizeof(u_int32_t);
|
||||
dsiz[db_tr->dbcnt] = sizeof(uint32_t);
|
||||
dbuf[db_tr->dbcnt++] = dummy_dma->bus_addr;
|
||||
}
|
||||
dsiz[db_tr->dbcnt] = ir->psize;
|
||||
@ -2599,7 +2599,7 @@ static int
|
||||
fwohci_arcv_swap(struct fw_pkt *fp, int len)
|
||||
{
|
||||
struct fw_pkt *fp0;
|
||||
u_int32_t ld0;
|
||||
uint32_t ld0;
|
||||
int slen, hlen;
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
int i;
|
||||
@ -2650,11 +2650,11 @@ fwohci_get_plen(struct fwohci_softc *sc, struct fwohci_dbch *dbch, struct fw_pkt
|
||||
int r;
|
||||
|
||||
info = &tinfo[fp->mode.common.tcode];
|
||||
r = info->hdr_len + sizeof(u_int32_t);
|
||||
r = info->hdr_len + sizeof(uint32_t);
|
||||
if ((info->flag & FWTI_BLOCK_ASY) != 0)
|
||||
r += roundup2(fp->mode.wreqb.len, sizeof(u_int32_t));
|
||||
r += roundup2(fp->mode.wreqb.len, sizeof(uint32_t));
|
||||
|
||||
if (r == sizeof(u_int32_t))
|
||||
if (r == sizeof(uint32_t))
|
||||
/* XXX */
|
||||
device_printf(sc->fc.dev, "Unknown tcode %d\n",
|
||||
fp->mode.common.tcode);
|
||||
@ -2687,8 +2687,8 @@ fwohci_arcv(struct fwohci_softc *sc, struct fwohci_dbch *dbch, int count)
|
||||
struct fw_pkt pktbuf;
|
||||
int nvec;
|
||||
struct fw_pkt *fp;
|
||||
u_int8_t *ld;
|
||||
u_int32_t stat, off, status;
|
||||
uint8_t *ld;
|
||||
uint32_t stat, off, status;
|
||||
u_int spd;
|
||||
int len, plen, hlen, pcnt, offset;
|
||||
int s;
|
||||
@ -2716,7 +2716,7 @@ fwohci_arcv(struct fwohci_softc *sc, struct fwohci_dbch *dbch, int count)
|
||||
#endif
|
||||
while (status & OHCI_CNTL_DMA_ACTIVE) {
|
||||
len = dbch->xferq.psize - resCount;
|
||||
ld = (u_int8_t *)db_tr->buf;
|
||||
ld = (uint8_t *)db_tr->buf;
|
||||
if (dbch->pdb_tr == NULL) {
|
||||
len -= dbch->buf_offset;
|
||||
ld += dbch->buf_offset;
|
||||
@ -2815,7 +2815,7 @@ fwohci_arcv(struct fwohci_softc *sc, struct fwohci_dbch *dbch, int count)
|
||||
nvec ++;
|
||||
ld += plen;
|
||||
}
|
||||
dbch->buf_offset = ld - (u_int8_t *)db_tr->buf;
|
||||
dbch->buf_offset = ld - (uint8_t *)db_tr->buf;
|
||||
if (nvec == 0)
|
||||
printf("nvec == 0\n");
|
||||
|
||||
|
||||
@ -92,7 +92,7 @@ static int
|
||||
fwohci_pci_probe( device_t dev )
|
||||
{
|
||||
#if 1
|
||||
u_int32_t id;
|
||||
uint32_t id;
|
||||
|
||||
id = pci_get_devid(dev);
|
||||
if (id == (FW_VENDORID_NEC | FW_DEVICE_UPD861)) {
|
||||
@ -208,7 +208,7 @@ static int
|
||||
fwohci_pci_init(device_t self)
|
||||
{
|
||||
int olatency, latency, ocache_line, cache_line;
|
||||
u_int16_t cmd;
|
||||
uint16_t cmd;
|
||||
|
||||
cmd = pci_read_config(self, PCIR_COMMAND, 2);
|
||||
cmd |= PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN |
|
||||
|
||||
@ -77,7 +77,7 @@
|
||||
#define OHCI_MAX_DMA_CH (0x4 + OHCI_DMA_ITCH + OHCI_DMA_IRCH)
|
||||
|
||||
|
||||
typedef u_int32_t fwohcireg_t;
|
||||
typedef uint32_t fwohcireg_t;
|
||||
|
||||
/* for PCI */
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
@ -95,12 +95,12 @@ typedef u_int32_t fwohcireg_t;
|
||||
struct fwohcidb {
|
||||
union {
|
||||
struct {
|
||||
u_int32_t cmd;
|
||||
u_int32_t addr;
|
||||
u_int32_t depend;
|
||||
u_int32_t res;
|
||||
uint32_t cmd;
|
||||
uint32_t addr;
|
||||
uint32_t depend;
|
||||
uint32_t res;
|
||||
} desc;
|
||||
u_int32_t immed[4];
|
||||
uint32_t immed[4];
|
||||
} db;
|
||||
#define OHCI_STATUS_SHIFT 16
|
||||
#define OHCI_COUNT_MASK 0xffff
|
||||
@ -331,60 +331,60 @@ struct fwohcidb_tr{
|
||||
*/
|
||||
struct fwohci_txpkthdr{
|
||||
union{
|
||||
u_int32_t ld[4];
|
||||
uint32_t ld[4];
|
||||
struct {
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
u_int32_t spd:16, /* XXX include reserved field */
|
||||
:8,
|
||||
tcode:4,
|
||||
:4;
|
||||
uint32_t spd:16, /* XXX include reserved field */
|
||||
:8,
|
||||
tcode:4,
|
||||
:4;
|
||||
#else
|
||||
u_int32_t :4,
|
||||
tcode:4,
|
||||
:8,
|
||||
spd:16; /* XXX include reserved fields */
|
||||
uint32_t :4,
|
||||
tcode:4,
|
||||
:8,
|
||||
spd:16; /* XXX include reserved fields */
|
||||
#endif
|
||||
}common;
|
||||
struct {
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
u_int32_t :8,
|
||||
srcbus:1,
|
||||
:4,
|
||||
spd:3,
|
||||
tlrt:8,
|
||||
tcode:4,
|
||||
:4;
|
||||
uint32_t :8,
|
||||
srcbus:1,
|
||||
:4,
|
||||
spd:3,
|
||||
tlrt:8,
|
||||
tcode:4,
|
||||
:4;
|
||||
#else
|
||||
u_int32_t :4,
|
||||
tcode:4,
|
||||
tlrt:8,
|
||||
spd:3,
|
||||
:4,
|
||||
srcbus:1,
|
||||
:8;
|
||||
uint32_t :4,
|
||||
tcode:4,
|
||||
tlrt:8,
|
||||
spd:3,
|
||||
:4,
|
||||
srcbus:1,
|
||||
:8;
|
||||
#endif
|
||||
BIT16x2(dst, );
|
||||
}asycomm;
|
||||
struct {
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
u_int32_t :13,
|
||||
spd:3,
|
||||
chtag:8,
|
||||
tcode:4,
|
||||
sy:4;
|
||||
uint32_t :13,
|
||||
spd:3,
|
||||
chtag:8,
|
||||
tcode:4,
|
||||
sy:4;
|
||||
#else
|
||||
u_int32_t sy:4,
|
||||
tcode:4,
|
||||
chtag:8,
|
||||
spd:3,
|
||||
:13;
|
||||
uint32_t sy:4,
|
||||
tcode:4,
|
||||
chtag:8,
|
||||
spd:3,
|
||||
:13;
|
||||
#endif
|
||||
BIT16x2(len, );
|
||||
}stream;
|
||||
}mode;
|
||||
};
|
||||
struct fwohci_trailer{
|
||||
u_int32_t time:16,
|
||||
uint32_t time:16,
|
||||
stat:16;
|
||||
};
|
||||
|
||||
|
||||
@ -72,13 +72,13 @@ typedef struct fwohci_softc {
|
||||
bus_dma_tag_t dmat;
|
||||
} arrq, arrs, atrq, atrs, it[OHCI_DMA_ITCH], ir[OHCI_DMA_IRCH];
|
||||
u_int maxrec;
|
||||
u_int32_t *sid_buf;
|
||||
uint32_t *sid_buf;
|
||||
struct fwdma_alloc sid_dma;
|
||||
struct fwdma_alloc crom_dma;
|
||||
struct fwdma_alloc dummy_dma;
|
||||
u_int32_t intmask, irstat, itstat;
|
||||
uint32_t intmask, irstat, itstat;
|
||||
#if FWOHCI_TASKQUEUE
|
||||
u_int32_t intstat;
|
||||
uint32_t intstat;
|
||||
struct task fwohci_task_complete;
|
||||
#endif
|
||||
} fwohci_softc_t;
|
||||
|
||||
@ -36,133 +36,133 @@
|
||||
|
||||
struct phyreg_base {
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
u_int8_t phy_id:6,
|
||||
r:1,
|
||||
cps:1;
|
||||
u_int8_t rhb:1,
|
||||
ibr:1,
|
||||
gap_count:6;
|
||||
u_int8_t extended:3,
|
||||
num_ports:5;
|
||||
u_int8_t phy_speed:3,
|
||||
:1,
|
||||
delay:4;
|
||||
u_int8_t lctrl:1,
|
||||
c:1,
|
||||
jitter:3,
|
||||
pwr_class:3;
|
||||
u_int8_t wdie:1,
|
||||
isbr:1,
|
||||
ctoi:1,
|
||||
cpsi:1,
|
||||
stoi:1,
|
||||
pei:1,
|
||||
eaa:1,
|
||||
emc:1;
|
||||
u_int8_t legacy_spd:3,
|
||||
blink:1,
|
||||
bridge:2,
|
||||
:2;
|
||||
u_int8_t page_select:3,
|
||||
:1,
|
||||
port_select:4;
|
||||
uint8_t phy_id:6,
|
||||
r:1,
|
||||
cps:1;
|
||||
uint8_t rhb:1,
|
||||
ibr:1,
|
||||
gap_count:6;
|
||||
uint8_t extended:3,
|
||||
num_ports:5;
|
||||
uint8_t phy_speed:3,
|
||||
:1,
|
||||
delay:4;
|
||||
uint8_t lctrl:1,
|
||||
c:1,
|
||||
jitter:3,
|
||||
pwr_class:3;
|
||||
uint8_t wdie:1,
|
||||
isbr:1,
|
||||
ctoi:1,
|
||||
cpsi:1,
|
||||
stoi:1,
|
||||
pei:1,
|
||||
eaa:1,
|
||||
emc:1;
|
||||
uint8_t legacy_spd:3,
|
||||
blink:1,
|
||||
bridge:2,
|
||||
:2;
|
||||
uint8_t page_select:3,
|
||||
:1,
|
||||
port_select:4;
|
||||
#else
|
||||
u_int8_t cps:1,
|
||||
r:1,
|
||||
phy_id:6;
|
||||
u_int8_t gap_count:6,
|
||||
ibr:1,
|
||||
rhb:1;
|
||||
u_int8_t num_ports:5,
|
||||
extended:3;
|
||||
u_int8_t delay:4,
|
||||
:1,
|
||||
phy_speed:3;
|
||||
u_int8_t pwr_class:3,
|
||||
jitter:3,
|
||||
c:1,
|
||||
lctrl:1;
|
||||
u_int8_t emc:1,
|
||||
eaa:1,
|
||||
pei:1,
|
||||
stoi:1,
|
||||
cpsi:1,
|
||||
ctoi:1,
|
||||
isbr:1,
|
||||
wdie:1;
|
||||
u_int8_t :2,
|
||||
bridge:2,
|
||||
blink:1,
|
||||
legacy_spd:3;
|
||||
u_int8_t port_select:4,
|
||||
:1,
|
||||
page_select:3;
|
||||
uint8_t cps:1,
|
||||
r:1,
|
||||
phy_id:6;
|
||||
uint8_t gap_count:6,
|
||||
ibr:1,
|
||||
rhb:1;
|
||||
uint8_t num_ports:5,
|
||||
extended:3;
|
||||
uint8_t delay:4,
|
||||
:1,
|
||||
phy_speed:3;
|
||||
uint8_t pwr_class:3,
|
||||
jitter:3,
|
||||
c:1,
|
||||
lctrl:1;
|
||||
uint8_t emc:1,
|
||||
eaa:1,
|
||||
pei:1,
|
||||
stoi:1,
|
||||
cpsi:1,
|
||||
ctoi:1,
|
||||
isbr:1,
|
||||
wdie:1;
|
||||
uint8_t :2,
|
||||
bridge:2,
|
||||
blink:1,
|
||||
legacy_spd:3;
|
||||
uint8_t port_select:4,
|
||||
:1,
|
||||
page_select:3;
|
||||
#endif
|
||||
};
|
||||
|
||||
struct phyreg_page0 {
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
u_int8_t astat:2,
|
||||
bstat:2,
|
||||
ch:1,
|
||||
con:1,
|
||||
rxok:1,
|
||||
dis:1;
|
||||
u_int8_t negotiated_speed:3,
|
||||
pie:1,
|
||||
fault:1,
|
||||
stanby_fault:1,
|
||||
disscrm:1,
|
||||
b_only:1;
|
||||
u_int8_t dc_connected:1,
|
||||
max_port_speed:3,
|
||||
lpp:1,
|
||||
cable_speed:3;
|
||||
u_int8_t connection_unreliable:1,
|
||||
:3,
|
||||
beta_mode:1,
|
||||
:3;
|
||||
u_int8_t port_error;
|
||||
u_int8_t :5,
|
||||
loop_disable:1,
|
||||
in_standby:1,
|
||||
hard_disable:1;
|
||||
u_int8_t :8;
|
||||
u_int8_t :8;
|
||||
uint8_t astat:2,
|
||||
bstat:2,
|
||||
ch:1,
|
||||
con:1,
|
||||
rxok:1,
|
||||
dis:1;
|
||||
uint8_t negotiated_speed:3,
|
||||
pie:1,
|
||||
fault:1,
|
||||
stanby_fault:1,
|
||||
disscrm:1,
|
||||
b_only:1;
|
||||
uint8_t dc_connected:1,
|
||||
max_port_speed:3,
|
||||
lpp:1,
|
||||
cable_speed:3;
|
||||
uint8_t connection_unreliable:1,
|
||||
:3,
|
||||
beta_mode:1,
|
||||
:3;
|
||||
uint8_t port_error;
|
||||
uint8_t :5,
|
||||
loop_disable:1,
|
||||
in_standby:1,
|
||||
hard_disable:1;
|
||||
uint8_t :8;
|
||||
uint8_t :8;
|
||||
#else
|
||||
u_int8_t dis:1,
|
||||
rxok:1,
|
||||
con:1,
|
||||
ch:1,
|
||||
bstat:2,
|
||||
astat:2;
|
||||
u_int8_t b_only:1,
|
||||
disscrm:1,
|
||||
stanby_fault:1,
|
||||
fault:1,
|
||||
pie:1,
|
||||
negotiated_speed:3;
|
||||
u_int8_t cable_speed:3,
|
||||
lpp:1,
|
||||
max_port_speed:3,
|
||||
dc_connected:1;
|
||||
u_int8_t :3,
|
||||
beta_mode:1,
|
||||
:3,
|
||||
connection_unreliable:1;
|
||||
u_int8_t port_error;
|
||||
u_int8_t hard_disable:1,
|
||||
in_standby:1,
|
||||
loop_disable:1,
|
||||
:5;
|
||||
u_int8_t :8;
|
||||
u_int8_t :8;
|
||||
uint8_t dis:1,
|
||||
rxok:1,
|
||||
con:1,
|
||||
ch:1,
|
||||
bstat:2,
|
||||
astat:2;
|
||||
uint8_t b_only:1,
|
||||
disscrm:1,
|
||||
stanby_fault:1,
|
||||
fault:1,
|
||||
pie:1,
|
||||
negotiated_speed:3;
|
||||
uint8_t cable_speed:3,
|
||||
lpp:1,
|
||||
max_port_speed:3,
|
||||
dc_connected:1;
|
||||
uint8_t :3,
|
||||
beta_mode:1,
|
||||
:3,
|
||||
connection_unreliable:1;
|
||||
uint8_t port_error;
|
||||
uint8_t hard_disable:1,
|
||||
in_standby:1,
|
||||
loop_disable:1,
|
||||
:5;
|
||||
uint8_t :8;
|
||||
uint8_t :8;
|
||||
#endif
|
||||
};
|
||||
|
||||
struct phyreg_page1 {
|
||||
u_int8_t compliance;
|
||||
u_int8_t :8;
|
||||
u_int8_t vendor_id[3];
|
||||
u_int8_t product_id[3];
|
||||
uint8_t compliance;
|
||||
uint8_t :8;
|
||||
uint8_t vendor_id[3];
|
||||
uint8_t product_id[3];
|
||||
};
|
||||
|
||||
@ -124,22 +124,22 @@
|
||||
|
||||
struct csrreg {
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
u_int32_t key:8,
|
||||
val:24;
|
||||
uint32_t key:8,
|
||||
val:24;
|
||||
#else
|
||||
u_int32_t val:24,
|
||||
key:8;
|
||||
uint32_t val:24,
|
||||
key:8;
|
||||
#endif
|
||||
};
|
||||
struct csrhdr {
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
u_int32_t info_len:8,
|
||||
crc_len:8,
|
||||
crc:16;
|
||||
uint32_t info_len:8,
|
||||
crc_len:8,
|
||||
crc:16;
|
||||
#else
|
||||
u_int32_t crc:16,
|
||||
crc_len:8,
|
||||
info_len:8;
|
||||
uint32_t crc:16,
|
||||
crc_len:8,
|
||||
info_len:8;
|
||||
#endif
|
||||
};
|
||||
struct csrdirectory {
|
||||
@ -149,47 +149,47 @@ struct csrdirectory {
|
||||
struct csrtext {
|
||||
BIT16x2(crc_len, crc);
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
u_int32_t spec_type:8,
|
||||
spec_id:24;
|
||||
uint32_t spec_type:8,
|
||||
spec_id:24;
|
||||
#else
|
||||
u_int32_t spec_id:24,
|
||||
spec_type:8;
|
||||
uint32_t spec_id:24,
|
||||
spec_type:8;
|
||||
#endif
|
||||
u_int32_t lang_id;
|
||||
u_int32_t text[0];
|
||||
uint32_t lang_id;
|
||||
uint32_t text[0];
|
||||
};
|
||||
|
||||
struct bus_info {
|
||||
#define CSR_BUS_NAME_IEEE1394 0x31333934
|
||||
u_int32_t bus_name;
|
||||
uint32_t bus_name;
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
u_int32_t irmc:1, /* iso. resource manager capable */
|
||||
cmc:1, /* cycle master capable */
|
||||
isc:1, /* iso. operation support */
|
||||
bmc:1, /* bus manager capable */
|
||||
pmc:1, /* power manager capable */
|
||||
:3,
|
||||
cyc_clk_acc:8, /* 0 <= ppm <= 100 */
|
||||
max_rec:4, /* (2 << max_rec) bytes */
|
||||
:2,
|
||||
max_rom:2,
|
||||
generation:4,
|
||||
:1,
|
||||
link_spd:3;
|
||||
uint32_t irmc:1, /* iso. resource manager capable */
|
||||
cmc:1, /* cycle master capable */
|
||||
isc:1, /* iso. operation support */
|
||||
bmc:1, /* bus manager capable */
|
||||
pmc:1, /* power manager capable */
|
||||
:3,
|
||||
cyc_clk_acc:8, /* 0 <= ppm <= 100 */
|
||||
max_rec:4, /* (2 << max_rec) bytes */
|
||||
:2,
|
||||
max_rom:2,
|
||||
generation:4,
|
||||
:1,
|
||||
link_spd:3;
|
||||
#else
|
||||
u_int32_t link_spd:3,
|
||||
:1,
|
||||
generation:4,
|
||||
max_rom:2,
|
||||
:2,
|
||||
max_rec:4, /* (2 << max_rec) bytes */
|
||||
cyc_clk_acc:8, /* 0 <= ppm <= 100 */
|
||||
:3,
|
||||
pmc:1, /* power manager capable */
|
||||
bmc:1, /* bus manager capable */
|
||||
isc:1, /* iso. operation support */
|
||||
cmc:1, /* cycle master capable */
|
||||
irmc:1; /* iso. resource manager capable */
|
||||
uint32_t link_spd:3,
|
||||
:1,
|
||||
generation:4,
|
||||
max_rom:2,
|
||||
:2,
|
||||
max_rec:4, /* (2 << max_rec) bytes */
|
||||
cyc_clk_acc:8, /* 0 <= ppm <= 100 */
|
||||
:3,
|
||||
pmc:1, /* power manager capable */
|
||||
bmc:1, /* bus manager capable */
|
||||
isc:1, /* iso. operation support */
|
||||
cmc:1, /* cycle master capable */
|
||||
irmc:1; /* iso. resource manager capable */
|
||||
#endif
|
||||
struct fw_eui64 eui64;
|
||||
};
|
||||
@ -209,13 +209,13 @@ struct crom_context {
|
||||
struct crom_ptr stack[CROM_MAX_DEPTH];
|
||||
};
|
||||
|
||||
void crom_init_context(struct crom_context *, u_int32_t *);
|
||||
void crom_init_context(struct crom_context *, uint32_t *);
|
||||
struct csrreg *crom_get(struct crom_context *);
|
||||
void crom_next(struct crom_context *);
|
||||
void crom_parse_text(struct crom_context *, char *, int);
|
||||
u_int16_t crom_crc(u_int32_t *r, int);
|
||||
struct csrreg *crom_search_key(struct crom_context *, u_int8_t);
|
||||
int crom_has_specver(u_int32_t *, u_int32_t, u_int32_t);
|
||||
uint16_t crom_crc(uint32_t *r, int);
|
||||
struct csrreg *crom_search_key(struct crom_context *, uint8_t);
|
||||
int crom_has_specver(uint32_t *, uint32_t, uint32_t);
|
||||
|
||||
#ifndef _KERNEL
|
||||
char *crom_desc(struct crom_context *, char *, int);
|
||||
@ -237,15 +237,15 @@ struct crom_chunk {
|
||||
int offset;
|
||||
struct {
|
||||
BIT16x2(crc_len, crc);
|
||||
u_int32_t buf[CROM_MAX_CHUNK_LEN];
|
||||
uint32_t buf[CROM_MAX_CHUNK_LEN];
|
||||
} data;
|
||||
};
|
||||
|
||||
extern int crom_add_quad(struct crom_chunk *, u_int32_t);
|
||||
extern int crom_add_quad(struct crom_chunk *, uint32_t);
|
||||
extern int crom_add_entry(struct crom_chunk *, int, int);
|
||||
extern int crom_add_chunk(struct crom_src *src, struct crom_chunk *,
|
||||
struct crom_chunk *, int);
|
||||
extern int crom_add_simple_text(struct crom_src *src, struct crom_chunk *,
|
||||
struct crom_chunk *, char *);
|
||||
extern int crom_load(struct crom_src *, u_int32_t *, int);
|
||||
extern int crom_load(struct crom_src *, uint32_t *, int);
|
||||
#endif
|
||||
|
||||
@ -43,69 +43,69 @@
|
||||
|
||||
struct ciphdr {
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
u_int8_t eoh0:1, /* 0 */
|
||||
form0:1, /* 0 */
|
||||
src:6;
|
||||
uint8_t eoh0:1, /* 0 */
|
||||
form0:1, /* 0 */
|
||||
src:6;
|
||||
#else
|
||||
u_int8_t src:6,
|
||||
form0:1, /* 0 */
|
||||
eoh0:1; /* 0 */
|
||||
uint8_t src:6,
|
||||
form0:1, /* 0 */
|
||||
eoh0:1; /* 0 */
|
||||
#endif
|
||||
u_int8_t len;
|
||||
uint8_t len;
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
u_int8_t fn:2,
|
||||
qpc:3,
|
||||
sph:1,
|
||||
:2;
|
||||
uint8_t fn:2,
|
||||
qpc:3,
|
||||
sph:1,
|
||||
:2;
|
||||
#else
|
||||
u_int8_t :2,
|
||||
sph:1,
|
||||
qpc:3,
|
||||
fn:2;
|
||||
uint8_t :2,
|
||||
sph:1,
|
||||
qpc:3,
|
||||
fn:2;
|
||||
#endif
|
||||
u_int8_t dbc;
|
||||
uint8_t dbc;
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
u_int8_t eoh1:1, /* 1 */
|
||||
form1:1, /* 0 */
|
||||
fmt:6;
|
||||
uint8_t eoh1:1, /* 1 */
|
||||
form1:1, /* 0 */
|
||||
fmt:6;
|
||||
#else
|
||||
u_int8_t fmt:6,
|
||||
form1:1, /* 0 */
|
||||
eoh1:1; /* 1 */
|
||||
uint8_t fmt:6,
|
||||
form1:1, /* 0 */
|
||||
eoh1:1; /* 1 */
|
||||
#endif
|
||||
#define CIP_FMT_DVCR 0
|
||||
#define CIP_FMT_MPEG (1<<5)
|
||||
union {
|
||||
struct {
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
u_int8_t fs:1, /* 50/60 field system
|
||||
uint8_t fs:1, /* 50/60 field system
|
||||
NTSC/PAL */
|
||||
stype:5,
|
||||
:2;
|
||||
stype:5,
|
||||
:2;
|
||||
#else
|
||||
u_int8_t :2,
|
||||
stype:5,
|
||||
fs:1; /* 50/60 field system
|
||||
uint8_t :2,
|
||||
stype:5,
|
||||
fs:1; /* 50/60 field system
|
||||
NTSC/PAL */
|
||||
#endif
|
||||
#define CIP_STYPE_SD 0
|
||||
#define CIP_STYPE_SDL 1
|
||||
#define CIP_STYPE_HD 2
|
||||
u_int16_t cyc:16; /* take care of byte order! */
|
||||
uint16_t cyc:16; /* take care of byte order! */
|
||||
} __attribute__ ((packed)) dv;
|
||||
u_int8_t bytes[3];
|
||||
uint8_t bytes[3];
|
||||
} fdf;
|
||||
|
||||
};
|
||||
struct dvdbc{
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
u_int8_t sct:3, /* Section type */
|
||||
:1, /* Reserved */
|
||||
arb:4; /* Arbitrary bit */
|
||||
uint8_t sct:3, /* Section type */
|
||||
:1, /* Reserved */
|
||||
arb:4; /* Arbitrary bit */
|
||||
#else
|
||||
u_int8_t arb:4, /* Arbitrary bit */
|
||||
:1, /* Reserved */
|
||||
sct:3; /* Section type */
|
||||
uint8_t arb:4, /* Arbitrary bit */
|
||||
:1, /* Reserved */
|
||||
sct:3; /* Section type */
|
||||
#endif
|
||||
#define DV_SCT_HEADER 0
|
||||
#define DV_SCT_SUBCODE 1
|
||||
@ -113,15 +113,15 @@ struct dvdbc{
|
||||
#define DV_SCT_AUDIO 3
|
||||
#define DV_SCT_VIDEO 4
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
u_int8_t dseq:4, /* DIF sequence number */
|
||||
fsc:1, /* ID of a DIF block in each channel */
|
||||
:3;
|
||||
uint8_t dseq:4, /* DIF sequence number */
|
||||
fsc:1, /* ID of a DIF block in each channel */
|
||||
:3;
|
||||
#else
|
||||
u_int8_t :3,
|
||||
fsc:1, /* ID of a DIF block in each channel */
|
||||
dseq:4; /* DIF sequence number */
|
||||
uint8_t :3,
|
||||
fsc:1, /* ID of a DIF block in each channel */
|
||||
dseq:4; /* DIF sequence number */
|
||||
#endif
|
||||
u_int8_t dbn; /* DIF block number */
|
||||
u_int8_t payload[77];
|
||||
uint8_t dbn; /* DIF block number */
|
||||
uint8_t payload[77];
|
||||
#define DV_DSF_12 0x80 /* PAL: payload[0] in Header DIF */
|
||||
};
|
||||
|
||||
@ -550,7 +550,7 @@ fwe_as_output(struct fwe_softc *fwe, struct ifnet *ifp)
|
||||
/* keep ip packet alignment for alpha */
|
||||
M_PREPEND(m, ETHER_ALIGN, M_DONTWAIT);
|
||||
fp = &xfer->send.hdr;
|
||||
*(u_int32_t *)&xfer->send.hdr = *(int32_t *)&fwe->pkt_hdr;
|
||||
*(uint32_t *)&xfer->send.hdr = *(int32_t *)&fwe->pkt_hdr;
|
||||
fp->mode.stream.len = m->m_pkthdr.len;
|
||||
xfer->mbuf = m;
|
||||
xfer->send.pay_len = m->m_pkthdr.len;
|
||||
|
||||
@ -169,8 +169,8 @@ struct sbp_ocb {
|
||||
STAILQ_ENTRY(sbp_ocb) ocb;
|
||||
union ccb *ccb;
|
||||
bus_addr_t bus_addr;
|
||||
u_int32_t orb[8];
|
||||
#define IND_PTR_OFFSET (8*sizeof(u_int32_t))
|
||||
uint32_t orb[8];
|
||||
#define IND_PTR_OFFSET (8*sizeof(uint32_t))
|
||||
struct ind_ptr ind_ptr[SBP_IND_MAX];
|
||||
struct sbp_dev *sdev;
|
||||
int flags; /* XXX should be removed */
|
||||
@ -192,11 +192,11 @@ struct sbp_dev{
|
||||
#define SBP_DEV_ATTACHED 5 /* in operation */
|
||||
#define SBP_DEV_DEAD 6 /* unavailable unit */
|
||||
#define SBP_DEV_RETRY 7 /* unavailable unit */
|
||||
u_int8_t status:4,
|
||||
uint8_t status:4,
|
||||
timeout:4;
|
||||
u_int8_t type;
|
||||
u_int16_t lun_id;
|
||||
u_int16_t freeze;
|
||||
uint8_t type;
|
||||
uint16_t lun_id;
|
||||
uint16_t freeze;
|
||||
#define ORB_LINK_DEAD (1 << 0)
|
||||
#define VALID_LUN (1 << 1)
|
||||
#define ORB_POINTER_ACTIVE (1 << 2)
|
||||
@ -204,7 +204,7 @@ struct sbp_dev{
|
||||
#define ORB_DOORBELL_ACTIVE (1 << 4)
|
||||
#define ORB_DOORBELL_NEED (1 << 5)
|
||||
#define ORB_SHORTAGE (1 << 6)
|
||||
u_int16_t flags;
|
||||
uint16_t flags;
|
||||
struct cam_path *path;
|
||||
struct sbp_target *target;
|
||||
struct fwdma_alloc dma;
|
||||
@ -225,7 +225,7 @@ struct sbp_target {
|
||||
struct sbp_dev **luns;
|
||||
struct sbp_softc *sbp;
|
||||
struct fw_device *fwdev;
|
||||
u_int32_t mgm_hi, mgm_lo;
|
||||
uint32_t mgm_hi, mgm_lo;
|
||||
struct sbp_ocb *mgm_ocb_cur;
|
||||
STAILQ_HEAD(, sbp_ocb) mgm_ocb_queue;
|
||||
struct callout mgm_ocb_timeout;
|
||||
@ -549,7 +549,7 @@ END_DEBUG
|
||||
goto next;
|
||||
|
||||
fwdma_malloc(sbp->fd.fc,
|
||||
/* alignment */ sizeof(u_int32_t),
|
||||
/* alignment */ sizeof(uint32_t),
|
||||
SBP_DMA_SIZE, &sdev->dma, BUS_DMA_NOWAIT);
|
||||
if (sdev->dma.v_addr == NULL) {
|
||||
printf("%s: dma space allocation failed\n",
|
||||
@ -1200,7 +1200,7 @@ sbp_orb_pointer(struct sbp_dev *sdev, struct sbp_ocb *ocb)
|
||||
struct fw_pkt *fp;
|
||||
SBP_DEBUG(1)
|
||||
sbp_show_sdev_info(sdev, 2);
|
||||
printf("%s: 0x%08x\n", __func__, (u_int32_t)ocb->bus_addr);
|
||||
printf("%s: 0x%08x\n", __func__, (uint32_t)ocb->bus_addr);
|
||||
END_DEBUG
|
||||
|
||||
if ((sdev->flags & ORB_POINTER_ACTIVE) != 0) {
|
||||
@ -1222,7 +1222,7 @@ END_DEBUG
|
||||
fp->mode.wreqb.extcode = 0;
|
||||
xfer->send.payload[0] =
|
||||
htonl(((sdev->target->sbp->fd.fc->nodeid | FWLOCALBUS )<< 16));
|
||||
xfer->send.payload[1] = htonl((u_int32_t)ocb->bus_addr);
|
||||
xfer->send.payload[1] = htonl((uint32_t)ocb->bus_addr);
|
||||
|
||||
if(fw_asyreq(xfer->fc, -1, xfer) != 0){
|
||||
sbp_xfer_free(xfer);
|
||||
@ -1426,7 +1426,7 @@ END_DEBUG
|
||||
xfer->send.payload[1] = htonl(ocb->bus_addr & 0xffffffff);
|
||||
SBP_DEBUG(0)
|
||||
sbp_show_sdev_info(sdev, 2);
|
||||
printf("mgm orb: %08x\n", (u_int32_t)ocb->bus_addr);
|
||||
printf("mgm orb: %08x\n", (uint32_t)ocb->bus_addr);
|
||||
END_DEBUG
|
||||
|
||||
fw_asyreq(xfer->fc, -1, xfer);
|
||||
@ -1528,7 +1528,7 @@ END_DEBUG
|
||||
| CAM_AUTOSNS_VALID;
|
||||
/*
|
||||
{
|
||||
u_int8_t j, *tmp;
|
||||
uint8_t j, *tmp;
|
||||
tmp = sense;
|
||||
for( j = 0 ; j < 32 ; j+=8){
|
||||
printf("sense %02x%02x %02x%02x %02x%02x %02x%02x\n",
|
||||
@ -1611,9 +1611,9 @@ sbp_recv1(struct fw_xfer *xfer)
|
||||
struct sbp_status *sbp_status;
|
||||
struct sbp_target *target;
|
||||
int orb_fun, status_valid0, status_valid, t, l, reset_agent = 0;
|
||||
u_int32_t addr;
|
||||
uint32_t addr;
|
||||
/*
|
||||
u_int32_t *ld;
|
||||
uint32_t *ld;
|
||||
ld = xfer->recv.buf;
|
||||
printf("sbp %x %d %d %08x %08x %08x %08x\n",
|
||||
xfer->resp, xfer->recv.len, xfer->recv.off, ntohl(ld[0]), ntohl(ld[1]), ntohl(ld[2]), ntohl(ld[3]));
|
||||
@ -1823,7 +1823,7 @@ END_DEBUG
|
||||
if(ocb->ccb != NULL){
|
||||
union ccb *ccb;
|
||||
/*
|
||||
u_int32_t *ld;
|
||||
uint32_t *ld;
|
||||
ld = ocb->ccb->csio.data_ptr;
|
||||
if(ld != NULL && ocb->ccb->csio.dxfer_len != 0)
|
||||
printf("ptr %08x %08x %08x %08x\n", ld[0], ld[1], ld[2], ld[3]);
|
||||
@ -2207,7 +2207,7 @@ sbp_mgm_timeout(void *arg)
|
||||
|
||||
sbp_show_sdev_info(sdev, 2);
|
||||
printf("request timeout(mgm orb:0x%08x) ... ",
|
||||
(u_int32_t)ocb->bus_addr);
|
||||
(uint32_t)ocb->bus_addr);
|
||||
target->mgm_ocb_cur = NULL;
|
||||
sbp_free_ocb(sdev, ocb);
|
||||
#if 0
|
||||
@ -2229,7 +2229,7 @@ sbp_timeout(void *arg)
|
||||
|
||||
sbp_show_sdev_info(sdev, 2);
|
||||
printf("request timeout(cmd orb:0x%08x) ... ",
|
||||
(u_int32_t)ocb->bus_addr);
|
||||
(uint32_t)ocb->bus_addr);
|
||||
|
||||
sdev->timeout ++;
|
||||
switch(sdev->timeout) {
|
||||
@ -2441,8 +2441,8 @@ printf("ORB %08x %08x %08x %08x\n", ntohl(ocb->orb[4]), ntohl(ocb->orb[5]), ntoh
|
||||
{
|
||||
struct ccb_calc_geometry *ccg;
|
||||
#if defined(__DragonFly__) || __FreeBSD_version < 501100
|
||||
u_int32_t size_mb;
|
||||
u_int32_t secs_per_cylinder;
|
||||
uint32_t size_mb;
|
||||
uint32_t secs_per_cylinder;
|
||||
int extended = 1;
|
||||
#endif
|
||||
|
||||
|
||||
@ -70,38 +70,38 @@
|
||||
#define END_DEBUG }
|
||||
|
||||
struct ind_ptr {
|
||||
u_int32_t hi,lo;
|
||||
uint32_t hi,lo;
|
||||
};
|
||||
|
||||
|
||||
#define SBP_RECV_LEN 32
|
||||
|
||||
struct sbp_login_res{
|
||||
u_int16_t len;
|
||||
u_int16_t id;
|
||||
u_int16_t res0;
|
||||
u_int16_t cmd_hi;
|
||||
u_int32_t cmd_lo;
|
||||
u_int16_t res1;
|
||||
u_int16_t recon_hold;
|
||||
uint16_t len;
|
||||
uint16_t id;
|
||||
uint16_t res0;
|
||||
uint16_t cmd_hi;
|
||||
uint32_t cmd_lo;
|
||||
uint16_t res1;
|
||||
uint16_t recon_hold;
|
||||
};
|
||||
|
||||
struct sbp_status{
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
u_int8_t src:2,
|
||||
uint8_t src:2,
|
||||
resp:2,
|
||||
dead:1,
|
||||
len:3;
|
||||
#else
|
||||
u_int8_t len:3,
|
||||
uint8_t len:3,
|
||||
dead:1,
|
||||
resp:2,
|
||||
src:2;
|
||||
#endif
|
||||
u_int8_t status;
|
||||
u_int16_t orb_hi;
|
||||
u_int32_t orb_lo;
|
||||
u_int32_t data[6];
|
||||
uint8_t status;
|
||||
uint16_t orb_hi;
|
||||
uint32_t orb_lo;
|
||||
uint32_t data[6];
|
||||
};
|
||||
/* src */
|
||||
#define SRC_NEXT_EXISTS 0
|
||||
@ -159,29 +159,29 @@ struct sbp_cmd_status{
|
||||
#define SBP_SFMT_CURR 0
|
||||
#define SBP_SFMT_DEFER 1
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
u_int8_t sfmt:2,
|
||||
uint8_t sfmt:2,
|
||||
status:6;
|
||||
u_int8_t valid:1,
|
||||
uint8_t valid:1,
|
||||
mark:1,
|
||||
eom:1,
|
||||
ill_len:1,
|
||||
s_key:4;
|
||||
#else
|
||||
u_int8_t status:6,
|
||||
uint8_t status:6,
|
||||
sfmt:2;
|
||||
u_int8_t s_key:4,
|
||||
uint8_t s_key:4,
|
||||
ill_len:1,
|
||||
eom:1,
|
||||
mark:1,
|
||||
valid:1;
|
||||
#endif
|
||||
u_int8_t s_code;
|
||||
u_int8_t s_qlfr;
|
||||
u_int32_t info;
|
||||
u_int32_t cdb;
|
||||
u_int8_t fru;
|
||||
u_int8_t s_keydep[3];
|
||||
u_int32_t vend[2];
|
||||
uint8_t s_code;
|
||||
uint8_t s_qlfr;
|
||||
uint32_t info;
|
||||
uint32_t cdb;
|
||||
uint8_t fru;
|
||||
uint8_t s_keydep[3];
|
||||
uint32_t vend[2];
|
||||
};
|
||||
|
||||
#define ORB_FUN_NAMES \
|
||||
|
||||
@ -105,27 +105,27 @@ struct sbp_targ_login {
|
||||
struct sbp_targ_lstate *lstate;
|
||||
struct fw_device *fwdev;
|
||||
struct sbp_login_res loginres;
|
||||
u_int16_t fifo_hi;
|
||||
u_int16_t last_hi;
|
||||
u_int32_t fifo_lo;
|
||||
u_int32_t last_lo;
|
||||
uint16_t fifo_hi;
|
||||
uint16_t last_hi;
|
||||
uint32_t fifo_lo;
|
||||
uint32_t last_lo;
|
||||
STAILQ_HEAD(, orb_info) orbs;
|
||||
STAILQ_ENTRY(sbp_targ_login) link;
|
||||
u_int16_t hold_sec;
|
||||
u_int16_t id;
|
||||
u_int8_t flags;
|
||||
u_int8_t spd;
|
||||
uint16_t hold_sec;
|
||||
uint16_t id;
|
||||
uint8_t flags;
|
||||
uint8_t spd;
|
||||
struct callout hold_callout;
|
||||
};
|
||||
|
||||
struct sbp_targ_lstate {
|
||||
u_int16_t lun;
|
||||
uint16_t lun;
|
||||
struct sbp_targ_softc *sc;
|
||||
struct cam_path *path;
|
||||
struct ccb_hdr_slist accept_tios;
|
||||
struct ccb_hdr_slist immed_notifies;
|
||||
struct crom_chunk model;
|
||||
u_int32_t flags;
|
||||
uint32_t flags;
|
||||
STAILQ_HEAD(, sbp_targ_login) logins;
|
||||
};
|
||||
|
||||
@ -144,7 +144,7 @@ struct sbp_targ_softc {
|
||||
|
||||
struct corb4 {
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
u_int32_t n:1,
|
||||
uint32_t n:1,
|
||||
rq_fmt:2,
|
||||
:1,
|
||||
dir:1,
|
||||
@ -154,7 +154,7 @@ struct corb4 {
|
||||
page_size:3,
|
||||
data_size:16;
|
||||
#else
|
||||
u_int32_t data_size:16,
|
||||
uint32_t data_size:16,
|
||||
page_size:3,
|
||||
page_table_present:1,
|
||||
max_payload:4,
|
||||
@ -168,13 +168,13 @@ struct corb4 {
|
||||
|
||||
struct morb4 {
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
u_int32_t n:1,
|
||||
uint32_t n:1,
|
||||
rq_fmt:2,
|
||||
:9,
|
||||
fun:4,
|
||||
id:16;
|
||||
#else
|
||||
u_int32_t id:16,
|
||||
uint32_t id:16,
|
||||
fun:4,
|
||||
:9,
|
||||
rq_fmt:2,
|
||||
@ -188,7 +188,7 @@ struct orb_info {
|
||||
struct sbp_targ_login *login;
|
||||
union ccb *ccb;
|
||||
struct ccb_accept_tio *atio;
|
||||
u_int8_t state;
|
||||
uint8_t state;
|
||||
#define ORBI_STATUS_NONE 0
|
||||
#define ORBI_STATUS_FETCH 1
|
||||
#define ORBI_STATUS_ATIO 2
|
||||
@ -196,15 +196,15 @@ struct orb_info {
|
||||
#define ORBI_STATUS_STATUS 4
|
||||
#define ORBI_STATUS_POINTER 5
|
||||
#define ORBI_STATUS_ABORTED 7
|
||||
u_int8_t refcount;
|
||||
u_int16_t orb_hi;
|
||||
u_int32_t orb_lo;
|
||||
u_int32_t data_hi;
|
||||
u_int32_t data_lo;
|
||||
uint8_t refcount;
|
||||
uint16_t orb_hi;
|
||||
uint32_t orb_lo;
|
||||
uint32_t data_hi;
|
||||
uint32_t data_lo;
|
||||
struct corb4 orb4;
|
||||
STAILQ_ENTRY(orb_info) link;
|
||||
u_int32_t orb[8];
|
||||
u_int32_t *page_table;
|
||||
uint32_t orb[8];
|
||||
uint32_t *page_table;
|
||||
struct sbp_status status;
|
||||
};
|
||||
|
||||
@ -214,7 +214,7 @@ static char *orb_fun_name[] = {
|
||||
|
||||
static void sbp_targ_recv(struct fw_xfer *);
|
||||
static void sbp_targ_fetch_orb(struct sbp_targ_softc *, struct fw_device *,
|
||||
u_int16_t, u_int32_t, struct sbp_targ_login *, int);
|
||||
uint16_t, uint32_t, struct sbp_targ_login *, int);
|
||||
|
||||
static void
|
||||
sbp_targ_identify(driver_t *driver, device_t parent)
|
||||
@ -563,7 +563,7 @@ sbp_targ_free_orbi(struct fw_xfer *xfer)
|
||||
|
||||
static void
|
||||
sbp_targ_status_FIFO(struct orb_info *orbi,
|
||||
u_int32_t fifo_hi, u_int32_t fifo_lo, int dequeue)
|
||||
uint32_t fifo_hi, uint32_t fifo_lo, int dequeue)
|
||||
{
|
||||
struct fw_xfer *xfer;
|
||||
|
||||
@ -572,7 +572,7 @@ sbp_targ_status_FIFO(struct orb_info *orbi,
|
||||
|
||||
xfer = fwmem_write_block(orbi->fwdev, (void *)orbi,
|
||||
/*spd*/2, fifo_hi, fifo_lo,
|
||||
sizeof(u_int32_t) * (orbi->status.len + 1), (char *)&orbi->status,
|
||||
sizeof(uint32_t) * (orbi->status.len + 1), (char *)&orbi->status,
|
||||
sbp_targ_free_orbi);
|
||||
|
||||
if (xfer == NULL) {
|
||||
@ -762,7 +762,7 @@ sbp_targ_abort_ccb(struct sbp_targ_softc *sc, union ccb *ccb)
|
||||
|
||||
static void
|
||||
sbp_targ_xfer_buf(struct orb_info *orbi, u_int offset,
|
||||
u_int16_t dst_hi, u_int32_t dst_lo, u_int size,
|
||||
uint16_t dst_hi, uint32_t dst_lo, u_int size,
|
||||
void (*hand)(struct fw_xfer *))
|
||||
{
|
||||
struct fw_xfer *xfer;
|
||||
@ -804,7 +804,7 @@ sbp_targ_pt_done(struct fw_xfer *xfer)
|
||||
struct orb_info *orbi;
|
||||
union ccb *ccb;
|
||||
u_int i, offset, res, len;
|
||||
u_int32_t t1, t2, *p;
|
||||
uint32_t t1, t2, *p;
|
||||
|
||||
orbi = (struct orb_info *)xfer->sc;
|
||||
ccb = orbi->ccb;
|
||||
@ -1092,7 +1092,7 @@ static void
|
||||
sbp_targ_cmd_handler(struct fw_xfer *xfer)
|
||||
{
|
||||
struct fw_pkt *fp;
|
||||
u_int32_t *orb;
|
||||
uint32_t *orb;
|
||||
struct corb4 *orb4;
|
||||
struct orb_info *orbi;
|
||||
struct ccb_accept_tio *atio;
|
||||
@ -1243,7 +1243,7 @@ sbp_targ_mgm_handler(struct fw_xfer *xfer)
|
||||
struct sbp_targ_lstate *lstate;
|
||||
struct sbp_targ_login *login;
|
||||
struct fw_pkt *fp;
|
||||
u_int32_t *orb;
|
||||
uint32_t *orb;
|
||||
struct morb4 *orb4;
|
||||
struct orb_info *orbi;
|
||||
int i;
|
||||
@ -1311,7 +1311,7 @@ sbp_targ_mgm_handler(struct fw_xfer *xfer)
|
||||
|
||||
login->fifo_hi = orb[6];
|
||||
login->fifo_lo = orb[7];
|
||||
login->loginres.len = htons(sizeof(u_int32_t) * 4);
|
||||
login->loginres.len = htons(sizeof(uint32_t) * 4);
|
||||
login->loginres.id = htons(login->id);
|
||||
login->loginres.cmd_hi = htons(SBP_TARG_BIND_HI);
|
||||
login->loginres.cmd_lo = htonl(SBP_TARG_BIND_LO(login->id));
|
||||
@ -1361,7 +1361,7 @@ static void
|
||||
sbp_targ_pointer_handler(struct fw_xfer *xfer)
|
||||
{
|
||||
struct orb_info *orbi;
|
||||
u_int32_t orb0, orb1;
|
||||
uint32_t orb0, orb1;
|
||||
|
||||
orbi = (struct orb_info *)xfer->sc;
|
||||
if (xfer->resp != 0) {
|
||||
@ -1376,7 +1376,7 @@ sbp_targ_pointer_handler(struct fw_xfer *xfer)
|
||||
goto done;
|
||||
}
|
||||
sbp_targ_fetch_orb(orbi->login->lstate->sc, orbi->fwdev,
|
||||
(u_int16_t)orb0, orb1, orbi->login, FETCH_CMD);
|
||||
(uint16_t)orb0, orb1, orbi->login, FETCH_CMD);
|
||||
done:
|
||||
free(orbi, M_SBP_TARG);
|
||||
fw_xfer_free(xfer);
|
||||
@ -1385,7 +1385,7 @@ sbp_targ_pointer_handler(struct fw_xfer *xfer)
|
||||
|
||||
static void
|
||||
sbp_targ_fetch_orb(struct sbp_targ_softc *sc, struct fw_device *fwdev,
|
||||
u_int16_t orb_hi, u_int32_t orb_lo, struct sbp_targ_login *login,
|
||||
uint16_t orb_hi, uint32_t orb_lo, struct sbp_targ_login *login,
|
||||
int mode)
|
||||
{
|
||||
struct orb_info *orbi;
|
||||
@ -1408,7 +1408,7 @@ sbp_targ_fetch_orb(struct sbp_targ_softc *sc, struct fw_device *fwdev,
|
||||
switch (mode) {
|
||||
case FETCH_MGM:
|
||||
fwmem_read_block(fwdev, (void *)orbi, /*spd*/2, orb_hi, orb_lo,
|
||||
sizeof(u_int32_t) * 8, &orbi->orb[0],
|
||||
sizeof(uint32_t) * 8, &orbi->orb[0],
|
||||
sbp_targ_mgm_handler);
|
||||
break;
|
||||
case FETCH_CMD:
|
||||
@ -1431,7 +1431,7 @@ sbp_targ_fetch_orb(struct sbp_targ_softc *sc, struct fw_device *fwdev,
|
||||
}
|
||||
SLIST_REMOVE_HEAD(&login->lstate->accept_tios, sim_links.sle);
|
||||
fwmem_read_block(fwdev, (void *)orbi, /*spd*/2, orb_hi, orb_lo,
|
||||
sizeof(u_int32_t) * 8, &orbi->orb[0],
|
||||
sizeof(uint32_t) * 8, &orbi->orb[0],
|
||||
sbp_targ_cmd_handler);
|
||||
STAILQ_INSERT_TAIL(&login->orbs, orbi, link);
|
||||
break;
|
||||
@ -1439,7 +1439,7 @@ sbp_targ_fetch_orb(struct sbp_targ_softc *sc, struct fw_device *fwdev,
|
||||
orbi->state = ORBI_STATUS_POINTER;
|
||||
login->flags |= F_LINK_ACTIVE;
|
||||
fwmem_read_block(fwdev, (void *)orbi, /*spd*/2, orb_hi, orb_lo,
|
||||
sizeof(u_int32_t) * 2, &orbi->orb[0],
|
||||
sizeof(uint32_t) * 2, &orbi->orb[0],
|
||||
sbp_targ_pointer_handler);
|
||||
break;
|
||||
default:
|
||||
@ -1566,7 +1566,7 @@ sbp_targ_recv(struct fw_xfer *xfer)
|
||||
{
|
||||
struct fw_pkt *fp, *sfp;
|
||||
struct fw_device *fwdev;
|
||||
u_int32_t lo;
|
||||
uint32_t lo;
|
||||
int s, rtcode;
|
||||
struct sbp_targ_softc *sc;
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user