From 04b5e02371ca7356d97fe76e5127d6d5e03b20a3 Mon Sep 17 00:00:00 2001
From: Adrian Chadd <adrian@FreeBSD.org>
Date: Tue, 2 Feb 2016 07:47:38 +0000
Subject: [PATCH] Rename some CPU_MIPSxxx options and add new CPU_MIPSxxx
 options

This revision does the following renames:
CPU_MIPS24KC -> CPU_MIPS24K
CPU_MIPS74KC -> CPU_MIPS74K
CPU_MIPS1004KC -> CPU_MIPS1004K

It also adds the following new CPU_MIPSxxx options:
CPU_MIPS24KE, CPU_MIPS34K, CPU_MIPS1074K, CPU_INTERAPTIV, CPU_PROAPTIV

CPU_MIPSxxxxKC is limiting and possibly misleading as it implies the
MIPSxxxxK CPU has no FPU.
It would be better if the CPUs are named after their standard functionalities
only and the presence or absence of FPU can then be controlled via the
CPU_HAVEFPU option.

I will send out another dependent revision that moves MIPS 32 r2 and r3
CPUs to use the EHB instruction for clearing hazards instead of NOP/SSNOP.

Submitted by:	Stanislav Galabov <sgalabov@gmail.com>
Reviewed by:	imp
Differential Revision:	https://reviews.freebsd.org/D5077
---
 sys/conf/options.mips      | 10 +++++++---
 sys/mips/conf/AR934X_BASE  |  2 +-
 sys/mips/conf/QCA955X_BASE |  2 +-
 sys/mips/include/asm.h     |  2 +-
 sys/mips/include/cpufunc.h |  2 +-
 sys/mips/include/cpuregs.h |  6 +++---
 6 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/sys/conf/options.mips b/sys/conf/options.mips
index 47cff06ff7c2..e85f5b1327e2 100644
--- a/sys/conf/options.mips
+++ b/sys/conf/options.mips
@@ -29,9 +29,13 @@
 # $FreeBSD$
 
 CPU_MIPS4KC	opt_global.h
-CPU_MIPS24KC	opt_global.h
-CPU_MIPS74KC	opt_global.h
-CPU_MIPS1004KC	opt_global.h
+CPU_MIPS24K	opt_global.h
+CPU_MIPS34K	opt_global.h
+CPU_MIPS74K	opt_global.h
+CPU_MIPS1004K	opt_global.h
+CPU_MIPS1074K	opt_global.h
+CPU_INTERAPTIV	opt_global.h
+CPU_PROAPTIV	opt_global.h
 CPU_MIPS32	opt_global.h
 CPU_MIPS64	opt_global.h
 CPU_SENTRY5	opt_global.h
diff --git a/sys/mips/conf/AR934X_BASE b/sys/mips/conf/AR934X_BASE
index 4faaf9e6be61..87bea17beac8 100644
--- a/sys/mips/conf/AR934X_BASE
+++ b/sys/mips/conf/AR934X_BASE
@@ -12,7 +12,7 @@
 
 machine         mips mips
 ident		AR934X_BASE
-cpu		CPU_MIPS74KC
+cpu		CPU_MIPS74K
 makeoptions	KERNLOADADDR=0x80050000
 options 	HZ=1000
 
diff --git a/sys/mips/conf/QCA955X_BASE b/sys/mips/conf/QCA955X_BASE
index 45dcbb7aa837..a7b5df73dc05 100644
--- a/sys/mips/conf/QCA955X_BASE
+++ b/sys/mips/conf/QCA955X_BASE
@@ -13,7 +13,7 @@
 
 machine         mips mips
 ident		QCA955X_BASE
-cpu		CPU_MIPS74KC
+cpu		CPU_MIPS74K
 makeoptions	KERNLOADADDR=0x80050000
 options 	HZ=1000
 
diff --git a/sys/mips/include/asm.h b/sys/mips/include/asm.h
index 9e7e7719076a..8a7d640f9e12 100644
--- a/sys/mips/include/asm.h
+++ b/sys/mips/include/asm.h
@@ -700,7 +700,7 @@ _C_LABEL(x):
 #elif defined(CPU_RMI)
 #define	HAZARD_DELAY
 #define	ITLBNOPFIX
-#elif defined(CPU_MIPS74KC)
+#elif defined(CPU_MIPS74K)
 #define	HAZARD_DELAY	sll $0,$0,3
 #define	ITLBNOPFIX	sll $0,$0,3
 #else
diff --git a/sys/mips/include/cpufunc.h b/sys/mips/include/cpufunc.h
index 6ffb0ba1c099..3ebb8c14b448 100644
--- a/sys/mips/include/cpufunc.h
+++ b/sys/mips/include/cpufunc.h
@@ -248,7 +248,7 @@ MIPS_RW32_COP0_SEL(config5, MIPS_COP_0_CONFIG, 5);
 #if defined(CPU_NLM) || defined(BERI_LARGE_TLB)
 MIPS_RW32_COP0_SEL(config6, MIPS_COP_0_CONFIG, 6);
 #endif
-#if defined(CPU_NLM) || defined(CPU_MIPS1004KC)
+#if defined(CPU_NLM) || defined(CPU_MIPS1004K)
 MIPS_RW32_COP0_SEL(config7, MIPS_COP_0_CONFIG, 7);
 #endif
 MIPS_RW32_COP0(count, MIPS_COP_0_COUNT);
diff --git a/sys/mips/include/cpuregs.h b/sys/mips/include/cpuregs.h
index 976321ab318b..a782c59bd0df 100644
--- a/sys/mips/include/cpuregs.h
+++ b/sys/mips/include/cpuregs.h
@@ -149,12 +149,12 @@
 #define	MIPS_CCA_CC	0x05	/* Cacheable Coherent. */
 #endif
 
-#if defined(CPU_MIPS74KC)
+#if defined(CPU_MIPS74K)
 #define	MIPS_CCA_UNCACHED	0x02
 #define	MIPS_CCA_CACHED		0x03
 #endif
 
-#if defined(CPU_MIPS1004KC)
+#if defined(CPU_MIPS1004K)
 #define	MIPS_CCA_UNCACHED	0x02
 #define	MIPS_CCA_CACHED		0x05
 #endif
@@ -214,7 +214,7 @@
 #define	COP0_SYNC	.word 0xc0	/* ehb */
 #elif defined(CPU_SB1)
 #define COP0_SYNC  ssnop; ssnop; ssnop; ssnop; ssnop; ssnop; ssnop; ssnop; ssnop
-#elif defined(CPU_MIPS74KC) || defined(CPU_MIPS1004KC)
+#elif defined(CPU_MIPS74K) || defined(CPU_MIPS1004K)
 #define	COP0_SYNC	 .word 0xc0	/* ehb */
 #else
 /*