Cleanup: u_intXX_t -> uintX_t conversion.
This commit is contained in:
parent
6c94985636
commit
05398c2e32
@ -140,7 +140,7 @@ static u_char fxp_cb_config_template[] = {
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};
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struct fxp_ident {
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u_int16_t devid;
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uint16_t devid;
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int16_t revid; /* -1 matches anything */
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char *name;
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};
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@ -208,7 +208,7 @@ static int fxp_resume(device_t dev);
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static void fxp_intr(void *xsc);
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static void fxp_intr_body(struct fxp_softc *sc, struct ifnet *ifp,
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u_int8_t statack, int count);
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uint8_t statack, int count);
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static void fxp_init(void *xsc);
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static void fxp_init_body(struct fxp_softc *sc);
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static void fxp_tick(void *xsc);
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@ -223,10 +223,10 @@ static int fxp_add_rfabuf(struct fxp_softc *sc,
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struct fxp_rx *rxp);
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static int fxp_mc_addrs(struct fxp_softc *sc);
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static void fxp_mc_setup(struct fxp_softc *sc);
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static u_int16_t fxp_eeprom_getword(struct fxp_softc *sc, int offset,
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static uint16_t fxp_eeprom_getword(struct fxp_softc *sc, int offset,
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int autosize);
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static void fxp_eeprom_putword(struct fxp_softc *sc, int offset,
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u_int16_t data);
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uint16_t data);
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static void fxp_autosize_eeprom(struct fxp_softc *sc);
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static void fxp_read_eeprom(struct fxp_softc *sc, u_short *data,
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int offset, int words);
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@ -249,7 +249,7 @@ static int sysctl_hw_fxp_int_delay(SYSCTL_HANDLER_ARGS);
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static void fxp_scb_wait(struct fxp_softc *sc);
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static void fxp_scb_cmd(struct fxp_softc *sc, int cmd);
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static void fxp_dma_wait(struct fxp_softc *sc,
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volatile u_int16_t *status, bus_dma_tag_t dmat,
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volatile uint16_t *status, bus_dma_tag_t dmat,
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bus_dmamap_t map);
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static device_method_t fxp_methods[] = {
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@ -311,7 +311,7 @@ fxp_scb_cmd(struct fxp_softc *sc, int cmd)
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}
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static void
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fxp_dma_wait(struct fxp_softc *sc, volatile u_int16_t *status,
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fxp_dma_wait(struct fxp_softc *sc, volatile uint16_t *status,
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bus_dma_tag_t dmat, bus_dmamap_t map)
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{
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int i = 10000;
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@ -331,8 +331,8 @@ fxp_dma_wait(struct fxp_softc *sc, volatile u_int16_t *status,
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static int
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fxp_probe(device_t dev)
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{
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u_int16_t devid;
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u_int8_t revid;
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uint16_t devid;
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uint8_t revid;
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struct fxp_ident *ident;
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if (pci_get_vendor(dev) == FXP_VENDORID_INTEL) {
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@ -352,7 +352,7 @@ fxp_probe(device_t dev)
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static void
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fxp_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
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{
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u_int32_t *addr;
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uint32_t *addr;
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if (error)
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return;
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@ -370,8 +370,8 @@ fxp_attach(device_t dev)
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struct fxp_tx *txp;
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struct fxp_rx *rxp;
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struct ifnet *ifp;
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u_int32_t val;
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u_int16_t data, myea[ETHER_ADDR_LEN / 2];
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uint32_t val;
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uint16_t data, myea[ETHER_ADDR_LEN / 2];
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int i, rid, m1, m2, prefer_iomap, maxtxseg;
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int error, s;
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@ -519,7 +519,7 @@ fxp_attach(device_t dev)
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sc->revision >= FXP_REV_82559_A0) {
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fxp_read_eeprom(sc, &data, 10, 1);
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if (data & 0x02) { /* STB enable */
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u_int16_t cksum;
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uint16_t cksum;
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int i;
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device_printf(dev,
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@ -970,7 +970,7 @@ fxp_resume(device_t dev)
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{
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struct fxp_softc *sc = device_get_softc(dev);
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struct ifnet *ifp = &sc->sc_if;
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u_int16_t pci_command;
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uint16_t pci_command;
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int i, s;
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FXP_LOCK(sc);
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@ -1006,7 +1006,7 @@ fxp_resume(device_t dev)
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static void
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fxp_eeprom_shiftin(struct fxp_softc *sc, int data, int length)
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{
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u_int16_t reg;
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uint16_t reg;
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int x;
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/*
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@ -1033,10 +1033,10 @@ fxp_eeprom_shiftin(struct fxp_softc *sc, int data, int length)
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* The word size is 16 bits, so you have to provide the address for
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* every 16 bits of data.
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*/
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static u_int16_t
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static uint16_t
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fxp_eeprom_getword(struct fxp_softc *sc, int offset, int autosize)
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{
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u_int16_t reg, data;
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uint16_t reg, data;
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int x;
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CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
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@ -1086,7 +1086,7 @@ fxp_eeprom_getword(struct fxp_softc *sc, int offset, int autosize)
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}
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static void
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fxp_eeprom_putword(struct fxp_softc *sc, int offset, u_int16_t data)
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fxp_eeprom_putword(struct fxp_softc *sc, int offset, uint16_t data)
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{
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int i;
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@ -1470,7 +1470,7 @@ static void
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fxp_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
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{
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struct fxp_softc *sc = ifp->if_softc;
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u_int8_t statack;
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uint8_t statack;
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FXP_LOCK(sc);
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if (!(ifp->if_capenable & IFCAP_POLLING)) {
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@ -1485,7 +1485,7 @@ fxp_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
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statack = FXP_SCB_STATACK_CXTNO | FXP_SCB_STATACK_CNA |
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FXP_SCB_STATACK_FR;
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if (cmd == POLL_AND_CHECK_STATUS) {
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u_int8_t tmp;
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uint8_t tmp;
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tmp = CSR_READ_1(sc, FXP_CSR_SCB_STATACK);
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if (tmp == 0xff || tmp == 0) {
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@ -1511,7 +1511,7 @@ fxp_intr(void *xsc)
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{
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struct fxp_softc *sc = xsc;
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struct ifnet *ifp = &sc->sc_if;
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u_int8_t statack;
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uint8_t statack;
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FXP_LOCK(sc);
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if (sc->suspended) {
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@ -1579,7 +1579,7 @@ fxp_txeof(struct fxp_softc *sc)
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}
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static void
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fxp_intr_body(struct fxp_softc *sc, struct ifnet *ifp, u_int8_t statack,
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fxp_intr_body(struct fxp_softc *sc, struct ifnet *ifp, uint8_t statack,
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int count)
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{
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struct mbuf *m;
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@ -2620,18 +2620,18 @@ fxp_mc_setup(struct fxp_softc *sc)
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return;
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}
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static u_int32_t fxp_ucode_d101a[] = D101_A_RCVBUNDLE_UCODE;
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static u_int32_t fxp_ucode_d101b0[] = D101_B0_RCVBUNDLE_UCODE;
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static u_int32_t fxp_ucode_d101ma[] = D101M_B_RCVBUNDLE_UCODE;
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static u_int32_t fxp_ucode_d101s[] = D101S_RCVBUNDLE_UCODE;
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static u_int32_t fxp_ucode_d102[] = D102_B_RCVBUNDLE_UCODE;
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static u_int32_t fxp_ucode_d102c[] = D102_C_RCVBUNDLE_UCODE;
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static uint32_t fxp_ucode_d101a[] = D101_A_RCVBUNDLE_UCODE;
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static uint32_t fxp_ucode_d101b0[] = D101_B0_RCVBUNDLE_UCODE;
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static uint32_t fxp_ucode_d101ma[] = D101M_B_RCVBUNDLE_UCODE;
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static uint32_t fxp_ucode_d101s[] = D101S_RCVBUNDLE_UCODE;
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static uint32_t fxp_ucode_d102[] = D102_B_RCVBUNDLE_UCODE;
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static uint32_t fxp_ucode_d102c[] = D102_C_RCVBUNDLE_UCODE;
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#define UCODE(x) x, sizeof(x)/sizeof(u_int32_t)
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#define UCODE(x) x, sizeof(x)/sizeof(uint32_t)
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struct ucode {
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u_int32_t revision;
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u_int32_t *ucode;
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uint32_t revision;
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uint32_t *ucode;
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int length;
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u_short int_delay_offset;
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u_short bundle_max_offset;
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@ -2668,10 +2668,10 @@ fxp_load_ucode(struct fxp_softc *sc)
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for (i = 0; i < uc->length; i++)
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cbp->ucode[i] = htole32(uc->ucode[i]);
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if (uc->int_delay_offset)
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*(u_int16_t *)&cbp->ucode[uc->int_delay_offset] =
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*(uint16_t *)&cbp->ucode[uc->int_delay_offset] =
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htole16(sc->tunable_int_delay + sc->tunable_int_delay / 2);
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if (uc->bundle_max_offset)
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*(u_int16_t *)&cbp->ucode[uc->bundle_max_offset] =
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*(uint16_t *)&cbp->ucode[uc->bundle_max_offset] =
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htole16(sc->tunable_bundle_max);
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/*
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* Download the ucode to the chip.
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@ -51,7 +51,7 @@
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/*
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* FOR REFERENCE ONLY, the old definition of FXP_CSR_SCB_RUSCUS:
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*
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* volatile u_int8_t :2,
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* volatile uint8_t :2,
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* scb_rus:4,
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* scb_cus:2;
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*/
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@ -111,15 +111,15 @@
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* Command block definitions
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*/
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struct fxp_cb_nop {
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u_int16_t cb_status;
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u_int16_t cb_command;
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u_int32_t link_addr;
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uint16_t cb_status;
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uint16_t cb_command;
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uint32_t link_addr;
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};
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struct fxp_cb_ias {
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u_int16_t cb_status;
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u_int16_t cb_command;
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u_int32_t link_addr;
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u_int8_t macaddr[6];
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uint16_t cb_status;
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uint16_t cb_command;
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uint32_t link_addr;
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uint8_t macaddr[6];
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};
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/* I hate bit-fields :-( */
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@ -142,14 +142,14 @@ struct fxp_cb_ias {
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#endif
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struct fxp_cb_config {
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u_int16_t cb_status;
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u_int16_t cb_command;
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u_int32_t link_addr;
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uint16_t cb_status;
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uint16_t cb_command;
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uint32_t link_addr;
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/* Bytes 0 - 21 -- common to all i8255x */
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u_int __FXP_BITFIELD2(byte_count:6, :2);
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u_int __FXP_BITFIELD3(rx_fifo_limit:4, tx_fifo_limit:3, :1);
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u_int8_t adaptive_ifs;
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uint8_t adaptive_ifs;
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u_int __FXP_BITFIELD5(mwi_enable:1, /* 8,9 */
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type_enable:1, /* 8,9 */
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read_align_en:1, /* 8,9 */
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@ -225,24 +225,24 @@ struct fxp_cb_config {
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u_int __FXP_BITFIELD3(gamla_rx:1,
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vlan_drop_en:1,
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:6);
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u_int8_t pad[9];
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uint8_t pad[9];
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};
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#define MAXMCADDR 80
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struct fxp_cb_mcs {
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u_int16_t cb_status;
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u_int16_t cb_command;
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u_int32_t link_addr;
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u_int16_t mc_cnt;
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u_int8_t mc_addr[MAXMCADDR][6];
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uint16_t cb_status;
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uint16_t cb_command;
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uint32_t link_addr;
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uint16_t mc_cnt;
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uint8_t mc_addr[MAXMCADDR][6];
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};
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#define MAXUCODESIZE 192
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struct fxp_cb_ucode {
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u_int16_t cb_status;
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u_int16_t cb_command;
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u_int32_t link_addr;
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u_int32_t ucode[MAXUCODESIZE];
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uint16_t cb_status;
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uint16_t cb_command;
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uint32_t link_addr;
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uint32_t ucode[MAXUCODESIZE];
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};
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/*
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@ -251,8 +251,8 @@ struct fxp_cb_ucode {
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#define FXP_NTXSEG 32
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struct fxp_tbd {
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u_int32_t tb_addr;
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u_int32_t tb_size;
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uint32_t tb_addr;
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uint32_t tb_size;
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};
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struct fxp_ipcb {
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@ -267,22 +267,22 @@ struct fxp_ipcb {
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* in the TBD array (see note below). This means we only
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* have to define 8 extra bytes here.
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*/
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u_int16_t ipcb_schedule_low;
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u_int8_t ipcb_ip_schedule;
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u_int8_t ipcb_ip_activation_high;
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u_int16_t ipcb_vlan_id;
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u_int8_t ipcb_ip_header_offset;
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u_int8_t ipcb_tcp_header_offset;
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uint16_t ipcb_schedule_low;
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uint8_t ipcb_ip_schedule;
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uint8_t ipcb_ip_activation_high;
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uint16_t ipcb_vlan_id;
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uint8_t ipcb_ip_header_offset;
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uint8_t ipcb_tcp_header_offset;
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};
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struct fxp_cb_tx {
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u_int16_t cb_status;
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u_int16_t cb_command;
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u_int32_t link_addr;
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u_int32_t tbd_array_addr;
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u_int16_t byte_count;
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u_int8_t tx_threshold;
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u_int8_t tbd_number;
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uint16_t cb_status;
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uint16_t cb_command;
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uint32_t link_addr;
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uint32_t tbd_array_addr;
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uint16_t byte_count;
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uint8_t tx_threshold;
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uint8_t tbd_number;
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/*
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* The following structure isn't actually part of the TxCB,
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@ -344,24 +344,24 @@ struct fxp_cb_tx {
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*/
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struct fxp_rfa {
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u_int16_t rfa_status;
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u_int16_t rfa_control;
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u_int32_t link_addr;
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u_int32_t rbd_addr;
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u_int16_t actual_size;
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u_int16_t size;
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uint16_t rfa_status;
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uint16_t rfa_control;
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uint32_t link_addr;
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uint32_t rbd_addr;
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uint16_t actual_size;
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uint16_t size;
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/*
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* The following fields are only available when using
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* extended receive mode on an 82550/82551 chipset.
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*/
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u_int16_t rfax_vlan_id;
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u_int8_t rfax_rx_parser_sts;
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u_int8_t rfax_rsvd0;
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u_int16_t rfax_security_sts;
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u_int8_t rfax_csum_sts;
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u_int8_t rfax_zerocopy_sts;
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u_int8_t rfax_pad[8];
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uint16_t rfax_vlan_id;
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uint8_t rfax_rx_parser_sts;
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uint8_t rfax_rsvd0;
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uint16_t rfax_security_sts;
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uint8_t rfax_csum_sts;
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uint8_t rfax_zerocopy_sts;
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uint8_t rfax_pad[8];
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} __packed;
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#define FXP_RFAX_LEN 16
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@ -400,23 +400,23 @@ struct fxp_rfa {
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* Statistics dump area definitions
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*/
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struct fxp_stats {
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u_int32_t tx_good;
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u_int32_t tx_maxcols;
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u_int32_t tx_latecols;
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u_int32_t tx_underruns;
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u_int32_t tx_lostcrs;
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u_int32_t tx_deffered;
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u_int32_t tx_single_collisions;
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u_int32_t tx_multiple_collisions;
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u_int32_t tx_total_collisions;
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u_int32_t rx_good;
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u_int32_t rx_crc_errors;
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u_int32_t rx_alignment_errors;
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u_int32_t rx_rnr_errors;
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u_int32_t rx_overrun_errors;
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u_int32_t rx_cdt_errors;
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u_int32_t rx_shortframes;
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u_int32_t completion_status;
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uint32_t tx_good;
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uint32_t tx_maxcols;
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uint32_t tx_latecols;
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uint32_t tx_underruns;
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uint32_t tx_lostcrs;
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uint32_t tx_deffered;
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uint32_t tx_single_collisions;
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uint32_t tx_multiple_collisions;
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uint32_t tx_total_collisions;
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uint32_t rx_good;
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uint32_t rx_crc_errors;
|
||||
uint32_t rx_alignment_errors;
|
||||
uint32_t rx_rnr_errors;
|
||||
uint32_t rx_overrun_errors;
|
||||
uint32_t rx_cdt_errors;
|
||||
uint32_t rx_shortframes;
|
||||
uint32_t completion_status;
|
||||
};
|
||||
#define FXP_STATS_DUMP_COMPLETE 0xa005
|
||||
#define FXP_STATS_DR_COMPLETE 0xa007
|
||||
|
@ -124,7 +124,7 @@ struct fxp_rx {
|
||||
struct fxp_rx *rx_next;
|
||||
struct mbuf *rx_mbuf;
|
||||
bus_dmamap_t rx_map;
|
||||
u_int32_t rx_addr;
|
||||
uint32_t rx_addr;
|
||||
};
|
||||
|
||||
struct fxp_tx {
|
||||
@ -144,7 +144,7 @@ struct fxp_desc_list {
|
||||
struct fxp_tx *tx_last;
|
||||
struct fxp_rfa *rfa_list;
|
||||
struct fxp_cb_tx *cbl_list;
|
||||
u_int32_t cbl_addr;
|
||||
uint32_t cbl_addr;
|
||||
bus_dma_tag_t rx_tag;
|
||||
};
|
||||
|
||||
@ -174,11 +174,11 @@ struct fxp_softc {
|
||||
int tx_queued; /* # of active TxCB's */
|
||||
int need_mcsetup; /* multicast filter needs programming */
|
||||
struct fxp_stats *fxp_stats; /* Pointer to interface stats */
|
||||
u_int32_t stats_addr; /* DMA address of the stats structure */
|
||||
uint32_t stats_addr; /* DMA address of the stats structure */
|
||||
int rx_idle_secs; /* # of seconds RX has been idle */
|
||||
struct callout stat_ch; /* stat callout */
|
||||
struct fxp_cb_mcs *mcsp; /* Pointer to mcast setup descriptor */
|
||||
u_int32_t mcs_addr; /* DMA address of the multicast cmd */
|
||||
uint32_t mcs_addr; /* DMA address of the multicast cmd */
|
||||
struct ifmedia sc_media; /* media information */
|
||||
device_t miibus;
|
||||
device_t dev;
|
||||
@ -191,13 +191,13 @@ struct fxp_softc {
|
||||
int cu_resume_bug;
|
||||
int revision;
|
||||
int flags;
|
||||
u_int32_t saved_maps[5]; /* pci data */
|
||||
u_int32_t saved_biosaddr;
|
||||
u_int8_t saved_intline;
|
||||
u_int8_t saved_cachelnsz;
|
||||
u_int8_t saved_lattimer;
|
||||
u_int8_t rfa_size;
|
||||
u_int32_t tx_cmd;
|
||||
uint32_t saved_maps[5]; /* pci data */
|
||||
uint32_t saved_biosaddr;
|
||||
uint8_t saved_intline;
|
||||
uint8_t saved_cachelnsz;
|
||||
uint8_t saved_lattimer;
|
||||
uint8_t rfa_size;
|
||||
uint32_t tx_cmd;
|
||||
};
|
||||
|
||||
#define FXP_FLAG_MWI_ENABLE 0x0001 /* MWI enable */
|
||||
|
Loading…
Reference in New Issue
Block a user