Cleanup: u_intXX_t -> uintX_t conversion.

This commit is contained in:
mux 2005-03-06 05:07:26 +00:00
parent 6c94985636
commit 05398c2e32
3 changed files with 110 additions and 110 deletions

View File

@ -140,7 +140,7 @@ static u_char fxp_cb_config_template[] = {
};
struct fxp_ident {
u_int16_t devid;
uint16_t devid;
int16_t revid; /* -1 matches anything */
char *name;
};
@ -208,7 +208,7 @@ static int fxp_resume(device_t dev);
static void fxp_intr(void *xsc);
static void fxp_intr_body(struct fxp_softc *sc, struct ifnet *ifp,
u_int8_t statack, int count);
uint8_t statack, int count);
static void fxp_init(void *xsc);
static void fxp_init_body(struct fxp_softc *sc);
static void fxp_tick(void *xsc);
@ -223,10 +223,10 @@ static int fxp_add_rfabuf(struct fxp_softc *sc,
struct fxp_rx *rxp);
static int fxp_mc_addrs(struct fxp_softc *sc);
static void fxp_mc_setup(struct fxp_softc *sc);
static u_int16_t fxp_eeprom_getword(struct fxp_softc *sc, int offset,
static uint16_t fxp_eeprom_getword(struct fxp_softc *sc, int offset,
int autosize);
static void fxp_eeprom_putword(struct fxp_softc *sc, int offset,
u_int16_t data);
uint16_t data);
static void fxp_autosize_eeprom(struct fxp_softc *sc);
static void fxp_read_eeprom(struct fxp_softc *sc, u_short *data,
int offset, int words);
@ -249,7 +249,7 @@ static int sysctl_hw_fxp_int_delay(SYSCTL_HANDLER_ARGS);
static void fxp_scb_wait(struct fxp_softc *sc);
static void fxp_scb_cmd(struct fxp_softc *sc, int cmd);
static void fxp_dma_wait(struct fxp_softc *sc,
volatile u_int16_t *status, bus_dma_tag_t dmat,
volatile uint16_t *status, bus_dma_tag_t dmat,
bus_dmamap_t map);
static device_method_t fxp_methods[] = {
@ -311,7 +311,7 @@ fxp_scb_cmd(struct fxp_softc *sc, int cmd)
}
static void
fxp_dma_wait(struct fxp_softc *sc, volatile u_int16_t *status,
fxp_dma_wait(struct fxp_softc *sc, volatile uint16_t *status,
bus_dma_tag_t dmat, bus_dmamap_t map)
{
int i = 10000;
@ -331,8 +331,8 @@ fxp_dma_wait(struct fxp_softc *sc, volatile u_int16_t *status,
static int
fxp_probe(device_t dev)
{
u_int16_t devid;
u_int8_t revid;
uint16_t devid;
uint8_t revid;
struct fxp_ident *ident;
if (pci_get_vendor(dev) == FXP_VENDORID_INTEL) {
@ -352,7 +352,7 @@ fxp_probe(device_t dev)
static void
fxp_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
{
u_int32_t *addr;
uint32_t *addr;
if (error)
return;
@ -370,8 +370,8 @@ fxp_attach(device_t dev)
struct fxp_tx *txp;
struct fxp_rx *rxp;
struct ifnet *ifp;
u_int32_t val;
u_int16_t data, myea[ETHER_ADDR_LEN / 2];
uint32_t val;
uint16_t data, myea[ETHER_ADDR_LEN / 2];
int i, rid, m1, m2, prefer_iomap, maxtxseg;
int error, s;
@ -519,7 +519,7 @@ fxp_attach(device_t dev)
sc->revision >= FXP_REV_82559_A0) {
fxp_read_eeprom(sc, &data, 10, 1);
if (data & 0x02) { /* STB enable */
u_int16_t cksum;
uint16_t cksum;
int i;
device_printf(dev,
@ -970,7 +970,7 @@ fxp_resume(device_t dev)
{
struct fxp_softc *sc = device_get_softc(dev);
struct ifnet *ifp = &sc->sc_if;
u_int16_t pci_command;
uint16_t pci_command;
int i, s;
FXP_LOCK(sc);
@ -1006,7 +1006,7 @@ fxp_resume(device_t dev)
static void
fxp_eeprom_shiftin(struct fxp_softc *sc, int data, int length)
{
u_int16_t reg;
uint16_t reg;
int x;
/*
@ -1033,10 +1033,10 @@ fxp_eeprom_shiftin(struct fxp_softc *sc, int data, int length)
* The word size is 16 bits, so you have to provide the address for
* every 16 bits of data.
*/
static u_int16_t
static uint16_t
fxp_eeprom_getword(struct fxp_softc *sc, int offset, int autosize)
{
u_int16_t reg, data;
uint16_t reg, data;
int x;
CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
@ -1086,7 +1086,7 @@ fxp_eeprom_getword(struct fxp_softc *sc, int offset, int autosize)
}
static void
fxp_eeprom_putword(struct fxp_softc *sc, int offset, u_int16_t data)
fxp_eeprom_putword(struct fxp_softc *sc, int offset, uint16_t data)
{
int i;
@ -1470,7 +1470,7 @@ static void
fxp_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
{
struct fxp_softc *sc = ifp->if_softc;
u_int8_t statack;
uint8_t statack;
FXP_LOCK(sc);
if (!(ifp->if_capenable & IFCAP_POLLING)) {
@ -1485,7 +1485,7 @@ fxp_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
statack = FXP_SCB_STATACK_CXTNO | FXP_SCB_STATACK_CNA |
FXP_SCB_STATACK_FR;
if (cmd == POLL_AND_CHECK_STATUS) {
u_int8_t tmp;
uint8_t tmp;
tmp = CSR_READ_1(sc, FXP_CSR_SCB_STATACK);
if (tmp == 0xff || tmp == 0) {
@ -1511,7 +1511,7 @@ fxp_intr(void *xsc)
{
struct fxp_softc *sc = xsc;
struct ifnet *ifp = &sc->sc_if;
u_int8_t statack;
uint8_t statack;
FXP_LOCK(sc);
if (sc->suspended) {
@ -1579,7 +1579,7 @@ fxp_txeof(struct fxp_softc *sc)
}
static void
fxp_intr_body(struct fxp_softc *sc, struct ifnet *ifp, u_int8_t statack,
fxp_intr_body(struct fxp_softc *sc, struct ifnet *ifp, uint8_t statack,
int count)
{
struct mbuf *m;
@ -2620,18 +2620,18 @@ fxp_mc_setup(struct fxp_softc *sc)
return;
}
static u_int32_t fxp_ucode_d101a[] = D101_A_RCVBUNDLE_UCODE;
static u_int32_t fxp_ucode_d101b0[] = D101_B0_RCVBUNDLE_UCODE;
static u_int32_t fxp_ucode_d101ma[] = D101M_B_RCVBUNDLE_UCODE;
static u_int32_t fxp_ucode_d101s[] = D101S_RCVBUNDLE_UCODE;
static u_int32_t fxp_ucode_d102[] = D102_B_RCVBUNDLE_UCODE;
static u_int32_t fxp_ucode_d102c[] = D102_C_RCVBUNDLE_UCODE;
static uint32_t fxp_ucode_d101a[] = D101_A_RCVBUNDLE_UCODE;
static uint32_t fxp_ucode_d101b0[] = D101_B0_RCVBUNDLE_UCODE;
static uint32_t fxp_ucode_d101ma[] = D101M_B_RCVBUNDLE_UCODE;
static uint32_t fxp_ucode_d101s[] = D101S_RCVBUNDLE_UCODE;
static uint32_t fxp_ucode_d102[] = D102_B_RCVBUNDLE_UCODE;
static uint32_t fxp_ucode_d102c[] = D102_C_RCVBUNDLE_UCODE;
#define UCODE(x) x, sizeof(x)/sizeof(u_int32_t)
#define UCODE(x) x, sizeof(x)/sizeof(uint32_t)
struct ucode {
u_int32_t revision;
u_int32_t *ucode;
uint32_t revision;
uint32_t *ucode;
int length;
u_short int_delay_offset;
u_short bundle_max_offset;
@ -2668,10 +2668,10 @@ fxp_load_ucode(struct fxp_softc *sc)
for (i = 0; i < uc->length; i++)
cbp->ucode[i] = htole32(uc->ucode[i]);
if (uc->int_delay_offset)
*(u_int16_t *)&cbp->ucode[uc->int_delay_offset] =
*(uint16_t *)&cbp->ucode[uc->int_delay_offset] =
htole16(sc->tunable_int_delay + sc->tunable_int_delay / 2);
if (uc->bundle_max_offset)
*(u_int16_t *)&cbp->ucode[uc->bundle_max_offset] =
*(uint16_t *)&cbp->ucode[uc->bundle_max_offset] =
htole16(sc->tunable_bundle_max);
/*
* Download the ucode to the chip.

View File

@ -51,7 +51,7 @@
/*
* FOR REFERENCE ONLY, the old definition of FXP_CSR_SCB_RUSCUS:
*
* volatile u_int8_t :2,
* volatile uint8_t :2,
* scb_rus:4,
* scb_cus:2;
*/
@ -111,15 +111,15 @@
* Command block definitions
*/
struct fxp_cb_nop {
u_int16_t cb_status;
u_int16_t cb_command;
u_int32_t link_addr;
uint16_t cb_status;
uint16_t cb_command;
uint32_t link_addr;
};
struct fxp_cb_ias {
u_int16_t cb_status;
u_int16_t cb_command;
u_int32_t link_addr;
u_int8_t macaddr[6];
uint16_t cb_status;
uint16_t cb_command;
uint32_t link_addr;
uint8_t macaddr[6];
};
/* I hate bit-fields :-( */
@ -142,14 +142,14 @@ struct fxp_cb_ias {
#endif
struct fxp_cb_config {
u_int16_t cb_status;
u_int16_t cb_command;
u_int32_t link_addr;
uint16_t cb_status;
uint16_t cb_command;
uint32_t link_addr;
/* Bytes 0 - 21 -- common to all i8255x */
u_int __FXP_BITFIELD2(byte_count:6, :2);
u_int __FXP_BITFIELD3(rx_fifo_limit:4, tx_fifo_limit:3, :1);
u_int8_t adaptive_ifs;
uint8_t adaptive_ifs;
u_int __FXP_BITFIELD5(mwi_enable:1, /* 8,9 */
type_enable:1, /* 8,9 */
read_align_en:1, /* 8,9 */
@ -225,24 +225,24 @@ struct fxp_cb_config {
u_int __FXP_BITFIELD3(gamla_rx:1,
vlan_drop_en:1,
:6);
u_int8_t pad[9];
uint8_t pad[9];
};
#define MAXMCADDR 80
struct fxp_cb_mcs {
u_int16_t cb_status;
u_int16_t cb_command;
u_int32_t link_addr;
u_int16_t mc_cnt;
u_int8_t mc_addr[MAXMCADDR][6];
uint16_t cb_status;
uint16_t cb_command;
uint32_t link_addr;
uint16_t mc_cnt;
uint8_t mc_addr[MAXMCADDR][6];
};
#define MAXUCODESIZE 192
struct fxp_cb_ucode {
u_int16_t cb_status;
u_int16_t cb_command;
u_int32_t link_addr;
u_int32_t ucode[MAXUCODESIZE];
uint16_t cb_status;
uint16_t cb_command;
uint32_t link_addr;
uint32_t ucode[MAXUCODESIZE];
};
/*
@ -251,8 +251,8 @@ struct fxp_cb_ucode {
#define FXP_NTXSEG 32
struct fxp_tbd {
u_int32_t tb_addr;
u_int32_t tb_size;
uint32_t tb_addr;
uint32_t tb_size;
};
struct fxp_ipcb {
@ -267,22 +267,22 @@ struct fxp_ipcb {
* in the TBD array (see note below). This means we only
* have to define 8 extra bytes here.
*/
u_int16_t ipcb_schedule_low;
u_int8_t ipcb_ip_schedule;
u_int8_t ipcb_ip_activation_high;
u_int16_t ipcb_vlan_id;
u_int8_t ipcb_ip_header_offset;
u_int8_t ipcb_tcp_header_offset;
uint16_t ipcb_schedule_low;
uint8_t ipcb_ip_schedule;
uint8_t ipcb_ip_activation_high;
uint16_t ipcb_vlan_id;
uint8_t ipcb_ip_header_offset;
uint8_t ipcb_tcp_header_offset;
};
struct fxp_cb_tx {
u_int16_t cb_status;
u_int16_t cb_command;
u_int32_t link_addr;
u_int32_t tbd_array_addr;
u_int16_t byte_count;
u_int8_t tx_threshold;
u_int8_t tbd_number;
uint16_t cb_status;
uint16_t cb_command;
uint32_t link_addr;
uint32_t tbd_array_addr;
uint16_t byte_count;
uint8_t tx_threshold;
uint8_t tbd_number;
/*
* The following structure isn't actually part of the TxCB,
@ -344,24 +344,24 @@ struct fxp_cb_tx {
*/
struct fxp_rfa {
u_int16_t rfa_status;
u_int16_t rfa_control;
u_int32_t link_addr;
u_int32_t rbd_addr;
u_int16_t actual_size;
u_int16_t size;
uint16_t rfa_status;
uint16_t rfa_control;
uint32_t link_addr;
uint32_t rbd_addr;
uint16_t actual_size;
uint16_t size;
/*
* The following fields are only available when using
* extended receive mode on an 82550/82551 chipset.
*/
u_int16_t rfax_vlan_id;
u_int8_t rfax_rx_parser_sts;
u_int8_t rfax_rsvd0;
u_int16_t rfax_security_sts;
u_int8_t rfax_csum_sts;
u_int8_t rfax_zerocopy_sts;
u_int8_t rfax_pad[8];
uint16_t rfax_vlan_id;
uint8_t rfax_rx_parser_sts;
uint8_t rfax_rsvd0;
uint16_t rfax_security_sts;
uint8_t rfax_csum_sts;
uint8_t rfax_zerocopy_sts;
uint8_t rfax_pad[8];
} __packed;
#define FXP_RFAX_LEN 16
@ -400,23 +400,23 @@ struct fxp_rfa {
* Statistics dump area definitions
*/
struct fxp_stats {
u_int32_t tx_good;
u_int32_t tx_maxcols;
u_int32_t tx_latecols;
u_int32_t tx_underruns;
u_int32_t tx_lostcrs;
u_int32_t tx_deffered;
u_int32_t tx_single_collisions;
u_int32_t tx_multiple_collisions;
u_int32_t tx_total_collisions;
u_int32_t rx_good;
u_int32_t rx_crc_errors;
u_int32_t rx_alignment_errors;
u_int32_t rx_rnr_errors;
u_int32_t rx_overrun_errors;
u_int32_t rx_cdt_errors;
u_int32_t rx_shortframes;
u_int32_t completion_status;
uint32_t tx_good;
uint32_t tx_maxcols;
uint32_t tx_latecols;
uint32_t tx_underruns;
uint32_t tx_lostcrs;
uint32_t tx_deffered;
uint32_t tx_single_collisions;
uint32_t tx_multiple_collisions;
uint32_t tx_total_collisions;
uint32_t rx_good;
uint32_t rx_crc_errors;
uint32_t rx_alignment_errors;
uint32_t rx_rnr_errors;
uint32_t rx_overrun_errors;
uint32_t rx_cdt_errors;
uint32_t rx_shortframes;
uint32_t completion_status;
};
#define FXP_STATS_DUMP_COMPLETE 0xa005
#define FXP_STATS_DR_COMPLETE 0xa007

View File

@ -124,7 +124,7 @@ struct fxp_rx {
struct fxp_rx *rx_next;
struct mbuf *rx_mbuf;
bus_dmamap_t rx_map;
u_int32_t rx_addr;
uint32_t rx_addr;
};
struct fxp_tx {
@ -144,7 +144,7 @@ struct fxp_desc_list {
struct fxp_tx *tx_last;
struct fxp_rfa *rfa_list;
struct fxp_cb_tx *cbl_list;
u_int32_t cbl_addr;
uint32_t cbl_addr;
bus_dma_tag_t rx_tag;
};
@ -174,11 +174,11 @@ struct fxp_softc {
int tx_queued; /* # of active TxCB's */
int need_mcsetup; /* multicast filter needs programming */
struct fxp_stats *fxp_stats; /* Pointer to interface stats */
u_int32_t stats_addr; /* DMA address of the stats structure */
uint32_t stats_addr; /* DMA address of the stats structure */
int rx_idle_secs; /* # of seconds RX has been idle */
struct callout stat_ch; /* stat callout */
struct fxp_cb_mcs *mcsp; /* Pointer to mcast setup descriptor */
u_int32_t mcs_addr; /* DMA address of the multicast cmd */
uint32_t mcs_addr; /* DMA address of the multicast cmd */
struct ifmedia sc_media; /* media information */
device_t miibus;
device_t dev;
@ -191,13 +191,13 @@ struct fxp_softc {
int cu_resume_bug;
int revision;
int flags;
u_int32_t saved_maps[5]; /* pci data */
u_int32_t saved_biosaddr;
u_int8_t saved_intline;
u_int8_t saved_cachelnsz;
u_int8_t saved_lattimer;
u_int8_t rfa_size;
u_int32_t tx_cmd;
uint32_t saved_maps[5]; /* pci data */
uint32_t saved_biosaddr;
uint8_t saved_intline;
uint8_t saved_cachelnsz;
uint8_t saved_lattimer;
uint8_t rfa_size;
uint32_t tx_cmd;
};
#define FXP_FLAG_MWI_ENABLE 0x0001 /* MWI enable */