Simplify non-pti syscall entry on amd64.

Limit manipulations to use %rax as scratch to the pti portion of the
syscall entry code.

Submitted by:	alc
Reviewed by:	markj
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D25722
This commit is contained in:
Konstantin Belousov 2020-07-19 17:47:55 +00:00
parent 208b9eabb4
commit 0675f4e1ca
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=363329

View File

@ -526,17 +526,17 @@ prot_addrf:
IDTVEC(fast_syscall_pti)
swapgs
lfence
movq %rax,PCPU(SCRATCH_RAX)
cmpq $~0,PCPU(UCR3)
je fast_syscall_common
movq %rax,PCPU(SCRATCH_RAX)
movq PCPU(KCR3),%rax
movq %rax,%cr3
movq PCPU(SCRATCH_RAX),%rax
jmp fast_syscall_common
SUPERALIGN_TEXT
IDTVEC(fast_syscall)
swapgs
lfence
movq %rax,PCPU(SCRATCH_RAX)
fast_syscall_common:
movq %rsp,PCPU(SCRATCH_RSP)
movq PCPU(RSP0),%rsp
@ -547,7 +547,6 @@ fast_syscall_common:
movq %rcx,TF_RIP(%rsp) /* %rcx original value is in %r10 */
movq PCPU(SCRATCH_RSP),%r11 /* %r11 already saved */
movq %r11,TF_RSP(%rsp) /* user stack pointer */
movq PCPU(SCRATCH_RAX),%rax
/*
* Save a few arg registers early to free them for use in
* handle_ibrs_entry(). %r10 is especially tricky. It is not an