For the VIA8233A use multi-sgd register set for primary playback
channel and disable DXS3. Several users have reported DXS3 as playing at half speed on the 8233A revision of the chipset. This implicitly means no SPDIF for VIA8233A users.
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@ -824,8 +824,14 @@ via_attach(device_t dev)
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/* Register */
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if (pci_get_revid(dev) == VIA8233_REV_ID_8233A) {
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if (pcm_register(dev, via, NMSGDCHANS + 1, 1)) goto bad;
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if (pcm_register(dev, via, NMSGDCHANS, 1)) goto bad;
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/*
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* DXS channel is disabled. Reports from multiple users
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* that it plays at half-speed. Do not see this behaviour
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* on available 8233C or when emulating 8233A register set
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* on 8233C (either with or without ac97 VRA).
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pcm_addchan(dev, PCMDIR_PLAY, &via8233dxs_class, via);
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*/
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pcm_addchan(dev, PCMDIR_PLAY, &via8233msgd_class, via);
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pcm_addchan(dev, PCMDIR_REC, &via8233wr_class, via);
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} else {
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@ -836,10 +842,10 @@ via_attach(device_t dev)
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pcm_addchan(dev, PCMDIR_PLAY, &via8233msgd_class, via);
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for (i = 0; i < NWRCHANS; i++)
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pcm_addchan(dev, PCMDIR_REC, &via8233wr_class, via);
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via_init_sysctls(dev);
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}
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pcm_setstatus(dev, status);
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via_init_sysctls(dev);
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return 0;
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bad:
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