Poke correct GPIO pins for newer axe(4) controllers with Marvell

PHY. Newer models seem to use different LED mode that requires
enabling both GPIO1 and GPIO2.

Tested by:	marcel
This commit is contained in:
Pyun YongHyeon 2011-06-01 18:42:44 +00:00
parent 0c38ca8cf4
commit 082b754397
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=222581

View File

@ -514,7 +514,7 @@ static void
axe_ax88178_init(struct axe_softc *sc)
{
struct usb_ether *ue;
int gpio0, phymode;
int gpio0, ledmode, phymode;
uint16_t eeprom, val;
ue = &sc->sc_ue;
@ -528,9 +528,11 @@ axe_ax88178_init(struct axe_softc *sc)
if (eeprom == 0xffff) {
phymode = AXE_PHY_MODE_MARVELL;
gpio0 = 1;
ledmode = 0;
} else {
phymode = eeprom & 0x7f;
gpio0 = (eeprom & 0x80) ? 0 : 1;
ledmode = eeprom >> 8;
}
if (bootverbose)
@ -548,9 +550,22 @@ axe_ax88178_init(struct axe_softc *sc)
AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2_EN, hz / 4);
AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2 | AXE_GPIO2_EN,
hz / 32);
} else
} else {
AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 |
AXE_GPIO1_EN, hz / 32);
AXE_GPIO1_EN, hz / 3);
if (ledmode == 1) {
AXE_GPIO_WRITE(AXE_GPIO1_EN, hz / 3);
AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN,
hz / 3);
} else {
AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN |
AXE_GPIO2 | AXE_GPIO2_EN, hz / 32);
AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN |
AXE_GPIO2_EN, hz / 4);
AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN |
AXE_GPIO2 | AXE_GPIO2_EN, hz / 32);
}
}
break;
case AXE_PHY_MODE_CICADA:
case AXE_PHY_MODE_CICADA_V2: