powerpc64/powernv: Use OPAL call for non-POWER8 PCI TCE reset

According to the OPAL documentation, only the POWER8 (PHB3) should use
the register write TCE reset method.  All others should use the OPAL
call.

On POWER9 the call is semantically identical to the register write, with
a wait for completion.
This commit is contained in:
Justin Hibbits 2019-11-10 04:24:36 +00:00
parent 028d96899b
commit 0b4753405b
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=354584
2 changed files with 10 additions and 3 deletions

View File

@ -129,6 +129,11 @@ int opal_call(uint64_t token, ...);
#define OPAL_IGNORE_RID_FUNC_NUMBER 0
#define OPAL_COMPARE_RID_FUNC_NUMBER 1
/* For OPAL_PCI_TCE_KILL */
#define OPAL_PCI_TCE_KILL_PAGE 0
#define OPAL_PCI_TCE_KILL_PE 1
#define OPAL_PCI_TCE_KILL_ALL 2
#define OPAL_SUCCESS 0
#define OPAL_PARAMETER -1
#define OPAL_BUSY -2

View File

@ -409,10 +409,12 @@ opalpci_attach(device_t dev)
/*
* Invalidate all previous TCE entries.
*
* TODO: add support for other PHBs than PHB3
*/
pci_phb3_tce_invalidate_entire(sc);
if (ofw_bus_is_compatible(dev, "power8-pciex"))
pci_phb3_tce_invalidate_entire(sc);
else
opal_call(OPAL_PCI_TCE_KILL, sc->phb_id, OPAL_PCI_TCE_KILL_ALL,
OPAL_PCI_DEFAULT_PE, 0, 0, 0);
/*
* Get MSI properties