Tweak -mdoc usage.

This commit is contained in:
Joseph Koshy 2008-11-13 16:32:20 +00:00
parent 160bda3652
commit 0b4dcce33e
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=184932
3 changed files with 7 additions and 7 deletions

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@ -930,7 +930,7 @@ The number of cycles micro-ops were dispatched for execution on port
The number of cycles micro-ops were dispatched for execution on port
4.
.It Li RS_UOPS_DISPATCHED.PORT5
.Pq Event A1H , Umask 20
.Pq Event A1H , Umask 20H
The number of cycles micro-ops were dispatched for execution on port
5.
.It Li SB_DRAIN_CYCLES
@ -1116,7 +1116,7 @@ globally observed.
The number of cycles while a store was blocked due to a conflict with
an internal or external snoop.
.It Li STORE_FORWARDS.GOOD
.Pq Event 02, Umask 81H
.Pq Event 02H , Umask 81H
The number of times stored data was forwarded directly to a load.
.It Li THERMAL_TRIP
.Pq Event 3BH , Umask C0H

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@ -234,12 +234,12 @@ The number of branch instructions executed including speculative branches.
.Pq Event E0H , Umask 00H
The number of branch instructions decoded.
.It Li Br_Instr_Ret
.Pq Event C4H, Umask 00H
.Pq Event C4H , Umask 00H
.Pq Alias Qq "Branch Instruction Retired"
The number of branch instructions retired.
This is an architectural performance event.
.It Li Br_MisPred_Ret
.Pq Event C5H, Umask 00H
.Pq Event C5H , Umask 00H
.Pq Alias Qq "Branch Misses Retired"
The number of mispredicted branch instructions retired.
This is an architectural performance event.
@ -553,7 +553,7 @@ The number of L2 cache writes including speculative writes.
.Pq Event 03H , Umask 00H
The number of load operations delayed due to store buffer blocks.
.It Li LLC_Misses
.Pq Event 2EH, Umask 41H
.Pq Event 2EH , Umask 41H
The number of cache misses for references to the last level cache,
excluding misses due to hardware prefetches.
This is an architectural performance event.
@ -561,7 +561,7 @@ This is an architectural performance event.
The number of references to the last level cache,
excluding those due to hardware prefetches.
This is an architectural performance event.
.Pq Event 2EH, Umask 4FH
.Pq Event 2EH , Umask 4FH
This is an architectural performance event.
.It Li MMX_Assist
.Pq Event CDH , Umask 00H

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@ -275,7 +275,7 @@ The number of branches executed, but not necessarily retired.
The number of branch instructions retired.
This is an architectural performance event.
.It Li BR_INST_RETIRED.MISPRED
.Pq Event C5H, Umask 00H
.Pq Event C5H , Umask 00H
.Pq Alias Qq "Branch Misses Retired"
The number of mispredicted branch instructions retired.
This is an architectural performance event.