XL_DMACTL is 32bit register, use 32bit write macro.
While I'm here add more bits for the register.
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=221568
@ -2969,7 +2969,7 @@ xl_init_locked(struct xl_softc *sc)
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/* Set the RX early threshold */
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/* Set the RX early threshold */
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CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_THRESH|(XL_PACKET_SIZE >>2));
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CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_THRESH|(XL_PACKET_SIZE >>2));
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CSR_WRITE_2(sc, XL_DMACTL, XL_DMACTL_UP_RX_EARLY);
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CSR_WRITE_4(sc, XL_DMACTL, XL_DMACTL_UP_RX_EARLY);
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/* Enable receiver and transmitter. */
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/* Enable receiver and transmitter. */
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CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_ENABLE);
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CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_ENABLE);
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@ -124,6 +124,11 @@
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#define XL_DMACTL_DOWN_INPROG 0x00000080
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#define XL_DMACTL_DOWN_INPROG 0x00000080
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#define XL_DMACTL_COUNTER_SPEED 0x00000100
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#define XL_DMACTL_COUNTER_SPEED 0x00000100
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#define XL_DMACTL_DOWNDOWN_MODE 0x00000200
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#define XL_DMACTL_DOWNDOWN_MODE 0x00000200
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#define XL_DMACTL_UP_ALTSEQ_DIS 0x00010000 /* 3c90xB/3c90xC */
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#define XL_DMACTL_DOWN_ALTSEQ_DIS 0x00020000 /* 3c90xC only */
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#define XL_DMACTL_DEFEAT_MWI 0x00100000 /* 3c90xB/3c90xC */
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#define XL_DMACTL_DEFEAT_MRL 0x00100000 /* 3c90xB/3c90xC */
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#define XL_DMACTL_UP_OVERRUN_DISC_DIS 0x00200000 /* 3c90xB/3c90xC */
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#define XL_DMACTL_TARGET_ABORT 0x40000000
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#define XL_DMACTL_TARGET_ABORT 0x40000000
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#define XL_DMACTL_MASTER_ABORT 0x80000000
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#define XL_DMACTL_MASTER_ABORT 0x80000000
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