- Add support for PMCs in Intel CPUs of Family 6, model 0xE (Core Solo

and Core Duo), models 0xF (Core2), model 0x17 (Core2Extreme) and
  model 0x1C (Atom).

  In these CPUs, the actual numbers, kinds and widths of PMCs present
  need to queried at run time.  Support for specific "architectural"
  events also needs to be queried at run time.

  Model 0xE CPUs support programmable PMCs, subsequent CPUs
  additionally support "fixed-function" counters.

- Use event names that are close to vendor documentation, taking in
  account that:
  - events with identical semantics on two or more CPUs in this family
    can have differing names in vendor documentation,
  - identical vendor event names may map to differing events across
    CPUs,
  - each type of CPU supports a different subset of measurable
    events.

  Fixed-function and programmable counters both use the same vendor
  names for events.  The use of a class name prefix ("iaf-" or
  "iap-" respectively) permits these to be distinguished.

- In libpmc, refactor pmc_name_of_event() into a public interface
  and an internal helper function, for use by log handling code.

- Minor code tweaks: staticize a global, freshen a few comments.

Tested by:	gnn
This commit is contained in:
Joseph Koshy 2008-11-27 09:00:47 +00:00
parent 3c8d4fc09b
commit 0cfab8ddc1
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=185363
17 changed files with 3358 additions and 76 deletions

View File

@ -42,12 +42,18 @@ __FBSDID("$FreeBSD$");
#include <strings.h>
#include <unistd.h>
#include "libpmcinternal.h"
/* Function prototypes */
#if defined(__i386__)
static int k7_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
struct pmc_op_pmcallocate *_pmc_config);
#endif
#if defined(__amd64__) || defined(__i386__)
static int iaf_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
struct pmc_op_pmcallocate *_pmc_config);
static int iap_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
struct pmc_op_pmcallocate *_pmc_config);
static int k8_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
struct pmc_op_pmcallocate *_pmc_config);
static int p4_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
@ -110,19 +116,55 @@ struct pmc_class_descr {
#define __PMC_EV(C,N) { #N, PMC_EV_ ## C ## _ ## N },
/*
* PMC_MDEP_TABLE(NAME, CLASS, ADDITIONAL_CLASSES...)
* PMC_CLASSDEP_TABLE(NAME, CLASS)
*
* Build an event descriptor table and a list of valid PMC classes.
* Define a table mapping event names and aliases to HWPMC event IDs.
*/
#define PMC_MDEP_TABLE(N,C,...) \
#define PMC_CLASSDEP_TABLE(N, C) \
static const struct pmc_event_descr N##_event_table[] = \
{ \
__PMC_EV_##C() \
}; \
}
PMC_CLASSDEP_TABLE(iaf, IAF);
PMC_CLASSDEP_TABLE(k7, K7);
PMC_CLASSDEP_TABLE(k8, K8);
PMC_CLASSDEP_TABLE(p4, P4);
PMC_CLASSDEP_TABLE(p5, P5);
PMC_CLASSDEP_TABLE(p6, P6);
#undef __PMC_EV_ALIAS
#define __PMC_EV_ALIAS(N,CODE) { N, PMC_EV_##CODE },
static const struct pmc_event_descr atom_event_table[] =
{
__PMC_EV_ALIAS_ATOM()
};
static const struct pmc_event_descr core_event_table[] =
{
__PMC_EV_ALIAS_CORE()
};
static const struct pmc_event_descr core2_event_table[] =
{
__PMC_EV_ALIAS_CORE2()
};
/*
* PMC_MDEP_TABLE(NAME, PRIMARYCLASS, ADDITIONAL_CLASSES...)
*
* Map a CPU to the PMC classes it supports.
*/
#define PMC_MDEP_TABLE(N,C,...) \
static const enum pmc_class N##_pmc_classes[] = { \
PMC_CLASS_##C, __VA_ARGS__ \
}
PMC_MDEP_TABLE(atom, IAP, PMC_CLASS_IAF, PMC_CLASS_TSC);
PMC_MDEP_TABLE(core, IAP, PMC_CLASS_TSC);
PMC_MDEP_TABLE(core2, IAP, PMC_CLASS_IAF, PMC_CLASS_TSC);
PMC_MDEP_TABLE(k7, K7, PMC_CLASS_TSC);
PMC_MDEP_TABLE(k8, K8, PMC_CLASS_TSC);
PMC_MDEP_TABLE(p4, P4, PMC_CLASS_TSC);
@ -135,39 +177,44 @@ static const struct pmc_event_descr tsc_event_table[] =
};
#undef PMC_CLASS_TABLE_DESC
#define PMC_CLASS_TABLE_DESC(N, C) { \
.pm_evc_name = #N "-", \
.pm_evc_name_size = sizeof(#N "-") - 1, \
.pm_evc_class = PMC_CLASS_##C , \
.pm_evc_event_table = N##_event_table , \
#define PMC_CLASS_TABLE_DESC(NAME, CLASS, EVENTS, ALLOCATOR) \
static const struct pmc_class_descr NAME##_class_table_descr = \
{ \
.pm_evc_name = #CLASS "-", \
.pm_evc_name_size = sizeof(#CLASS "-") - 1, \
.pm_evc_class = PMC_CLASS_##CLASS , \
.pm_evc_event_table = EVENTS##_event_table , \
.pm_evc_event_table_size = \
PMC_EVENT_TABLE_SIZE(N), \
.pm_evc_allocate_pmc = N##_allocate_pmc \
PMC_EVENT_TABLE_SIZE(EVENTS), \
.pm_evc_allocate_pmc = ALLOCATOR##_allocate_pmc \
}
static const struct pmc_class_descr pmc_class_table[] =
{
#if defined(__i386__)
PMC_CLASS_TABLE_DESC(k7, K7),
#endif
#if defined(__i386__) || defined(__amd64__)
PMC_CLASS_TABLE_DESC(k8, K8),
PMC_CLASS_TABLE_DESC(p4, P4),
PMC_CLASS_TABLE_DESC(iaf, IAF, iaf, iaf);
PMC_CLASS_TABLE_DESC(atom, IAP, atom, iap);
PMC_CLASS_TABLE_DESC(core, IAP, core, iap);
PMC_CLASS_TABLE_DESC(core2, IAP, core2, iap);
#endif
#if defined(__i386__)
PMC_CLASS_TABLE_DESC(p5, P5),
PMC_CLASS_TABLE_DESC(p6, P6),
PMC_CLASS_TABLE_DESC(k7, K7, k7, k7);
#endif
#if defined(__i386__) || defined(__amd64__)
PMC_CLASS_TABLE_DESC(tsc, TSC)
PMC_CLASS_TABLE_DESC(k8, K8, k8, k8);
PMC_CLASS_TABLE_DESC(p4, P4, p4, p4);
#endif
#if defined(__i386__)
PMC_CLASS_TABLE_DESC(p5, P5, p5, p5);
PMC_CLASS_TABLE_DESC(p6, P6, p6, p6);
#endif
#if defined(__i386__) || defined(__amd64__)
PMC_CLASS_TABLE_DESC(tsc, TSC, tsc, tsc);
#endif
};
static size_t pmc_event_class_table_size =
PMC_TABLE_SIZE(pmc_class_table);
#undef PMC_CLASS_TABLE_DESC
static const struct pmc_class_descr **pmc_class_table;
#define PMC_CLASS_TABLE_SIZE cpu_info.pm_nclass
static const enum pmc_class *pmc_mdep_class_list;
static size_t pmc_mdep_class_list_size;
@ -370,6 +417,237 @@ k7_allocate_pmc(enum pmc_event pe, char *ctrspec,
#if defined(__amd64__) || defined(__i386__)
/*
* Intel Core (Family 6, Model E) PMCs.
*/
static struct pmc_event_alias core_aliases[] = {
EV_ALIAS("branches", "iap-br-instr-ret"),
EV_ALIAS("branch-mispredicts", "iap-br-mispred-ret"),
EV_ALIAS("cycles", "tsc-tsc"),
EV_ALIAS("ic-misses", "iap-icache-misses"),
EV_ALIAS("instructions", "iap-instr-ret"),
EV_ALIAS("interrupts", "iap-core-hw-int-rx"),
EV_ALIAS("unhalted-cycles", "iap-unhalted-core-cycles"),
EV_ALIAS(NULL, NULL)
};
/*
* Intel Core2 (Family 6, Model F), Core2Extreme (Family 6, Model 17H)
* and Atom (Family 6, model 1CH) PMCs.
*/
static struct pmc_event_alias core2_aliases[] = {
EV_ALIAS("branches", "iap-br-inst-retired.any"),
EV_ALIAS("branch-mispredicts", "iap-br-inst-retired.mispred"),
EV_ALIAS("cycles", "tsc-tsc"),
EV_ALIAS("ic-misses", "iap-l1i-misses"),
EV_ALIAS("instructions", "iaf-instr-retired.any"),
EV_ALIAS("interrupts", "iap-hw-int-rcv"),
EV_ALIAS("unhalted-cycles", "iaf-cpu-clk-unhalted.core"),
EV_ALIAS(NULL, NULL)
};
#define atom_aliases core2_aliases
#define IAF_KW_OS "os"
#define IAF_KW_USR "usr"
#define IAF_KW_ANYTHREAD "anythread"
/*
* Parse an event specifier for Intel fixed function counters.
*/
static int
iaf_allocate_pmc(enum pmc_event pe, char *ctrspec,
struct pmc_op_pmcallocate *pmc_config)
{
char *p;
(void) pe;
pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
pmc_config->pm_md.pm_iaf.pm_iaf_flags = 0;
while ((p = strsep(&ctrspec, ",")) != NULL) {
if (KWMATCH(p, IAF_KW_OS))
pmc_config->pm_caps |= PMC_CAP_SYSTEM;
else if (KWMATCH(p, IAF_KW_USR))
pmc_config->pm_caps |= PMC_CAP_USER;
else if (KWMATCH(p, IAF_KW_ANYTHREAD))
pmc_config->pm_md.pm_iaf.pm_iaf_flags |= IAF_ANY;
else
return (-1);
}
return (0);
}
/*
* Core/Core2 support.
*/
#define IAP_KW_AGENT "agent"
#define IAP_KW_ANYTHREAD "anythread"
#define IAP_KW_CACHESTATE "cachestate"
#define IAP_KW_CMASK "cmask"
#define IAP_KW_CORE "core"
#define IAP_KW_EDGE "edge"
#define IAP_KW_INV "inv"
#define IAP_KW_OS "os"
#define IAP_KW_PREFETCH "prefetch"
#define IAP_KW_SNOOPRESPONSE "snoopresponse"
#define IAP_KW_SNOOPTYPE "snooptype"
#define IAP_KW_TRANSITION "trans"
#define IAP_KW_USR "usr"
static struct pmc_masks iap_core_mask[] = {
PMCMASK(all, (0x3 << 14)),
PMCMASK(this, (0x1 << 14)),
NULLMASK
};
static struct pmc_masks iap_agent_mask[] = {
PMCMASK(this, 0),
PMCMASK(any, (0x1 << 13)),
NULLMASK
};
static struct pmc_masks iap_prefetch_mask[] = {
PMCMASK(both, (0x3 << 12)),
PMCMASK(only, (0x1 << 12)),
PMCMASK(exclude, 0),
NULLMASK
};
static struct pmc_masks iap_cachestate_mask[] = {
PMCMASK(i, (1 << 8)),
PMCMASK(s, (1 << 9)),
PMCMASK(e, (1 << 10)),
PMCMASK(m, (1 << 11)),
NULLMASK
};
static struct pmc_masks iap_snoopresponse_mask[] = {
PMCMASK(clean, (1 << 8)),
PMCMASK(hit, (1 << 9)),
PMCMASK(hitm, (1 << 11)),
NULLMASK
};
static struct pmc_masks iap_snooptype_mask[] = {
PMCMASK(cmp2s, (1 << 8)),
PMCMASK(cmp2i, (1 << 9)),
NULLMASK
};
static struct pmc_masks iap_transition_mask[] = {
PMCMASK(any, 0x00),
PMCMASK(frequency, 0x10),
NULLMASK
};
static int
iap_allocate_pmc(enum pmc_event pe, char *ctrspec,
struct pmc_op_pmcallocate *pmc_config)
{
char *e, *p, *q;
uint32_t cachestate, evmask;
int count, n;
pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE |
PMC_CAP_QUALIFIER);
pmc_config->pm_md.pm_iap.pm_iap_config = 0;
cachestate = evmask = 0;
/* Parse additional modifiers if present */
while ((p = strsep(&ctrspec, ",")) != NULL) {
n = 0;
if (KWPREFIXMATCH(p, IAP_KW_CMASK "=")) {
q = strchr(p, '=');
if (*++q == '\0') /* skip '=' */
return (-1);
count = strtol(q, &e, 0);
if (e == q || *e != '\0')
return (-1);
pmc_config->pm_caps |= PMC_CAP_THRESHOLD;
pmc_config->pm_md.pm_iap.pm_iap_config |=
IAP_CMASK(count);
} else if (KWMATCH(p, IAP_KW_EDGE)) {
pmc_config->pm_caps |= PMC_CAP_EDGE;
} else if (KWMATCH(p, IAP_KW_INV)) {
pmc_config->pm_caps |= PMC_CAP_INVERT;
} else if (KWMATCH(p, IAP_KW_OS)) {
pmc_config->pm_caps |= PMC_CAP_SYSTEM;
} else if (KWMATCH(p, IAP_KW_USR)) {
pmc_config->pm_caps |= PMC_CAP_USER;
} else if (KWMATCH(p, IAP_KW_ANYTHREAD)) {
pmc_config->pm_md.pm_iap.pm_iap_config |= IAP_ANY;
} else if (KWMATCH(p, IAP_KW_CORE)) {
n = pmc_parse_mask(iap_core_mask, p, &evmask);
if (n != 1)
return (-1);
} else if (KWMATCH(p, IAP_KW_AGENT)) {
n = pmc_parse_mask(iap_agent_mask, p, &evmask);
if (n != 1)
return (-1);
} else if (KWMATCH(p, IAP_KW_PREFETCH)) {
n = pmc_parse_mask(iap_prefetch_mask, p, &evmask);
if (n != 1)
return (-1);
} else if (KWMATCH(p, IAP_KW_CACHESTATE)) {
n = pmc_parse_mask(iap_cachestate_mask, p, &cachestate);
} else if (cpu_info.pm_cputype == PMC_CPU_INTEL_CORE &&
KWMATCH(p, IAP_KW_TRANSITION)) {
n = pmc_parse_mask(iap_transition_mask, p, &evmask);
if (n != 1)
return (-1);
} else if (cpu_info.pm_cputype == PMC_CPU_INTEL_ATOM ||
cpu_info.pm_cputype == PMC_CPU_INTEL_CORE2) {
if (KWMATCH(p, IAP_KW_SNOOPRESPONSE)) {
n = pmc_parse_mask(iap_snoopresponse_mask, p,
&evmask);
} else if (KWMATCH(p, IAP_KW_SNOOPTYPE)) {
n = pmc_parse_mask(iap_snooptype_mask, p,
&evmask);
} else
return (-1);
} else
return (-1);
if (n < 0) /* Parsing failed. */
return (-1);
}
pmc_config->pm_md.pm_iap.pm_iap_config |= evmask;
/*
* If the event requires a 'cachestate' qualifier but was not
* specified by the user, use a sensible default.
*/
switch (pe) {
case PMC_EV_IAP_EVENT_28H: /* Core, Core2, Atom */
case PMC_EV_IAP_EVENT_29H: /* Core, Core2, Atom */
case PMC_EV_IAP_EVENT_2AH: /* Core, Core2, Atom */
case PMC_EV_IAP_EVENT_2BH: /* Atom, Core2 */
case PMC_EV_IAP_EVENT_2EH: /* Core, Core2, Atom */
case PMC_EV_IAP_EVENT_30H: /* Core, Core2, Atom */
case PMC_EV_IAP_EVENT_32H: /* Core */
case PMC_EV_IAP_EVENT_40H: /* Core */
case PMC_EV_IAP_EVENT_41H: /* Core */
case PMC_EV_IAP_EVENT_42H: /* Core, Core2, Atom */
case PMC_EV_IAP_EVENT_77H: /* Core */
if (cachestate == 0)
cachestate = (0xF << 8);
default:
break;
}
pmc_config->pm_md.pm_iap.pm_iap_config |= cachestate;
return (0);
}
/*
* AMD K8 PMCs.
*
@ -1704,9 +1982,9 @@ tsc_allocate_pmc(enum pmc_event pe, char *ctrspec,
/*
* Match an event name `name' with its canonical form.
*
* Matches are case insensitive and spaces, underscores and hyphen
* characters are considered to match each other.
*
* Matches are case insensitive and spaces, periods, underscores and
* hyphen characters are considered to match each other.
*
* Returns 1 for a match, 0 otherwise.
*/
@ -1722,13 +2000,14 @@ pmc_match_event_name(const char *name, const char *canonicalname)
for (; (nc = *n) && (cc = *c); n++, c++) {
if (toupper(nc) == cc)
if ((nc == ' ' || nc == '_' || nc == '-' || nc == '.') &&
(cc == ' ' || cc == '_' || cc == '-' || cc == '.'))
continue;
if ((nc == ' ' || nc == '_' || nc == '-') &&
(cc == ' ' || cc == '_' || cc == '-'))
if (toupper(nc) == toupper(cc))
continue;
return (0);
}
@ -1750,7 +2029,7 @@ pmc_match_event_class(const char *name,
{
size_t n;
const struct pmc_event_descr *ev;
ev = pcd->pm_evc_event_table;
for (n = 0; n < pcd->pm_evc_event_table_size; n++, ev++)
if (pmc_match_event_name(name, ev->pm_ev_name))
@ -1815,8 +2094,8 @@ pmc_allocate(const char *ctrspec, enum pmc_mode mode,
* search for the event to the specified PMC class.
*/
ev = NULL;
for (n = 0; n < pmc_event_class_table_size; n++) {
pcd = &pmc_class_table[n];
for (n = 0; n < PMC_CLASS_TABLE_SIZE; n++) {
pcd = pmc_class_table[n];
if (pmc_mdep_is_compatible_class(pcd->pm_evc_class) &&
strncasecmp(ctrname, pcd->pm_evc_name,
pcd->pm_evc_name_size) == 0) {
@ -1833,8 +2112,8 @@ pmc_allocate(const char *ctrspec, enum pmc_mode mode,
* Otherwise, search for this event in all compatible PMC
* classes.
*/
for (n = 0; ev == NULL && n < pmc_event_class_table_size; n++) {
pcd = &pmc_class_table[n];
for (n = 0; ev == NULL && n < PMC_CLASS_TABLE_SIZE; n++) {
pcd = pmc_class_table[n];
if (pmc_mdep_is_compatible_class(pcd->pm_evc_class))
ev = pmc_match_event_class(ctrname, pcd);
}
@ -1974,6 +2253,31 @@ pmc_event_names_of_class(enum pmc_class cl, const char ***eventnames,
switch (cl)
{
case PMC_CLASS_IAF:
ev = iaf_event_table;
count = PMC_EVENT_TABLE_SIZE(iaf);
break;
case PMC_CLASS_IAP:
/*
* Return the most appropriate set of event name
* spellings for the current CPU.
*/
switch (cpu_info.pm_cputype) {
default:
case PMC_CPU_INTEL_ATOM:
ev = atom_event_table;
count = PMC_EVENT_TABLE_SIZE(atom);
break;
case PMC_CPU_INTEL_CORE:
ev = core_event_table;
count = PMC_EVENT_TABLE_SIZE(core);
break;
case PMC_CPU_INTEL_CORE2:
ev = core2_event_table;
count = PMC_EVENT_TABLE_SIZE(core2);
break;
}
break;
case PMC_CLASS_TSC:
ev = tsc_event_table;
count = PMC_EVENT_TABLE_SIZE(tsc);
@ -2095,6 +2399,21 @@ pmc_init(void)
for (n = 0; n < cpu_info.pm_nclass; n++)
cpu_info.pm_classes[n] = op_cpu_info.pm_classes[n];
pmc_class_table = malloc(PMC_CLASS_TABLE_SIZE *
sizeof(struct pmc_class_descr *));
if (pmc_class_table == NULL)
return (-1);
/*
* Fill in the class table.
*/
n = 0;
#if defined(__amd64__) || defined(__i386__)
pmc_class_table[n++] = &tsc_class_table_descr;
#endif
#define PMC_MDEP_INIT(C) do { \
pmc_mdep_event_aliases = C##_aliases; \
pmc_mdep_class_list = C##_pmc_classes; \
@ -2107,26 +2426,46 @@ pmc_init(void)
#if defined(__i386__)
case PMC_CPU_AMD_K7:
PMC_MDEP_INIT(k7);
pmc_class_table[n] = &k7_class_table_descr;
break;
case PMC_CPU_INTEL_P5:
PMC_MDEP_INIT(p5);
pmc_class_table[n] = &p5_class_table_descr;
break;
case PMC_CPU_INTEL_P6: /* P6 ... Pentium M CPUs have */
case PMC_CPU_INTEL_PII: /* similar PMCs. */
case PMC_CPU_INTEL_PIII:
case PMC_CPU_INTEL_PM:
PMC_MDEP_INIT(p6);
pmc_class_table[n] = &p6_class_table_descr;
break;
#endif
#if defined(__amd64__) || defined(__i386__)
case PMC_CPU_AMD_K8:
PMC_MDEP_INIT(k8);
pmc_class_table[n] = &k8_class_table_descr;
break;
case PMC_CPU_INTEL_ATOM:
PMC_MDEP_INIT(atom);
pmc_class_table[n++] = &iaf_class_table_descr;
pmc_class_table[n] = &atom_class_table_descr;
break;
case PMC_CPU_INTEL_CORE:
PMC_MDEP_INIT(core);
pmc_class_table[n] = &core_class_table_descr;
break;
case PMC_CPU_INTEL_CORE2:
PMC_MDEP_INIT(core2);
pmc_class_table[n++] = &iaf_class_table_descr;
pmc_class_table[n] = &core2_class_table_descr;
break;
case PMC_CPU_INTEL_PIV:
PMC_MDEP_INIT(p4);
pmc_class_table[n] = &p4_class_table_descr;
break;
#endif
default:
/*
* Some kind of CPU this version of the library knows nothing
@ -2195,12 +2534,32 @@ pmc_name_of_disposition(enum pmc_disp pd)
}
const char *
pmc_name_of_event(enum pmc_event pe)
_pmc_name_of_event(enum pmc_event pe, enum pmc_cputype cpu)
{
const struct pmc_event_descr *ev, *evfence;
ev = evfence = NULL;
if (pe >= PMC_EV_K7_FIRST && pe <= PMC_EV_K7_LAST) {
if (pe >= PMC_EV_IAF_FIRST && pe <= PMC_EV_IAF_LAST) {
ev = iaf_event_table;
evfence = iaf_event_table + PMC_EVENT_TABLE_SIZE(iaf);
} else if (pe >= PMC_EV_IAP_FIRST && pe <= PMC_EV_IAP_LAST) {
switch (cpu) {
case PMC_CPU_INTEL_ATOM:
ev = atom_event_table;
evfence = atom_event_table + PMC_EVENT_TABLE_SIZE(atom);
break;
case PMC_CPU_INTEL_CORE:
ev = core_event_table;
evfence = core_event_table + PMC_EVENT_TABLE_SIZE(core);
break;
case PMC_CPU_INTEL_CORE2:
ev = core2_event_table;
evfence = core2_event_table + PMC_EVENT_TABLE_SIZE(core2);
break;
default: /* Unknown CPU type. */
break;
}
} if (pe >= PMC_EV_K7_FIRST && pe <= PMC_EV_K7_LAST) {
ev = k7_event_table;
evfence = k7_event_table + PMC_EVENT_TABLE_SIZE(k7);
} else if (pe >= PMC_EV_K8_FIRST && pe <= PMC_EV_K8_LAST) {
@ -2224,6 +2583,17 @@ pmc_name_of_event(enum pmc_event pe)
if (pe == ev->pm_ev_code)
return (ev->pm_ev_name);
return (NULL);
}
const char *
pmc_name_of_event(enum pmc_event pe)
{
const char *n;
if ((n = _pmc_name_of_event(pe, cpu_info.pm_cputype)) != NULL)
return (n);
errno = EINVAL;
return (NULL);
}

View File

@ -0,0 +1,37 @@
/*-
* Copyright (c) 2008 Joseph Koshy
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef LIBPMC_INTERNAL_H
#define LIBPMC_INTERNAL_H 1
/*
* Prototypes.
*/
const char *_pmc_name_of_event(enum pmc_event _ev, enum pmc_cputype _cpu);
#endif /* LIBPMC_INTERNAL_H */

View File

@ -47,6 +47,8 @@ __FBSDID("$FreeBSD$");
#include <machine/pmc_mdep.h>
#include "libpmcinternal.h"
#define PMCLOG_BUFFER_SIZE 4096
/*
@ -363,7 +365,8 @@ pmclog_get_event(void *cookie, char **data, ssize_t *len,
PMCLOG_READ32(le,ev->pl_u.pl_a.pl_event);
PMCLOG_READ32(le,ev->pl_u.pl_a.pl_flags);
if ((ev->pl_u.pl_a.pl_evname =
pmc_name_of_event(ev->pl_u.pl_a.pl_event)) == NULL)
_pmc_name_of_event(ev->pl_u.pl_a.pl_event, ps->ps_arch))
== NULL)
goto error;
break;
case PMCLOG_TYPE_PMCATTACH:

View File

@ -40,6 +40,7 @@ struct pmc_mdep;
#endif
#include <dev/hwpmc/hwpmc_amd.h>
#include <dev/hwpmc/hwpmc_core.h>
#include <dev/hwpmc/hwpmc_piv.h>
#include <dev/hwpmc/hwpmc_tsc.h>
@ -51,8 +52,8 @@ struct pmc_mdep;
#define PMC_MDEP_CLASS_INDEX_TSC 0
#define PMC_MDEP_CLASS_INDEX_K8 1
#define PMC_MDEP_CLASS_INDEX_P4 1
#define PMC_MDEP_CLASS_INDEX_IAF 1
#define PMC_MDEP_CLASS_INDEX_IAP 2
#define PMC_MDEP_CLASS_INDEX_IAP 1
#define PMC_MDEP_CLASS_INDEX_IAF 2
/*
* On the amd64 platform we support the following PMCs.
@ -66,6 +67,8 @@ struct pmc_mdep;
union pmc_md_op_pmcallocate {
struct pmc_md_amd_op_pmcallocate pm_amd;
struct pmc_md_iaf_op_pmcallocate pm_iaf;
struct pmc_md_iap_op_pmcallocate pm_iap;
struct pmc_md_p4_op_pmcallocate pm_p4;
uint64_t __pad[4];
};
@ -78,6 +81,8 @@ union pmc_md_op_pmcallocate {
union pmc_md_pmc {
struct pmc_md_amd_pmc pm_amd;
struct pmc_md_iaf_pmc pm_iaf;
struct pmc_md_iap_pmc pm_iap;
struct pmc_md_p4_pmc pm_p4;
};

View File

@ -189,6 +189,7 @@ dev/hptrr/hptrr_osm_bsd.c optional hptrr
dev/hptrr/hptrr_config.c optional hptrr
dev/hwpmc/hwpmc_amd.c optional hwpmc
dev/hwpmc/hwpmc_intel.c optional hwpmc
dev/hwpmc/hwpmc_core.c optional hwpmc
dev/hwpmc/hwpmc_piv.c optional hwpmc
dev/hwpmc/hwpmc_tsc.c optional hwpmc
dev/hwpmc/hwpmc_x86.c optional hwpmc

View File

@ -187,6 +187,7 @@ dev/hptrr/hptrr_osm_bsd.c optional hptrr
dev/hptrr/hptrr_config.c optional hptrr
dev/hwpmc/hwpmc_amd.c optional hwpmc
dev/hwpmc/hwpmc_intel.c optional hwpmc
dev/hwpmc/hwpmc_core.c optional hwpmc
dev/hwpmc/hwpmc_pentium.c optional hwpmc
dev/hwpmc/hwpmc_piv.c optional hwpmc
dev/hwpmc/hwpmc_ppro.c optional hwpmc

1747
sys/dev/hwpmc/hwpmc_core.c Normal file

File diff suppressed because it is too large Load Diff

121
sys/dev/hwpmc/hwpmc_core.h Normal file
View File

@ -0,0 +1,121 @@
/*-
* Copyright (c) 2008 Joseph Koshy
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _DEV_HWPMC_CORE_H_
#define _DEV_HWPMC_CORE_H_ 1
/*
* Fixed-function PMCs.
*/
struct pmc_md_iaf_op_pmcallocate {
uint16_t pm_iaf_flags; /* additional flags */
};
#define IAF_OS 0x1
#define IAF_USR 0x2
#define IAF_ANY 0x4
#define IAF_PMI 0x8
/*
* Programmable PMCs.
*/
struct pmc_md_iap_op_pmcallocate {
uint32_t pm_iap_config;
};
#define IAP_EVSEL(C) ((C) & 0xFF)
#define IAP_UMASK(C) ((C) & 0xFF00)
#define IAP_USR (1 << 16)
#define IAP_OS (1 << 17)
#define IAP_EDGE (1 << 18)
#define IAP_INT (1 << 20)
#define IAP_ANY (1 << 21)
#define IAP_EN (1 << 22)
#define IAP_INV (1 << 23)
#define IAP_CMASK(C) (((C) & 0xFF) << 24)
#ifdef _KERNEL
/*
* Fixed-function counters.
*/
#define IAF_MASK 0xF
#define IAF_CTR0 0x309
#define IAF_CTR1 0x30A
#define IAF_CTR2 0x30B
#define IAF_OFFSET 32
#define IAF_CTRL 0x38D
/*
* Programmable counters.
*/
#define IAP_PMC0 0x0C1
#define IAP_PMC1 0x0C2
#define IAP_EVSEL0 0x186
#define IAP_EVSEL1 0x187
/*
* Simplified programming interface in Intel Performance Architecture
* v2 and later.
*/
#define IA_GLOBAL_STATUS 0x38E
#define IA_GLOBAL_CTRL 0x38F
#define IA_GLOBAL_OVF_CTRL 0x390
#define IA_GLOBAL_STATUS_FLAG_CONDCHG (1ULL << 63)
#define IA_GLOBAL_STATUS_FLAG_OVFBUF (1ULL << 62)
struct pmc_md_iaf_pmc {
uint64_t pm_iaf_ctrl;
};
struct pmc_md_iap_pmc {
uint32_t pm_iap_evsel;
};
/*
* Prototypes.
*/
int pmc_core_initialize(struct pmc_mdep *_md, int _maxcpu);
void pmc_core_finalize(struct pmc_mdep *_md);
void pmc_core_mark_started(int _cpu, int _pmc);
int pmc_iaf_initialize(struct pmc_mdep *_md, int _maxcpu, int _npmc, int _width);
void pmc_iaf_finalize(struct pmc_mdep *_md);
int pmc_iap_initialize(struct pmc_mdep *_md, int _maxcpu, int _npmc, int _width,
int _flags);
void pmc_iap_finalize(struct pmc_mdep *_md);
#endif /* _KERNEL */
#endif /* _DEV_HWPMC_CORE_H */

View File

@ -88,20 +88,24 @@ pmc_intel_initialize(void)
cputype = -1;
nclasses = 2;
model = ((cpu_id & 0xF0000) >> 12) | ((cpu_id & 0xF0) >> 4);
switch (cpu_id & 0xF00) {
#if defined(__i386__)
case 0x500: /* Pentium family processors */
cputype = PMC_CPU_INTEL_P5;
break;
#endif
case 0x600: /* Pentium Pro, Celeron, Pentium II & III */
switch ((cpu_id & 0xF0) >> 4) { /* model number field */
switch (model) {
#if defined(__i386__)
case 0x1:
cputype = PMC_CPU_INTEL_P6;
break;
case 0x3: case 0x5:
cputype = PMC_CPU_INTEL_PII;
break;
case 0x6:
case 0x6: case 0x16:
cputype = PMC_CPU_INTEL_CL;
break;
case 0x7: case 0x8: case 0xA: case 0xB:
@ -110,12 +114,26 @@ pmc_intel_initialize(void)
case 0x9: case 0xD:
cputype = PMC_CPU_INTEL_PM;
break;
#endif
case 0xE:
cputype = PMC_CPU_INTEL_CORE;
break;
case 0xF:
cputype = PMC_CPU_INTEL_CORE2;
nclasses = 3;
break;
case 0x17:
cputype = PMC_CPU_INTEL_CORE2EXTREME;
nclasses = 3;
break;
case 0x1C: /* Per Intel document 320047-002. */
cputype = PMC_CPU_INTEL_ATOM;
nclasses = 3;
break;
}
break;
#endif
#if defined(__i386__) || defined(__amd64__)
case 0xF00: /* P4 */
model = ((cpu_id & 0xF0000) >> 12) | ((cpu_id & 0xF0) >> 4);
if (model >= 0 && model <= 6) /* known models */
cputype = PMC_CPU_INTEL_PIV;
break;
@ -144,6 +162,14 @@ pmc_intel_initialize(void)
switch (cputype) {
#if defined(__i386__) || defined(__amd64__)
/*
* Intel Core, Core 2 and Atom processors.
*/
case PMC_CPU_INTEL_ATOM:
case PMC_CPU_INTEL_CORE:
case PMC_CPU_INTEL_CORE2:
error = pmc_core_initialize(pmc_mdep, ncpus);
break;
/*
* Intel Pentium 4 Processors, and P4/EMT64 processors.
@ -184,7 +210,7 @@ pmc_intel_initialize(void)
KASSERT(pmc_mdep->pmd_npmc == TSC_NPMCS + PENTIUM_NPMCS,
("[intel,%d] incorrect npmc count %d", __LINE__,
md->pmd_npmc));
pmc_mdep->pmd_npmc));
break;
#endif
@ -209,6 +235,12 @@ pmc_intel_finalize(struct pmc_mdep *md)
switch (md->pmd_cputype) {
#if defined(__i386__) || defined(__amd64__)
case PMC_CPU_INTEL_ATOM:
case PMC_CPU_INTEL_CORE:
case PMC_CPU_INTEL_CORE2:
pmc_core_finalize(md);
break;
case PMC_CPU_INTEL_PIV:
pmc_p4_finalize(md);
break;

View File

@ -287,8 +287,9 @@ pmclog_loop(void *arg)
wakeup_one(po->po_kthread);
}
(void) msleep(po, &pmc_kthread_mtx, PWAIT,
"pmcloop", 0);
(void) msleep(po, &pmc_kthread_mtx,
PWAIT, "pmcloop", 0);
continue;
}
@ -543,7 +544,7 @@ pmclog_stop_kthread(struct pmc_owner *po)
*/
int
pmclog_configure_log(struct pmc_owner *po, int logfd)
pmclog_configure_log(struct pmc_mdep *md, struct pmc_owner *po, int logfd)
{
int error;
struct proc *p;

View File

@ -128,7 +128,7 @@ static eventhandler_tag pmc_exit_tag, pmc_fork_tag;
struct pmc_op_getdriverstats pmc_stats;
/* Machine/processor dependent operations */
struct pmc_mdep *md;
static struct pmc_mdep *md;
/*
* Hash tables mapping owner processes and target threads to PMCs.
@ -2718,7 +2718,7 @@ pmc_syscall_handler(struct thread *td, void *syscall_args)
* de-configure it.
*/
if (cl.pm_logfd >= 0)
error = pmclog_configure_log(po, cl.pm_logfd);
error = pmclog_configure_log(md, po, cl.pm_logfd);
else if (po->po_flags & PMC_PO_OWNS_LOGFILE) {
pmclog_process_closelog(po);
error = pmclog_flush(po);
@ -3966,7 +3966,7 @@ static void
pmc_process_samples(int cpu)
{
struct pmc *pm;
int adjri, n, ri;
int adjri, n;
struct thread *td;
struct pmc_owner *po;
struct pmc_sample *ps;
@ -4066,7 +4066,6 @@ pmc_process_samples(int cpu)
continue;
pm->pm_stalled = 0;
ri = PMC_TO_ROWINDEX(pm);
(*pcd->pcd_start_pmc)(cpu, adjri);
}
}
@ -4458,7 +4457,7 @@ pmc_initialize(void)
md->pmd_npmc * sizeof(struct pmc_hw *), M_PMC,
M_WAITOK|M_ZERO);
if (md->pmd_pcpu_init)
error = md->pmd_pcpu_init(cpu);
error = md->pmd_pcpu_init(md, cpu);
for (n = 0; error == 0 && n < md->pmd_nclass; n++)
error = md->pmd_classdep[n].pcd_pcpu_init(md, cpu);
}
@ -4655,7 +4654,7 @@ pmc_cleanup(void)
for (c = 0; c < md->pmd_nclass; c++)
md->pmd_classdep[c].pcd_pcpu_fini(md, cpu);
if (md->pmd_pcpu_fini)
md->pmd_pcpu_fini(cpu);
md->pmd_pcpu_fini(md, cpu);
}
pmc_md_finalize(md);

View File

@ -32,7 +32,7 @@
/*
* PMC event codes.
*
* __PMC_EV(CLASS, SYMBOLIC-NAME, VALUE, READABLE-NAME)
* __PMC_EV(CLASS, SYMBOLIC-NAME)
*
*/
@ -69,6 +69,7 @@ __PMC_EV(K7, HARDWARE_INTERRUPTS)
#define PMC_EV_K7_FIRST PMC_EV_K7_DC_ACCESSES
#define PMC_EV_K7_LAST PMC_EV_K7_HARDWARE_INTERRUPTS
/*
* Intel P4 Events, from "IA-32 Intel(r) Architecture Software
* Developer's Manual, Volume 3: System Programming Guide" [245472-012]
@ -327,9 +328,9 @@ __PMC_EV(K8, NB_HT_BUS2_BANDWIDTH)
/*
* Intel Pentium and Pentium MMX Events, from the "Intel 64 and IA-32
* Intel(R) Architectures Software Developer's Manual, Volume 3B:
* System Programming Guide, Part 2, August 2007".
* Intel Pentium and Pentium MMX events, from the "Intel 64 and IA-32
* Architectures Software Developer's Manual, Volume 3B: System Programming
* Guide, Part 2, August 2007".
*/
#define __PMC_EV_P5() \
__PMC_EV(P5, DATA_READ) \
@ -412,8 +413,965 @@ __PMC_EV(P5, STALL_ON_MMX_INSTRUCTION_WRITE_TO_E_OR_M_STATE_LINE)
#define PMC_EV_P5_LAST \
PMC_EV_P5_STALL_ON_MMX_INSTRUCTION_WRITE_TO_E_OR_M_STATE_LINE
#define __PMC_EV_IAF() /* Intel architectural fixed function */
#define __PMC_EV_IAP() /* Intel architectural programmable */
/*
* Events supported by Intel architectural fixed function counters,
* from the "Intel 64 and IA-32 Architectures Software Developer's
* Manual Volume 3B: System Programming Guide, Part 2", July 2008.
*/
#define __PMC_EV_IAF() \
__PMC_EV(IAF, INSTR_RETIRED_ANY) \
__PMC_EV(IAF, CPU_CLK_UNHALTED_CORE) \
__PMC_EV(IAF, CPU_CLK_UNHALTED_REF)
#define PMC_EV_IAF_FIRST PMC_EV_IAF_INSTR_RETIRED_ANY
#define PMC_EV_IAF_LAST PMC_EV_IAF_CPU_CLK_UNHALTED_REF
/*
* Events supported by programmable function counters present in
* Intel Atom, Core and Core2 CPUs, from the "Intel 64 and IA-32
* Architectures Software Developer's Manual Volume 3B: System Programming
* Guide, Part 2", July 2008.
*
* These PMCs select events with a combination of an event code and
* unit mask. Quirks that need to be taken care of include:
* - The set of (event code, umask) combinations supported by a processor
* varies according to the processor model.
* - A given (event code, umask) combination need not measure the same
* hardware event in all processor models.
* - Event names in vendor documentation for an (event code, umask) pair
* may vary according to the CPU model.
* - Identically named events can map to different (event code, umask)
* pairs on different CPUs.
* - New (event code, umask) combinations continue to be added as CPUs
* evolve. The interface between hwpmc(4) and libpmc(3) needs to be
* robust with respect to ABI changes.
*
* The IAP_EVENT_* symbols below define the ABI between userland and kernel.
* New (event code, * umask) combinations used in new CPUs would be added
* to the end of the list. Vendor names for events are mapped to IAP_EVENT_*
* symbols using aliases. The final disambiguation of semantics based on
* the CPU model happens inside hwpmc(4).
*/
#define __PMC_EV_IAP() \
__PMC_EV(IAP, EVENT_02H_81H) \
__PMC_EV(IAP, EVENT_03H_00H) \
__PMC_EV(IAP, EVENT_03H_02H) \
__PMC_EV(IAP, EVENT_03H_04H) \
__PMC_EV(IAP, EVENT_03H_08H) \
__PMC_EV(IAP, EVENT_03H_10H) \
__PMC_EV(IAP, EVENT_03H_20H) \
__PMC_EV(IAP, EVENT_04H_00H) \
__PMC_EV(IAP, EVENT_04H_01H) \
__PMC_EV(IAP, EVENT_04H_02H) \
__PMC_EV(IAP, EVENT_04H_08H) \
__PMC_EV(IAP, EVENT_05H_00H) \
__PMC_EV(IAP, EVENT_06H_00H) \
__PMC_EV(IAP, EVENT_07H_00H) \
__PMC_EV(IAP, EVENT_07H_01H) \
__PMC_EV(IAP, EVENT_07H_02H) \
__PMC_EV(IAP, EVENT_07H_03H) \
__PMC_EV(IAP, EVENT_07H_06H) \
__PMC_EV(IAP, EVENT_07H_08H) \
__PMC_EV(IAP, EVENT_08H_01H) \
__PMC_EV(IAP, EVENT_08H_02H) \
__PMC_EV(IAP, EVENT_08H_04H) \
__PMC_EV(IAP, EVENT_08H_05H) \
__PMC_EV(IAP, EVENT_08H_06H) \
__PMC_EV(IAP, EVENT_08H_07H) \
__PMC_EV(IAP, EVENT_08H_08H) \
__PMC_EV(IAP, EVENT_08H_09H) \
__PMC_EV(IAP, EVENT_09H_01H) \
__PMC_EV(IAP, EVENT_09H_02H) \
__PMC_EV(IAP, EVENT_0CH_01H) \
__PMC_EV(IAP, EVENT_0CH_02H) \
__PMC_EV(IAP, EVENT_0CH_03H) \
__PMC_EV(IAP, EVENT_10H_00H) \
__PMC_EV(IAP, EVENT_10H_01H) \
__PMC_EV(IAP, EVENT_10H_81H) \
__PMC_EV(IAP, EVENT_11H_00H) \
__PMC_EV(IAP, EVENT_11H_01H) \
__PMC_EV(IAP, EVENT_11H_81H) \
__PMC_EV(IAP, EVENT_12H_00H) \
__PMC_EV(IAP, EVENT_12H_01H) \
__PMC_EV(IAP, EVENT_12H_81H) \
__PMC_EV(IAP, EVENT_13H_00H) \
__PMC_EV(IAP, EVENT_13H_01H) \
__PMC_EV(IAP, EVENT_13H_81H) \
__PMC_EV(IAP, EVENT_14H_00H) \
__PMC_EV(IAP, EVENT_14H_01H) \
__PMC_EV(IAP, EVENT_18H_00H) \
__PMC_EV(IAP, EVENT_19H_00H) \
__PMC_EV(IAP, EVENT_19H_01H) \
__PMC_EV(IAP, EVENT_19H_02H) \
__PMC_EV(IAP, EVENT_21H) \
__PMC_EV(IAP, EVENT_22H) \
__PMC_EV(IAP, EVENT_23H) \
__PMC_EV(IAP, EVENT_24H) \
__PMC_EV(IAP, EVENT_25H) \
__PMC_EV(IAP, EVENT_26H) \
__PMC_EV(IAP, EVENT_27H) \
__PMC_EV(IAP, EVENT_28H) \
__PMC_EV(IAP, EVENT_29H) \
__PMC_EV(IAP, EVENT_2AH) \
__PMC_EV(IAP, EVENT_2BH) \
__PMC_EV(IAP, EVENT_2EH) \
__PMC_EV(IAP, EVENT_2EH_41H) \
__PMC_EV(IAP, EVENT_2EH_4FH) \
__PMC_EV(IAP, EVENT_30H) \
__PMC_EV(IAP, EVENT_32H) \
__PMC_EV(IAP, EVENT_3AH) \
__PMC_EV(IAP, EVENT_3AH_00H) \
__PMC_EV(IAP, EVENT_3BH_C0H) \
__PMC_EV(IAP, EVENT_3CH_00H) \
__PMC_EV(IAP, EVENT_3CH_01H) \
__PMC_EV(IAP, EVENT_3CH_02H) \
__PMC_EV(IAP, EVENT_40H) \
__PMC_EV(IAP, EVENT_40H_21H) \
__PMC_EV(IAP, EVENT_41H) \
__PMC_EV(IAP, EVENT_41H_22H) \
__PMC_EV(IAP, EVENT_42H) \
__PMC_EV(IAP, EVENT_42H_10H) \
__PMC_EV(IAP, EVENT_43H_01H) \
__PMC_EV(IAP, EVENT_43H_02H) \
__PMC_EV(IAP, EVENT_44H_02H) \
__PMC_EV(IAP, EVENT_45H_0FH) \
__PMC_EV(IAP, EVENT_46H_00H) \
__PMC_EV(IAP, EVENT_47H_00H) \
__PMC_EV(IAP, EVENT_48H_00H) \
__PMC_EV(IAP, EVENT_49H_00H) \
__PMC_EV(IAP, EVENT_49H_01H) \
__PMC_EV(IAP, EVENT_49H_02H) \
__PMC_EV(IAP, EVENT_4BH_00H) \
__PMC_EV(IAP, EVENT_4BH_01H) \
__PMC_EV(IAP, EVENT_4BH_02H) \
__PMC_EV(IAP, EVENT_4BH_03H) \
__PMC_EV(IAP, EVENT_4CH_00H) \
__PMC_EV(IAP, EVENT_4EH_10H) \
__PMC_EV(IAP, EVENT_4FH_00H) \
__PMC_EV(IAP, EVENT_60H) \
__PMC_EV(IAP, EVENT_61H) \
__PMC_EV(IAP, EVENT_61H_00H) \
__PMC_EV(IAP, EVENT_62H) \
__PMC_EV(IAP, EVENT_62H_00H) \
__PMC_EV(IAP, EVENT_63H) \
__PMC_EV(IAP, EVENT_64H) \
__PMC_EV(IAP, EVENT_64H_40H) \
__PMC_EV(IAP, EVENT_65H) \
__PMC_EV(IAP, EVENT_66H) \
__PMC_EV(IAP, EVENT_67H) \
__PMC_EV(IAP, EVENT_68H) \
__PMC_EV(IAP, EVENT_69H) \
__PMC_EV(IAP, EVENT_6AH) \
__PMC_EV(IAP, EVENT_6BH) \
__PMC_EV(IAP, EVENT_6CH) \
__PMC_EV(IAP, EVENT_6DH) \
__PMC_EV(IAP, EVENT_6EH) \
__PMC_EV(IAP, EVENT_6FH) \
__PMC_EV(IAP, EVENT_70H) \
__PMC_EV(IAP, EVENT_77H) \
__PMC_EV(IAP, EVENT_78H) \
__PMC_EV(IAP, EVENT_7AH) \
__PMC_EV(IAP, EVENT_7BH) \
__PMC_EV(IAP, EVENT_7DH) \
__PMC_EV(IAP, EVENT_7EH) \
__PMC_EV(IAP, EVENT_7EH_00H) \
__PMC_EV(IAP, EVENT_7FH) \
__PMC_EV(IAP, EVENT_80H_00H) \
__PMC_EV(IAP, EVENT_80H_02H) \
__PMC_EV(IAP, EVENT_80H_03H) \
__PMC_EV(IAP, EVENT_81H_00H) \
__PMC_EV(IAP, EVENT_82H_02H) \
__PMC_EV(IAP, EVENT_82H_04H) \
__PMC_EV(IAP, EVENT_82H_10H) \
__PMC_EV(IAP, EVENT_82H_12H) \
__PMC_EV(IAP, EVENT_82H_40H) \
__PMC_EV(IAP, EVENT_83H_02H) \
__PMC_EV(IAP, EVENT_85H_00H) \
__PMC_EV(IAP, EVENT_86H_00H) \
__PMC_EV(IAP, EVENT_87H_00H) \
__PMC_EV(IAP, EVENT_88H_00H) \
__PMC_EV(IAP, EVENT_89H_00H) \
__PMC_EV(IAP, EVENT_8AH_00H) \
__PMC_EV(IAP, EVENT_8BH_00H) \
__PMC_EV(IAP, EVENT_8CH_00H) \
__PMC_EV(IAP, EVENT_8DH_00H) \
__PMC_EV(IAP, EVENT_8EH_00H) \
__PMC_EV(IAP, EVENT_8FH_00H) \
__PMC_EV(IAP, EVENT_90H_00H) \
__PMC_EV(IAP, EVENT_91H_00H) \
__PMC_EV(IAP, EVENT_92H_00H) \
__PMC_EV(IAP, EVENT_93H_00H) \
__PMC_EV(IAP, EVENT_94H_00H) \
__PMC_EV(IAP, EVENT_97H_00H) \
__PMC_EV(IAP, EVENT_98H_00H) \
__PMC_EV(IAP, EVENT_A0H_00H) \
__PMC_EV(IAP, EVENT_A1H_01H) \
__PMC_EV(IAP, EVENT_A1H_02H) \
__PMC_EV(IAP, EVENT_A1H_04H) \
__PMC_EV(IAP, EVENT_A1H_08H) \
__PMC_EV(IAP, EVENT_A1H_10H) \
__PMC_EV(IAP, EVENT_A1H_20H) \
__PMC_EV(IAP, EVENT_A2H_00H) \
__PMC_EV(IAP, EVENT_AAH_01H) \
__PMC_EV(IAP, EVENT_AAH_02H) \
__PMC_EV(IAP, EVENT_AAH_03H) \
__PMC_EV(IAP, EVENT_AAH_08H) \
__PMC_EV(IAP, EVENT_ABH_01H) \
__PMC_EV(IAP, EVENT_ABH_02H) \
__PMC_EV(IAP, EVENT_B0H_00H) \
__PMC_EV(IAP, EVENT_B0H_80H) \
__PMC_EV(IAP, EVENT_B1H_00H) \
__PMC_EV(IAP, EVENT_B1H_80H) \
__PMC_EV(IAP, EVENT_B3H_01H) \
__PMC_EV(IAP, EVENT_B3H_02H) \
__PMC_EV(IAP, EVENT_B3H_04H) \
__PMC_EV(IAP, EVENT_B3H_08H) \
__PMC_EV(IAP, EVENT_B3H_10H) \
__PMC_EV(IAP, EVENT_B3H_20H) \
__PMC_EV(IAP, EVENT_B3H_81H) \
__PMC_EV(IAP, EVENT_B3H_82H) \
__PMC_EV(IAP, EVENT_B3H_84H) \
__PMC_EV(IAP, EVENT_B3H_88H) \
__PMC_EV(IAP, EVENT_B3H_90H) \
__PMC_EV(IAP, EVENT_B3H_A0H) \
__PMC_EV(IAP, EVENT_C0H_00H) \
__PMC_EV(IAP, EVENT_C0H_01H) \
__PMC_EV(IAP, EVENT_C0H_02H) \
__PMC_EV(IAP, EVENT_C0H_04H) \
__PMC_EV(IAP, EVENT_C0H_08H) \
__PMC_EV(IAP, EVENT_C1H_00H) \
__PMC_EV(IAP, EVENT_C1H_01H) \
__PMC_EV(IAP, EVENT_C1H_FEH) \
__PMC_EV(IAP, EVENT_C2H_00H) \
__PMC_EV(IAP, EVENT_C2H_01H) \
__PMC_EV(IAP, EVENT_C2H_02H) \
__PMC_EV(IAP, EVENT_C2H_04H) \
__PMC_EV(IAP, EVENT_C2H_07H) \
__PMC_EV(IAP, EVENT_C2H_0FH) \
__PMC_EV(IAP, EVENT_C2H_10H) \
__PMC_EV(IAP, EVENT_C2H_08H) \
__PMC_EV(IAP, EVENT_C3H_00H) \
__PMC_EV(IAP, EVENT_C3H_01H) \
__PMC_EV(IAP, EVENT_C3H_04H) \
__PMC_EV(IAP, EVENT_C4H_00H) \
__PMC_EV(IAP, EVENT_C4H_01H) \
__PMC_EV(IAP, EVENT_C4H_02H) \
__PMC_EV(IAP, EVENT_C4H_04H) \
__PMC_EV(IAP, EVENT_C4H_08H) \
__PMC_EV(IAP, EVENT_C4H_0CH) \
__PMC_EV(IAP, EVENT_C4H_0FH) \
__PMC_EV(IAP, EVENT_C5H_00H) \
__PMC_EV(IAP, EVENT_C6H_00H) \
__PMC_EV(IAP, EVENT_C6H_01H) \
__PMC_EV(IAP, EVENT_C6H_02H) \
__PMC_EV(IAP, EVENT_C7H_00H) \
__PMC_EV(IAP, EVENT_C7H_01H) \
__PMC_EV(IAP, EVENT_C7H_02H) \
__PMC_EV(IAP, EVENT_C7H_04H) \
__PMC_EV(IAP, EVENT_C7H_08H) \
__PMC_EV(IAP, EVENT_C7H_10H) \
__PMC_EV(IAP, EVENT_C7H_1FH) \
__PMC_EV(IAP, EVENT_C8H_00H) \
__PMC_EV(IAP, EVENT_C9H_00H) \
__PMC_EV(IAP, EVENT_CAH_00H) \
__PMC_EV(IAP, EVENT_CAH_01H) \
__PMC_EV(IAP, EVENT_CAH_02H) \
__PMC_EV(IAP, EVENT_CAH_04H) \
__PMC_EV(IAP, EVENT_CAH_08H) \
__PMC_EV(IAP, EVENT_CBH_01H) \
__PMC_EV(IAP, EVENT_CBH_02H) \
__PMC_EV(IAP, EVENT_CBH_04H) \
__PMC_EV(IAP, EVENT_CBH_08H) \
__PMC_EV(IAP, EVENT_CBH_10H) \
__PMC_EV(IAP, EVENT_CCH_00H) \
__PMC_EV(IAP, EVENT_CCH_01H) \
__PMC_EV(IAP, EVENT_CCH_02H) \
__PMC_EV(IAP, EVENT_CDH_00H) \
__PMC_EV(IAP, EVENT_CEH_00H) \
__PMC_EV(IAP, EVENT_CFH_00H) \
__PMC_EV(IAP, EVENT_D0H_00H) \
__PMC_EV(IAP, EVENT_D2H_01H) \
__PMC_EV(IAP, EVENT_D2H_02H) \
__PMC_EV(IAP, EVENT_D2H_04H) \
__PMC_EV(IAP, EVENT_D2H_08H) \
__PMC_EV(IAP, EVENT_D2H_0FH) \
__PMC_EV(IAP, EVENT_D2H_10H) \
__PMC_EV(IAP, EVENT_D4H_01H) \
__PMC_EV(IAP, EVENT_D4H_02H) \
__PMC_EV(IAP, EVENT_D4H_04H) \
__PMC_EV(IAP, EVENT_D4H_08H) \
__PMC_EV(IAP, EVENT_D4H_0FH) \
__PMC_EV(IAP, EVENT_D5H_01H) \
__PMC_EV(IAP, EVENT_D5H_02H) \
__PMC_EV(IAP, EVENT_D5H_04H) \
__PMC_EV(IAP, EVENT_D5H_08H) \
__PMC_EV(IAP, EVENT_D5H_0FH) \
__PMC_EV(IAP, EVENT_D7H_00H) \
__PMC_EV(IAP, EVENT_D8H_00H) \
__PMC_EV(IAP, EVENT_D8H_01H) \
__PMC_EV(IAP, EVENT_D8H_02H) \
__PMC_EV(IAP, EVENT_D8H_03H) \
__PMC_EV(IAP, EVENT_D8H_04H) \
__PMC_EV(IAP, EVENT_D9H_00H) \
__PMC_EV(IAP, EVENT_D9H_01H) \
__PMC_EV(IAP, EVENT_D9H_02H) \
__PMC_EV(IAP, EVENT_D9H_03H) \
__PMC_EV(IAP, EVENT_DAH_00H) \
__PMC_EV(IAP, EVENT_DAH_01H) \
__PMC_EV(IAP, EVENT_DAH_02H) \
__PMC_EV(IAP, EVENT_DBH_00H) \
__PMC_EV(IAP, EVENT_DCH_01H) \
__PMC_EV(IAP, EVENT_DCH_02H) \
__PMC_EV(IAP, EVENT_DCH_04H) \
__PMC_EV(IAP, EVENT_DCH_08H) \
__PMC_EV(IAP, EVENT_DCH_10H) \
__PMC_EV(IAP, EVENT_DCH_1FH) \
__PMC_EV(IAP, EVENT_E0H_00H) \
__PMC_EV(IAP, EVENT_E0H_01H) \
__PMC_EV(IAP, EVENT_E2H_00H) \
__PMC_EV(IAP, EVENT_E4H_00H) \
__PMC_EV(IAP, EVENT_E6H_00H) \
__PMC_EV(IAP, EVENT_E6H_01H) \
__PMC_EV(IAP, EVENT_F0H_00H) \
__PMC_EV(IAP, EVENT_F8H_00H)
#define PMC_EV_IAP_FIRST PMC_EV_IAP_EVENT_02H_81H
#define PMC_EV_IAP_LAST PMC_EV_IAP_EVENT_F8H_00H
/*
* Map "architectural" event names to event ids.
*/
#define __PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \
__PMC_EV_ALIAS("branch-instruction-retired", IAP_EVENT_C4H_00H) \
__PMC_EV_ALIAS("branch-misses-retired", IAP_EVENT_C5H_00H) \
__PMC_EV_ALIAS("instruction-retired", IAP_EVENT_C0H_00H) \
__PMC_EV_ALIAS("llc-misses", IAP_EVENT_2EH_41H) \
__PMC_EV_ALIAS("llc-reference", IAP_EVENT_2EH_4FH) \
__PMC_EV_ALIAS("unhalted-reference-cycles", IAP_EVENT_3CH_01H) \
__PMC_EV_ALIAS("unhalted-core-cycles", IAP_EVENT_3CH_00H)
/*
* Aliases for Atom PMCs.
*/
#define __PMC_EV_ALIAS_ATOM() \
__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \
__PMC_EV_ALIAS("BACLEARS", IAP_EVENT_E6H_01H) \
__PMC_EV_ALIAS("BOGUS_BR", IAP_EVENT_E4H_00H) \
__PMC_EV_ALIAS("BR_BAC_MISSP_EXEC", IAP_EVENT_8AH_00H) \
__PMC_EV_ALIAS("BR_CALL_EXEC", IAP_EVENT_92H_00H) \
__PMC_EV_ALIAS("BR_CALL_MISSP_EXEC", IAP_EVENT_93H_00H) \
__PMC_EV_ALIAS("BR_CND_EXEC", IAP_EVENT_8BH_00H) \
__PMC_EV_ALIAS("BR_CND_MISSP_EXEC", IAP_EVENT_8CH_00H) \
__PMC_EV_ALIAS("BR_IND_CALL_EXEC", IAP_EVENT_94H_00H) \
__PMC_EV_ALIAS("BR_IND_EXEC", IAP_EVENT_8DH_00H) \
__PMC_EV_ALIAS("BR_IND_MISSP_EXEC", IAP_EVENT_8EH_00H) \
__PMC_EV_ALIAS("BR_INST_DECODED", IAP_EVENT_E0H_01H) \
__PMC_EV_ALIAS("BR_INST_EXEC", IAP_EVENT_88H_00H) \
__PMC_EV_ALIAS("BR_INST_RETIRED.ANY", IAP_EVENT_C4H_00H) \
__PMC_EV_ALIAS("BR_INST_RETIRED.ANY1", IAP_EVENT_C4H_0FH) \
__PMC_EV_ALIAS("BR_INST_RETIRED.MISPRED", IAP_EVENT_C5H_00H) \
__PMC_EV_ALIAS("BR_INST_RETIRED.MISPRED_NOT_TAKEN", \
IAP_EVENT_C4H_02H) \
__PMC_EV_ALIAS("BR_INST_RETIRED.MISPRED_TAKEN", IAP_EVENT_C4H_08H) \
__PMC_EV_ALIAS("BR_INST_RETIRED.PRED_NOT_TAKEN",IAP_EVENT_C4H_01H) \
__PMC_EV_ALIAS("BR_INST_RETIRED.PRED_TAKEN", IAP_EVENT_C4H_04H) \
__PMC_EV_ALIAS("BR_INST_RETIRED.TAKEN", IAP_EVENT_C4H_0CH) \
__PMC_EV_ALIAS("BR_MISSP_EXEC", IAP_EVENT_89H_00H) \
__PMC_EV_ALIAS("BR_RET_BAC_MISSP_EXEC", IAP_EVENT_91H_00H) \
__PMC_EV_ALIAS("BR_RET_EXEC", IAP_EVENT_8FH_00H) \
__PMC_EV_ALIAS("BR_RET_MISSP_EXEC", IAP_EVENT_90H_00H) \
__PMC_EV_ALIAS("BR_TKN_BUBBLE_1", IAP_EVENT_97H_00H) \
__PMC_EV_ALIAS("BR_TKN_BUBBLE_2", IAP_EVENT_98H_00H) \
__PMC_EV_ALIAS("BUSQ_EMPTY", IAP_EVENT_7DH) \
__PMC_EV_ALIAS("BUS_BNR_DRV", IAP_EVENT_61H) \
__PMC_EV_ALIAS("BUS_DATA_RCV", IAP_EVENT_64H) \
__PMC_EV_ALIAS("BUS_DRDY_CLOCKS", IAP_EVENT_62H) \
__PMC_EV_ALIAS("BUS_HITM_DRV", IAP_EVENT_7BH) \
__PMC_EV_ALIAS("BUS_HIT_DRV", IAP_EVENT_7AH) \
__PMC_EV_ALIAS("BUS_IO_WAIT", IAP_EVENT_7FH) \
__PMC_EV_ALIAS("BUS_LOCK_CLOCKS", IAP_EVENT_63H) \
__PMC_EV_ALIAS("BUS_REQUEST_OUTSTANDING", IAP_EVENT_60H) \
__PMC_EV_ALIAS("BUS_TRANS_ANY", IAP_EVENT_70H) \
__PMC_EV_ALIAS("BUS_TRANS_BRD", IAP_EVENT_65H) \
__PMC_EV_ALIAS("BUS_TRANS_BURST", IAP_EVENT_6EH) \
__PMC_EV_ALIAS("BUS_TRANS_DEF", IAP_EVENT_6DH) \
__PMC_EV_ALIAS("BUS_TRANS_IFETCH", IAP_EVENT_68H) \
__PMC_EV_ALIAS("BUS_TRANS_INVAL", IAP_EVENT_69H) \
__PMC_EV_ALIAS("BUS_TRANS_IO", IAP_EVENT_6CH) \
__PMC_EV_ALIAS("BUS_TRANS_MEM", IAP_EVENT_6FH) \
__PMC_EV_ALIAS("BUS_TRANS_P", IAP_EVENT_6BH) \
__PMC_EV_ALIAS("BUS_TRANS_PWR", IAP_EVENT_6AH) \
__PMC_EV_ALIAS("BUS_TRANS_RFO", IAP_EVENT_66H) \
__PMC_EV_ALIAS("BUS_TRANS_WB", IAP_EVENT_67H) \
__PMC_EV_ALIAS("CMP_SNOOP", IAP_EVENT_78H) \
__PMC_EV_ALIAS("CPU_CLK_UNHALTED.BUS", IAP_EVENT_3CH_01H) \
__PMC_EV_ALIAS("CPU_CLK_UNHALTED.CORE_P", IAP_EVENT_3CH_00H) \
__PMC_EV_ALIAS("CPU_CLK_UNHALTED.NO_OTHER", IAP_EVENT_3CH_02H) \
__PMC_EV_ALIAS("CYCLES_DIV_BUSY", IAP_EVENT_14H_01H) \
__PMC_EV_ALIAS("CYCLES_INT_MASKED.CYCLES_INT_MASKED", \
IAP_EVENT_C6H_01H) \
__PMC_EV_ALIAS("CYCLES_INT_MASKED.CYCLES_INT_PENDING_AND_MASKED", \
IAP_EVENT_C6H_02H) \
__PMC_EV_ALIAS("CYCLES_L1I_MEM_STALLED", IAP_EVENT_86H_00H) \
__PMC_EV_ALIAS("DATA_TLB_MISSES.DTLB_MISS", IAP_EVENT_08H_07H) \
__PMC_EV_ALIAS("DATA_TLB_MISSES.DTLB_MISS_LD", IAP_EVENT_08H_05H) \
__PMC_EV_ALIAS("DATA_TLB_MISSES.DTLB_MISS_ST", IAP_EVENT_08H_06H) \
__PMC_EV_ALIAS("DATA_TLB_MISSES.UTLB_MISS_LD", IAP_EVENT_08H_09H) \
__PMC_EV_ALIAS("DELAYED_BYPASS.FP", IAP_EVENT_19H_00H) \
__PMC_EV_ALIAS("DELAYED_BYPASS.LOAD", IAP_EVENT_19H_01H) \
__PMC_EV_ALIAS("DELAYED_BYPASS.SIMD", IAP_EVENT_19H_02H) \
__PMC_EV_ALIAS("DIV", IAP_EVENT_13H_00H) \
__PMC_EV_ALIAS("DIV.AR", IAP_EVENT_13H_81H) \
__PMC_EV_ALIAS("DIV.S", IAP_EVENT_13H_01H) \
__PMC_EV_ALIAS("DTLB_MISSES.ANY", IAP_EVENT_08H_01H) \
__PMC_EV_ALIAS("DTLB_MISSES.L0_MISS_LD", IAP_EVENT_08H_04H) \
__PMC_EV_ALIAS("DTLB_MISSES.MISS_LD", IAP_EVENT_08H_02H) \
__PMC_EV_ALIAS("DTLB_MISSES.MISS_ST", IAP_EVENT_08H_08H) \
__PMC_EV_ALIAS("EIST_TRANS", IAP_EVENT_3AH_00H) \
__PMC_EV_ALIAS("ESP.ADDITIONS", IAP_EVENT_ABH_02H) \
__PMC_EV_ALIAS("ESP.SYNCH", IAP_EVENT_ABH_01H) \
__PMC_EV_ALIAS("EXT_SNOOP", IAP_EVENT_77H) \
__PMC_EV_ALIAS("FP_ASSIST", IAP_EVENT_11H_01H) \
__PMC_EV_ALIAS("FP_ASSIST.AR", IAP_EVENT_11H_81H) \
__PMC_EV_ALIAS("FP_COMP_OPS_EXE", IAP_EVENT_10H_00H) \
__PMC_EV_ALIAS("FP_MMX_TRANS_TO_FP", IAP_EVENT_CCH_02H) \
__PMC_EV_ALIAS("FP_MMX_TRANS_TO_MMX", IAP_EVENT_CCH_01H) \
__PMC_EV_ALIAS("HW_INT_RCV", IAP_EVENT_C8H_00H) \
__PMC_EV_ALIAS("ICACHE.ACCESSES", IAP_EVENT_80H_03H) \
__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \
__PMC_EV_ALIAS("IDLE_DURING_DIV", IAP_EVENT_18H_00H) \
__PMC_EV_ALIAS("ILD_STALL", IAP_EVENT_87H_00H) \
__PMC_EV_ALIAS("INST_QUEUE.FULL", IAP_EVENT_83H_02H) \
__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \
__PMC_EV_ALIAS("INST_RETIRED.LOADS", IAP_EVENT_C0H_01H) \
__PMC_EV_ALIAS("INST_RETIRED.OTHER", IAP_EVENT_C0H_04H) \
__PMC_EV_ALIAS("INST_RETIRED.STORES", IAP_EVENT_C0H_02H) \
__PMC_EV_ALIAS("ITLB.FLUSH", IAP_EVENT_82H_04H) \
__PMC_EV_ALIAS("ITLB.LARGE_MISS", IAP_EVENT_82H_10H) \
__PMC_EV_ALIAS("ITLB.MISSES", IAP_EVENT_82H_02H) \
__PMC_EV_ALIAS("ITLB.SMALL_MISS", IAP_EVENT_82H_02H) \
__PMC_EV_ALIAS("ITLB_MISS_RETIRED", IAP_EVENT_C9H_00H) \
__PMC_EV_ALIAS("L1D_ALL_CACHE_REF", IAP_EVENT_43H_02H) \
__PMC_EV_ALIAS("L1D_ALL_REF", IAP_EVENT_43H_01H) \
__PMC_EV_ALIAS("L1D_CACHE.LD", IAP_EVENT_40H_21H) \
__PMC_EV_ALIAS("L1D_CACHE.ST", IAP_EVENT_41H_22H) \
__PMC_EV_ALIAS("L1D_CACHE_LOCK", IAP_EVENT_42H) \
__PMC_EV_ALIAS("L1D_CACHE_LOCK_DURATION", IAP_EVENT_42H_10H) \
__PMC_EV_ALIAS("L1D_M_EVICT", IAP_EVENT_47H_00H) \
__PMC_EV_ALIAS("L1D_M_REPL", IAP_EVENT_46H_00H) \
__PMC_EV_ALIAS("L1D_PEND_MISS", IAP_EVENT_48H_00H) \
__PMC_EV_ALIAS("L1D_PREFETCH.REQUESTS", IAP_EVENT_4EH_10H) \
__PMC_EV_ALIAS("L1D_REPL", IAP_EVENT_45H_0FH) \
__PMC_EV_ALIAS("L1D_SPLIT.LOADS", IAP_EVENT_49H_01H) \
__PMC_EV_ALIAS("L1D_SPLIT.STORES", IAP_EVENT_49H_02H) \
__PMC_EV_ALIAS("L1I_MISSES", IAP_EVENT_81H_00H) \
__PMC_EV_ALIAS("L1I_READS", IAP_EVENT_80H_00H) \
__PMC_EV_ALIAS("L2_ADS", IAP_EVENT_21H) \
__PMC_EV_ALIAS("L2_DBUS_BUSY_RD", IAP_EVENT_23H) \
__PMC_EV_ALIAS("L2_IFETCH", IAP_EVENT_28H) \
__PMC_EV_ALIAS("L2_LD", IAP_EVENT_29H) \
__PMC_EV_ALIAS("L2_LINES_IN", IAP_EVENT_24H) \
__PMC_EV_ALIAS("L2_LINES_OUT", IAP_EVENT_26H) \
__PMC_EV_ALIAS("L2_LOCK", IAP_EVENT_2BH) \
__PMC_EV_ALIAS("L2_M_LINES_IN", IAP_EVENT_25H) \
__PMC_EV_ALIAS("L2_M_LINES_OUT", IAP_EVENT_27H) \
__PMC_EV_ALIAS("L2_NO_REQ", IAP_EVENT_32H) \
__PMC_EV_ALIAS("L2_REJECT_BUSQ", IAP_EVENT_30H) \
__PMC_EV_ALIAS("L2_RQSTS", IAP_EVENT_2EH) \
__PMC_EV_ALIAS("L2_RQSTS.SELF.DEMAND.I_STATE", IAP_EVENT_2EH_41H) \
__PMC_EV_ALIAS("L2_RQSTS.SELF.DEMAND.MESI", IAP_EVENT_2EH_4FH) \
__PMC_EV_ALIAS("L2_ST", IAP_EVENT_2AH) \
__PMC_EV_ALIAS("LOAD_BLOCK.L1D", IAP_EVENT_03H_20H) \
__PMC_EV_ALIAS("LOAD_BLOCK.OVERLAP_STORE", IAP_EVENT_03H_08H) \
__PMC_EV_ALIAS("LOAD_BLOCK.STA", IAP_EVENT_03H_02H) \
__PMC_EV_ALIAS("LOAD_BLOCK.STD", IAP_EVENT_03H_04H) \
__PMC_EV_ALIAS("LOAD_BLOCK.UNTIL_RETIRE", IAP_EVENT_03H_10H) \
__PMC_EV_ALIAS("LOAD_HIT_PRE", IAP_EVENT_4CH_00H) \
__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_01H) \
__PMC_EV_ALIAS("MACHINE_NUKES.MEM_ORDER", IAP_EVENT_C3H_04H) \
__PMC_EV_ALIAS("MACRO_INSTS.ALL_DECODED", IAP_EVENT_AAH_03H) \
__PMC_EV_ALIAS("MACRO_INSTS.CISC_DECODED", IAP_EVENT_AAH_02H) \
__PMC_EV_ALIAS("MEMORY_DISAMBIGUATION.RESET", IAP_EVENT_09H_01H) \
__PMC_EV_ALIAS("MEMORY_DISAMBIGUATION.SUCCESS", IAP_EVENT_09H_02H) \
__PMC_EV_ALIAS("MEM_LOAD_RETIRED.DTLB_MISS", IAP_EVENT_CBH_04H) \
__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L2_HIT", IAP_EVENT_CBH_01H) \
__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L2_LINE_MISS", IAP_EVENT_CBH_08H) \
__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L2_MISS", IAP_EVENT_CBH_02H) \
__PMC_EV_ALIAS("MUL", IAP_EVENT_12H_00H) \
__PMC_EV_ALIAS("MUL.AR", IAP_EVENT_12H_81H) \
__PMC_EV_ALIAS("MUL.S", IAP_EVENT_12H_01H) \
__PMC_EV_ALIAS("PAGE_WALKS.CYCLES", IAP_EVENT_0CH_03H) \
__PMC_EV_ALIAS("PAGE_WALKS.WALKS", IAP_EVENT_0CH_03H) \
__PMC_EV_ALIAS("PREFETCH.PREFETCHNTA", IAP_EVENT_07H_08H) \
__PMC_EV_ALIAS("PREFETCH.PREFETCHT0", IAP_EVENT_07H_01H) \
__PMC_EV_ALIAS("PREFETCH.SW_L2", IAP_EVENT_07H_06H) \
__PMC_EV_ALIAS("PREF_RQSTS_DN", IAP_EVENT_F8H_00H) \
__PMC_EV_ALIAS("PREF_RQSTS_UP", IAP_EVENT_F0H_00H) \
__PMC_EV_ALIAS("RAT_STALLS.ANY", IAP_EVENT_D2H_0FH) \
__PMC_EV_ALIAS("RAT_STALLS.FLAGS", IAP_EVENT_D2H_04H) \
__PMC_EV_ALIAS("RAT_STALLS.FPSW", IAP_EVENT_D2H_08H) \
__PMC_EV_ALIAS("RAT_STALLS.PARTIAL_CYCLES", IAP_EVENT_D2H_02H) \
__PMC_EV_ALIAS("RAT_STALLS.ROB_READ_PORT", IAP_EVENT_D2H_01H) \
__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_DCH_1FH) \
__PMC_EV_ALIAS("RESOURCE_STALLS.BR_MISS_CLEAR", IAP_EVENT_DCH_10H) \
__PMC_EV_ALIAS("RESOURCE_STALLS.FPCW", IAP_EVENT_DCH_08H) \
__PMC_EV_ALIAS("RESOURCE_STALLS.LD_ST", IAP_EVENT_DCH_04H) \
__PMC_EV_ALIAS("RESOURCE_STALLS.ROB_FULL", IAP_EVENT_DCH_01H) \
__PMC_EV_ALIAS("RESOURCE_STALLS.RS_FULL", IAP_EVENT_DCH_02H) \
__PMC_EV_ALIAS("RS_UOPS_DISPATCHED", IAP_EVENT_A0H_00H) \
__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT0", IAP_EVENT_A1H_01H) \
__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT1", IAP_EVENT_A1H_02H) \
__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT2", IAP_EVENT_A1H_04H) \
__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT3", IAP_EVENT_A1H_08H) \
__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT4", IAP_EVENT_A1H_10H) \
__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT5", IAP_EVENT_A1H_20H) \
__PMC_EV_ALIAS("SB_DRAIN_CYCLES", IAP_EVENT_04H_01H) \
__PMC_EV_ALIAS("SEGMENT_REG_LOADS.ANY", IAP_EVENT_06H_00H) \
__PMC_EV_ALIAS("SEG_REG_RENAMES.ANY", IAP_EVENT_D5H_0FH) \
__PMC_EV_ALIAS("SEG_REG_RENAMES.DS", IAP_EVENT_D5H_02H) \
__PMC_EV_ALIAS("SEG_REG_RENAMES.ES", IAP_EVENT_D5H_01H) \
__PMC_EV_ALIAS("SEG_REG_RENAMES.FS", IAP_EVENT_D5H_04H) \
__PMC_EV_ALIAS("SEG_REG_RENAMES.GS", IAP_EVENT_D5H_08H) \
__PMC_EV_ALIAS("SEG_RENAME_STALLS.ANY", IAP_EVENT_D4H_0FH) \
__PMC_EV_ALIAS("SEG_RENAME_STALLS.DS", IAP_EVENT_D4H_02H) \
__PMC_EV_ALIAS("SEG_RENAME_STALLS.ES", IAP_EVENT_D4H_01H) \
__PMC_EV_ALIAS("SEG_RENAME_STALLS.FS", IAP_EVENT_D4H_04H) \
__PMC_EV_ALIAS("SEG_RENAME_STALLS.GS", IAP_EVENT_D4H_08H) \
__PMC_EV_ALIAS("SIMD_ASSIST", IAP_EVENT_CDH_00H) \
__PMC_EV_ALIAS("SIMD_COMP_INST_RETIRED.PACKED_DOUBLE", \
IAP_EVENT_CAH_04H) \
__PMC_EV_ALIAS("SIMD_COMP_INST_RETIRED.PACKED_SINGLE", \
IAP_EVENT_CAH_01H) \
__PMC_EV_ALIAS("SIMD_COMP_INST_RETIRED.SCALAR_DOUBLE", \
IAP_EVENT_CAH_08H) \
__PMC_EV_ALIAS("SIMD_COMP_INST_RETIRED.SCALAR_SINGLE", \
IAP_EVENT_CAH_02H) \
__PMC_EV_ALIAS("SIMD_INSTR_RETIRED", IAP_EVENT_CEH_00H) \
__PMC_EV_ALIAS("SIMD_INST_RETIRED.ANY", IAP_EVENT_C7H_1FH) \
__PMC_EV_ALIAS("SIMD_INST_RETIRED.PACKED_DOUBLE", IAP_EVENT_C7H_04H) \
__PMC_EV_ALIAS("SIMD_INST_RETIRED.PACKED_SINGLE", IAP_EVENT_C7H_01H) \
__PMC_EV_ALIAS("SIMD_INST_RETIRED.SCALAR_DOUBLE", IAP_EVENT_C7H_08H) \
__PMC_EV_ALIAS("SIMD_INST_RETIRED.SCALAR_SINGLE", IAP_EVENT_C7H_02H) \
__PMC_EV_ALIAS("SIMD_INST_RETIRED.VECTOR", IAP_EVENT_C7H_10H) \
__PMC_EV_ALIAS("SIMD_SAT_INSTR_RETIRED", IAP_EVENT_CFH_00H) \
__PMC_EV_ALIAS("SIMD_SAT_UOP_EXEC.AR", IAP_EVENT_B1H_80H) \
__PMC_EV_ALIAS("SIMD_SAT_UOP_EXEC.S", IAP_EVENT_B1H_00H) \
__PMC_EV_ALIAS("SIMD_UOPS_EXEC.AR", IAP_EVENT_B0H_80H) \
__PMC_EV_ALIAS("SIMD_UOPS_EXEC.S", IAP_EVENT_B0H_00H) \
__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.ARITHMETIC.AR", IAP_EVENT_B3H_A0H) \
__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.ARITHMETIC.S", IAP_EVENT_B3H_20H) \
__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.LOGICAL.AR", IAP_EVENT_B3H_90H) \
__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.LOGICAL.S", IAP_EVENT_B3H_10H) \
__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.MUL.AR", IAP_EVENT_B3H_81H) \
__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.MUL.S", IAP_EVENT_B3H_01H) \
__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.PACK.AR", IAP_EVENT_B3H_84H) \
__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.PACK.S", IAP_EVENT_B3H_04H) \
__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.SHIFT.AR", IAP_EVENT_B3H_82H) \
__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.SHIFT.S", IAP_EVENT_B3H_02H) \
__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.UNPACK.AR", IAP_EVENT_B3H_88H) \
__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.UNPACK.S", IAP_EVENT_B3H_08H) \
__PMC_EV_ALIAS("SNOOP_STALL_DRV", IAP_EVENT_7EH) \
__PMC_EV_ALIAS("SSE_PRE_EXEC.L2", IAP_EVENT_07H_02H) \
__PMC_EV_ALIAS("SSE_PRE_EXEC.STORES", IAP_EVENT_07H_03H) \
__PMC_EV_ALIAS("SSE_PRE_MISS.L1", IAP_EVENT_4BH_01H) \
__PMC_EV_ALIAS("SSE_PRE_MISS.L2", IAP_EVENT_4BH_02H) \
__PMC_EV_ALIAS("SSE_PRE_MISS.NTA", IAP_EVENT_4BH_00H) \
__PMC_EV_ALIAS("STORE_BLOCK.ORDER", IAP_EVENT_04H_02H) \
__PMC_EV_ALIAS("STORE_BLOCK.SNOOP", IAP_EVENT_04H_08H) \
__PMC_EV_ALIAS("STORE_FORWARDS.GOOD", IAP_EVENT_02H_81H) \
__PMC_EV_ALIAS("THERMAL_TRIP", IAP_EVENT_3BH_C0H) \
__PMC_EV_ALIAS("UOPS_RETIRED.ANY", IAP_EVENT_C2H_10H) \
__PMC_EV_ALIAS("UOPS_RETIRED.FUSED", IAP_EVENT_C2H_07H) \
__PMC_EV_ALIAS("UOPS_RETIRED.LD_IND_BR", IAP_EVENT_C2H_01H) \
__PMC_EV_ALIAS("UOPS_RETIRED.MACRO_FUSION", IAP_EVENT_C2H_04H) \
__PMC_EV_ALIAS("UOPS_RETIRED.NON_FUSED", IAP_EVENT_C2H_08H) \
__PMC_EV_ALIAS("UOPS_RETIRED.STD_STA", IAP_EVENT_C2H_02H) \
__PMC_EV_ALIAS("X87_COMP_OPS_EXE.ANY.AR", IAP_EVENT_10H_81H) \
__PMC_EV_ALIAS("X87_COMP_OPS_EXE.ANY.S", IAP_EVENT_10H_01H) \
__PMC_EV_ALIAS("X87_OPS_RETIRED.ANY", IAP_EVENT_C1H_FEH) \
__PMC_EV_ALIAS("X87_OPS_RETIRED.FXCH", IAP_EVENT_C1H_01H)
/*
* Aliases for Core PMC events.
*/
#define __PMC_EV_ALIAS_CORE() \
__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \
__PMC_EV_ALIAS("BAClears", IAP_EVENT_E6H_00H) \
__PMC_EV_ALIAS("BTB_Misses", IAP_EVENT_E2H_00H) \
__PMC_EV_ALIAS("Br_BAC_Missp_Exec", IAP_EVENT_8AH_00H) \
__PMC_EV_ALIAS("Br_Bogus", IAP_EVENT_E4H_00H) \
__PMC_EV_ALIAS("Br_Call_Exec", IAP_EVENT_92H_00H) \
__PMC_EV_ALIAS("Br_Call_Missp_Exec", IAP_EVENT_93H_00H) \
__PMC_EV_ALIAS("Br_Cnd_Exec", IAP_EVENT_8BH_00H) \
__PMC_EV_ALIAS("Br_Cnd_Missp_Exec", IAP_EVENT_8CH_00H) \
__PMC_EV_ALIAS("Br_Ind_Call_Exec", IAP_EVENT_94H_00H) \
__PMC_EV_ALIAS("Br_Ind_Exec", IAP_EVENT_8DH_00H) \
__PMC_EV_ALIAS("Br_Ind_Missp_Exec", IAP_EVENT_8EH_00H) \
__PMC_EV_ALIAS("Br_Inst_Exec", IAP_EVENT_88H_00H) \
__PMC_EV_ALIAS("Br_Instr_Decoded", IAP_EVENT_E0H_00H) \
__PMC_EV_ALIAS("Br_Instr_Ret", IAP_EVENT_C4H_00H) \
__PMC_EV_ALIAS("Br_MisPred_Ret", IAP_EVENT_C5H_00H) \
__PMC_EV_ALIAS("Br_MisPred_Taken_Ret", IAP_EVENT_CAH_00H) \
__PMC_EV_ALIAS("Br_Missp_Exec", IAP_EVENT_89H_00H) \
__PMC_EV_ALIAS("Br_Ret_BAC_Missp_Exec", IAP_EVENT_91H_00H) \
__PMC_EV_ALIAS("Br_Ret_Exec", IAP_EVENT_8FH_00H) \
__PMC_EV_ALIAS("Br_Ret_Missp_Exec", IAP_EVENT_90H_00H) \
__PMC_EV_ALIAS("Br_Taken_Ret", IAP_EVENT_C9H_00H) \
__PMC_EV_ALIAS("Bus_BNR_Clocks", IAP_EVENT_61H_00H) \
__PMC_EV_ALIAS("Bus_DRDY_Clocks", IAP_EVENT_62H_00H) \
__PMC_EV_ALIAS("Bus_Data_Rcv", IAP_EVENT_64H_40H) \
__PMC_EV_ALIAS("Bus_Locks_Clocks", IAP_EVENT_63H) \
__PMC_EV_ALIAS("Bus_Not_In_Use", IAP_EVENT_7DH) \
__PMC_EV_ALIAS("Bus_Req_Outstanding", IAP_EVENT_60H) \
__PMC_EV_ALIAS("Bus_Snoop_Stall", IAP_EVENT_7EH_00H) \
__PMC_EV_ALIAS("Bus_Snoops", IAP_EVENT_77H) \
__PMC_EV_ALIAS("Bus_Trans_Any", IAP_EVENT_70H) \
__PMC_EV_ALIAS("Bus_Trans_Brd", IAP_EVENT_65H) \
__PMC_EV_ALIAS("Bus_Trans_Burst", IAP_EVENT_6EH) \
__PMC_EV_ALIAS("Bus_Trans_Def", IAP_EVENT_6DH) \
__PMC_EV_ALIAS("Bus_Trans_IO", IAP_EVENT_6CH) \
__PMC_EV_ALIAS("Bus_Trans_Ifetch", IAP_EVENT_68H) \
__PMC_EV_ALIAS("Bus_Trans_Inval", IAP_EVENT_69H) \
__PMC_EV_ALIAS("Bus_Trans_Mem", IAP_EVENT_6FH) \
__PMC_EV_ALIAS("Bus_Trans_P", IAP_EVENT_6BH) \
__PMC_EV_ALIAS("Bus_Trans_Pwr", IAP_EVENT_6AH) \
__PMC_EV_ALIAS("Bus_Trans_RFO", IAP_EVENT_66H) \
__PMC_EV_ALIAS("Bus_Trans_WB", IAP_EVENT_67H) \
__PMC_EV_ALIAS("Cycles_Div_Busy", IAP_EVENT_14H_00H) \
__PMC_EV_ALIAS("Cycles_Int_Masked", IAP_EVENT_C6H_00H) \
__PMC_EV_ALIAS("Cycles_Int_Pending_Masked", IAP_EVENT_C7H_00H) \
__PMC_EV_ALIAS("DCU_Snoop_To_Share", IAP_EVENT_78H) \
__PMC_EV_ALIAS("DCache_Cache_LD", IAP_EVENT_40H) \
__PMC_EV_ALIAS("DCache_Cache_Lock", IAP_EVENT_42H) \
__PMC_EV_ALIAS("DCache_Cache_ST", IAP_EVENT_41H) \
__PMC_EV_ALIAS("DCache_M_Evict", IAP_EVENT_47H_00H) \
__PMC_EV_ALIAS("DCache_M_Repl", IAP_EVENT_46H_00H) \
__PMC_EV_ALIAS("DCache_Pend_Miss", IAP_EVENT_48H_00H) \
__PMC_EV_ALIAS("DCache_Repl", IAP_EVENT_45H_0FH) \
__PMC_EV_ALIAS("Data_Mem_Cache_Ref", IAP_EVENT_44H_02H) \
__PMC_EV_ALIAS("Data_Mem_Ref", IAP_EVENT_43H_01H) \
__PMC_EV_ALIAS("Dbus_Busy", IAP_EVENT_22H) \
__PMC_EV_ALIAS("Dbus_Busy_Rd", IAP_EVENT_23H) \
__PMC_EV_ALIAS("Div", IAP_EVENT_13H_00H) \
__PMC_EV_ALIAS("Dtlb_Miss", IAP_EVENT_49H_00H) \
__PMC_EV_ALIAS("ESP_Uops", IAP_EVENT_D7H_00H) \
__PMC_EV_ALIAS("EST_Trans", IAP_EVENT_3AH) \
__PMC_EV_ALIAS("FP_Assist", IAP_EVENT_11H_00H) \
__PMC_EV_ALIAS("FP_Comp_Instr_Ret", IAP_EVENT_C1H_00H) \
__PMC_EV_ALIAS("FP_Comps_Op_Exe", IAP_EVENT_10H_00H) \
__PMC_EV_ALIAS("FP_MMX_Trans", IAP_EVENT_CCH_01H) \
__PMC_EV_ALIAS("Fused_Ld_Uops_Ret", IAP_EVENT_DAH_01H) \
__PMC_EV_ALIAS("Fused_St_Uops_Ret", IAP_EVENT_DAH_02H) \
__PMC_EV_ALIAS("Fused_Uops_Ret", IAP_EVENT_DAH_00H) \
__PMC_EV_ALIAS("HW_Int_Rx", IAP_EVENT_C8H_00H) \
__PMC_EV_ALIAS("ICache_Misses", IAP_EVENT_81H_00H) \
__PMC_EV_ALIAS("ICache_Reads", IAP_EVENT_80H_00H) \
__PMC_EV_ALIAS("IFU_Mem_Stall", IAP_EVENT_86H_00H) \
__PMC_EV_ALIAS("ILD_Stall", IAP_EVENT_87H_00H) \
__PMC_EV_ALIAS("ITLB_Misses", IAP_EVENT_85H_00H) \
__PMC_EV_ALIAS("Instr_Decoded", IAP_EVENT_D0H_00H) \
__PMC_EV_ALIAS("Instr_Ret", IAP_EVENT_C0H_00H) \
__PMC_EV_ALIAS("L1_Pref_Req", IAP_EVENT_4FH_00H) \
__PMC_EV_ALIAS("L2_ADS", IAP_EVENT_21H) \
__PMC_EV_ALIAS("L2_IFetch", IAP_EVENT_28H) \
__PMC_EV_ALIAS("L2_LD", IAP_EVENT_29H) \
__PMC_EV_ALIAS("L2_Lines_In", IAP_EVENT_24H) \
__PMC_EV_ALIAS("L2_Lines_Out", IAP_EVENT_26H) \
__PMC_EV_ALIAS("L2_M_Lines_In", IAP_EVENT_25H) \
__PMC_EV_ALIAS("L2_M_Lines_Out", IAP_EVENT_27H) \
__PMC_EV_ALIAS("L2_No_Request_Cycles", IAP_EVENT_32H) \
__PMC_EV_ALIAS("L2_Reject_Cycles", IAP_EVENT_30H) \
__PMC_EV_ALIAS("L2_Rqsts", IAP_EVENT_2EH) \
__PMC_EV_ALIAS("L2_ST", IAP_EVENT_2AH) \
__PMC_EV_ALIAS("LD_Blocks", IAP_EVENT_03H_00H) \
__PMC_EV_ALIAS("LLC_Misses", IAP_EVENT_2EH_41H) \
__PMC_EV_ALIAS("LLC_Reference", IAP_EVENT_2EH_4FH) \
__PMC_EV_ALIAS("MMX_Assist", IAP_EVENT_CDH_00H) \
__PMC_EV_ALIAS("MMX_FP_Trans", IAP_EVENT_CCH_00H) \
__PMC_EV_ALIAS("MMX_Instr_Exec", IAP_EVENT_B0H_00H) \
__PMC_EV_ALIAS("MMX_Instr_Ret", IAP_EVENT_CEH_00H) \
__PMC_EV_ALIAS("Misalign_Mem_Ref", IAP_EVENT_05H_00H) \
__PMC_EV_ALIAS("Mul", IAP_EVENT_12H_00H) \
__PMC_EV_ALIAS("NonHlt_Ref_Cycles", IAP_EVENT_3CH_01H) \
__PMC_EV_ALIAS("Pref_Rqsts_Dn", IAP_EVENT_F8H_00H) \
__PMC_EV_ALIAS("Pref_Rqsts_Up", IAP_EVENT_F0H_00H) \
__PMC_EV_ALIAS("Resource_Stall", IAP_EVENT_A2H_00H) \
__PMC_EV_ALIAS("SD_Drains", IAP_EVENT_04H_00H) \
__PMC_EV_ALIAS("SIMD_FP_DP_P_Comp_Ret", IAP_EVENT_D9H_02H) \
__PMC_EV_ALIAS("SIMD_FP_DP_P_Ret", IAP_EVENT_D8H_02H) \
__PMC_EV_ALIAS("SIMD_FP_DP_S_Comp_Ret", IAP_EVENT_D9H_03H) \
__PMC_EV_ALIAS("SIMD_FP_DP_S_Ret", IAP_EVENT_D8H_03H) \
__PMC_EV_ALIAS("SIMD_FP_SP_P_Comp_Ret", IAP_EVENT_D9H_00H) \
__PMC_EV_ALIAS("SIMD_FP_SP_Ret", IAP_EVENT_D8H_00H) \
__PMC_EV_ALIAS("SIMD_FP_SP_S_Comp_Ret", IAP_EVENT_D9H_01H) \
__PMC_EV_ALIAS("SIMD_FP_SP_S_Ret", IAP_EVENT_D8H_01H) \
__PMC_EV_ALIAS("SIMD_Int_128_Ret", IAP_EVENT_D8H_04H) \
__PMC_EV_ALIAS("SIMD_Int_Pari_Exec", IAP_EVENT_B3H_20H) \
__PMC_EV_ALIAS("SIMD_Int_Pck_Exec", IAP_EVENT_B3H_04H) \
__PMC_EV_ALIAS("SIMD_Int_Plog_Exec", IAP_EVENT_B3H_10H) \
__PMC_EV_ALIAS("SIMD_Int_Pmul_Exec", IAP_EVENT_B3H_01H) \
__PMC_EV_ALIAS("SIMD_Int_Psft_Exec", IAP_EVENT_B3H_02H) \
__PMC_EV_ALIAS("SIMD_Int_Sat_Exec", IAP_EVENT_B1H_00H) \
__PMC_EV_ALIAS("SIMD_Int_Upck_Exec", IAP_EVENT_B3H_08H) \
__PMC_EV_ALIAS("SMC_Detected", IAP_EVENT_C3H_00H) \
__PMC_EV_ALIAS("SSE_NTStores_Miss", IAP_EVENT_4BH_03H) \
__PMC_EV_ALIAS("SSE_NTStores_Ret", IAP_EVENT_07H_03H) \
__PMC_EV_ALIAS("SSE_PrefNta_Miss", IAP_EVENT_4BH_00H) \
__PMC_EV_ALIAS("SSE_PrefNta_Ret", IAP_EVENT_07H_00H) \
__PMC_EV_ALIAS("SSE_PrefT1_Miss", IAP_EVENT_4BH_01H) \
__PMC_EV_ALIAS("SSE_PrefT1_Ret", IAP_EVENT_07H_01H) \
__PMC_EV_ALIAS("SSE_PrefT2_Miss", IAP_EVENT_4BH_02H) \
__PMC_EV_ALIAS("SSE_PrefT2_Ret", IAP_EVENT_07H_02H) \
__PMC_EV_ALIAS("Seg_Reg_Loads", IAP_EVENT_06H_00H) \
__PMC_EV_ALIAS("Serial_Execution_Cycles", IAP_EVENT_3CH_02H) \
__PMC_EV_ALIAS("Thermal_Trip", IAP_EVENT_3BH_C0H) \
__PMC_EV_ALIAS("Unfusion", IAP_EVENT_DBH_00H) \
__PMC_EV_ALIAS("Unhalted_Core_Cycles", IAP_EVENT_3CH_00H) \
__PMC_EV_ALIAS("Uops_Ret", IAP_EVENT_C2H_00H)
/*
* Aliases for Core2 PMC events.
*/
#define __PMC_EV_ALIAS_CORE2() \
__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \
__PMC_EV_ALIAS("BACLEARS", IAP_EVENT_E6H_00H) \
__PMC_EV_ALIAS("BOGUS_BR", IAP_EVENT_E4H_00H) \
__PMC_EV_ALIAS("BR_BAC_MISSP_EXEC", IAP_EVENT_8AH_00H) \
__PMC_EV_ALIAS("BR_CALL_EXEC", IAP_EVENT_92H_00H) \
__PMC_EV_ALIAS("BR_CALL_MISSP_EXEC", IAP_EVENT_93H_00H) \
__PMC_EV_ALIAS("BR_CND_EXEC", IAP_EVENT_8BH_00H) \
__PMC_EV_ALIAS("BR_CND_MISSP_EXEC", IAP_EVENT_8CH_00H) \
__PMC_EV_ALIAS("BR_IND_CALL_EXEC", IAP_EVENT_94H_00H) \
__PMC_EV_ALIAS("BR_IND_EXEC", IAP_EVENT_8DH_00H) \
__PMC_EV_ALIAS("BR_IND_MISSP_EXEC", IAP_EVENT_8EH_00H) \
__PMC_EV_ALIAS("BR_INST_DECODED", IAP_EVENT_E0H_00H) \
__PMC_EV_ALIAS("BR_INST_EXEC", IAP_EVENT_88H_00H) \
__PMC_EV_ALIAS("BR_INST_RETIRED.ANY", IAP_EVENT_C4H_00H) \
__PMC_EV_ALIAS("BR_INST_RETIRED.MISPRED", IAP_EVENT_C5H_00H) \
__PMC_EV_ALIAS("BR_INST_RETIRED.MISPRED_NOT_TAKEN", \
IAP_EVENT_C4H_02H) \
__PMC_EV_ALIAS("BR_INST_RETIRED.MISPRED_TAKEN", \
IAP_EVENT_C4H_08H) \
__PMC_EV_ALIAS("BR_INST_RETIRED.PRED_NOT_TAKEN", \
IAP_EVENT_C4H_01H) \
__PMC_EV_ALIAS("BR_INST_RETIRED.PRED_TAKEN", \
IAP_EVENT_C4H_04H) \
__PMC_EV_ALIAS("BR_INST_RETIRED.TAKEN", IAP_EVENT_C4H_0CH) \
__PMC_EV_ALIAS("BR_MISSP_EXEC", IAP_EVENT_89H_00H) \
__PMC_EV_ALIAS("BR_RET_BAC_MISSP_EXEC", IAP_EVENT_91H_00H) \
__PMC_EV_ALIAS("BR_RET_EXEC", IAP_EVENT_8FH_00H) \
__PMC_EV_ALIAS("BR_RET_MISSP_EXEC", IAP_EVENT_90H_00H) \
__PMC_EV_ALIAS("BR_TKN_BUBBLE_1", IAP_EVENT_97H_00H) \
__PMC_EV_ALIAS("BR_TKN_BUBBLE_2", IAP_EVENT_98H_00H) \
__PMC_EV_ALIAS("BUSQ_EMPTY", IAP_EVENT_7DH) \
__PMC_EV_ALIAS("BUS_BNR_DRV", IAP_EVENT_61H) \
__PMC_EV_ALIAS("BUS_DATA_RCV", IAP_EVENT_64H) \
__PMC_EV_ALIAS("BUS_DRDY_CLOCKS", IAP_EVENT_62H) \
__PMC_EV_ALIAS("BUS_HITM_DRV", IAP_EVENT_7BH) \
__PMC_EV_ALIAS("BUS_HIT_DRV", IAP_EVENT_7AH) \
__PMC_EV_ALIAS("BUS_IO_WAIT", IAP_EVENT_7FH) \
__PMC_EV_ALIAS("BUS_LOCK_CLOCKS", IAP_EVENT_63H) \
__PMC_EV_ALIAS("BUS_REQUEST_OUTSTANDING", \
IAP_EVENT_60H) \
__PMC_EV_ALIAS("BUS_TRANS_ANY", IAP_EVENT_70H) \
__PMC_EV_ALIAS("BUS_TRANS_BRD", IAP_EVENT_65H) \
__PMC_EV_ALIAS("BUS_TRANS_BURST", IAP_EVENT_6EH) \
__PMC_EV_ALIAS("BUS_TRANS_DEF", IAP_EVENT_6DH) \
__PMC_EV_ALIAS("BUS_TRANS_IFETCH", IAP_EVENT_68H) \
__PMC_EV_ALIAS("BUS_TRANS_INVAL", IAP_EVENT_69H) \
__PMC_EV_ALIAS("BUS_TRANS_IO", IAP_EVENT_6CH) \
__PMC_EV_ALIAS("BUS_TRANS_MEM", IAP_EVENT_6FH) \
__PMC_EV_ALIAS("BUS_TRANS_P", IAP_EVENT_6BH) \
__PMC_EV_ALIAS("BUS_TRANS_PWR", IAP_EVENT_6AH) \
__PMC_EV_ALIAS("BUS_TRANS_RFO", IAP_EVENT_66H) \
__PMC_EV_ALIAS("BUS_TRANS_WB", IAP_EVENT_67H) \
__PMC_EV_ALIAS("CMP_SNOOP", IAP_EVENT_78H) \
__PMC_EV_ALIAS("CPU_CLK_UNHALTED.BUS", IAP_EVENT_3CH_01H) \
__PMC_EV_ALIAS("CPU_CLK_UNHALTED.CORE_P", \
IAP_EVENT_3CH_00H) \
__PMC_EV_ALIAS("CPU_CLK_UNHALTED.NO_OTHER", \
IAP_EVENT_3CH_02H) \
__PMC_EV_ALIAS("CYCLES_DIV_BUSY", IAP_EVENT_14H_00H) \
__PMC_EV_ALIAS("CYCLES_INT_MASKED", IAP_EVENT_C6H_01H) \
__PMC_EV_ALIAS("CYCLES_INT_PENDING_AND_MASKED", \
IAP_EVENT_C6H_02H) \
__PMC_EV_ALIAS("CYCLES_L1I_MEM_STALLED", IAP_EVENT_86H_00H) \
__PMC_EV_ALIAS("DELAYED_BYPASS.FP", IAP_EVENT_19H_00H) \
__PMC_EV_ALIAS("DELAYED_BYPASS.LOAD", IAP_EVENT_19H_01H) \
__PMC_EV_ALIAS("DELAYED_BYPASS.SIMD", IAP_EVENT_19H_02H) \
__PMC_EV_ALIAS("DIV", IAP_EVENT_13H_00H) \
__PMC_EV_ALIAS("DTLB_MISSES.ANY", IAP_EVENT_08H_01H) \
__PMC_EV_ALIAS("DTLB_MISSES.L0_MISS_LD", IAP_EVENT_08H_04H) \
__PMC_EV_ALIAS("DTLB_MISSES.MISS_LD", IAP_EVENT_08H_02H) \
__PMC_EV_ALIAS("DTLB_MISSES.MISS_ST", IAP_EVENT_08H_08H) \
__PMC_EV_ALIAS("EIST_TRANS", IAP_EVENT_3AH_00H) \
__PMC_EV_ALIAS("ESP.ADDITIONS", IAP_EVENT_ABH_02H) \
__PMC_EV_ALIAS("ESP.SYNCH", IAP_EVENT_ABH_01H) \
__PMC_EV_ALIAS("EXT_SNOOP", IAP_EVENT_77H) \
__PMC_EV_ALIAS("FP_ASSIST", IAP_EVENT_11H_00H) \
__PMC_EV_ALIAS("FP_COMP_OPS_EXE", IAP_EVENT_10H_00H) \
__PMC_EV_ALIAS("FP_MMX_TRANS_TO_FP", IAP_EVENT_CCH_02H) \
__PMC_EV_ALIAS("FP_MMX_TRANS_TO_MMX", IAP_EVENT_CCH_01H) \
__PMC_EV_ALIAS("HW_INT_RCV", IAP_EVENT_C8H_00H) \
__PMC_EV_ALIAS("IDLE_DURING_DIV", IAP_EVENT_18H_00H) \
__PMC_EV_ALIAS("ILD_STALL", IAP_EVENT_87H_00H) \
__PMC_EV_ALIAS("INST_QUEUE.FULL", IAP_EVENT_83H_02H) \
__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \
__PMC_EV_ALIAS("INST_RETIRED.LOADS", IAP_EVENT_C0H_01H) \
__PMC_EV_ALIAS("INST_RETIRED.OTHER", IAP_EVENT_C0H_04H) \
__PMC_EV_ALIAS("INST_RETIRED.STORES", IAP_EVENT_C0H_02H) \
__PMC_EV_ALIAS("INST_RETIRED.VM_H", IAP_EVENT_C0H_08H) \
__PMC_EV_ALIAS("ITLB.FLUSH", IAP_EVENT_82H_40H) \
__PMC_EV_ALIAS("ITLB.LARGE_MISS", IAP_EVENT_82H_10H) \
__PMC_EV_ALIAS("ITLB.MISSES", IAP_EVENT_82H_12H) \
__PMC_EV_ALIAS("ITLB.SMALL_MISS", IAP_EVENT_82H_02H) \
__PMC_EV_ALIAS("ITLB_MISS_RETIRED", IAP_EVENT_C9H_00H) \
__PMC_EV_ALIAS("L1D_ALL_CACHE_REF", IAP_EVENT_43H_02H) \
__PMC_EV_ALIAS("L1D_ALL_REF", IAP_EVENT_43H_01H) \
__PMC_EV_ALIAS("L1D_CACHE_LD", IAP_EVENT_40H) \
__PMC_EV_ALIAS("L1D_CACHE_LOCK", IAP_EVENT_42H) \
__PMC_EV_ALIAS("L1D_CACHE_LOCK_DURATION", IAP_EVENT_42H_10H) \
__PMC_EV_ALIAS("L1D_CACHE_ST", IAP_EVENT_41H) \
__PMC_EV_ALIAS("L1D_M_EVICT", IAP_EVENT_47H_00H) \
__PMC_EV_ALIAS("L1D_M_REPL", IAP_EVENT_46H_00H) \
__PMC_EV_ALIAS("L1D_PEND_MISS", IAP_EVENT_48H_00H) \
__PMC_EV_ALIAS("L1D_PREFETCH.REQUESTS", IAP_EVENT_4EH_10H) \
__PMC_EV_ALIAS("L1D_REPL", IAP_EVENT_45H_0FH) \
__PMC_EV_ALIAS("L1D_SPLIT.LOADS", IAP_EVENT_49H_01H) \
__PMC_EV_ALIAS("L1D_SPLIT.STORES", IAP_EVENT_49H_02H) \
__PMC_EV_ALIAS("L1I_MISSES", IAP_EVENT_81H_00H) \
__PMC_EV_ALIAS("L1I_READS", IAP_EVENT_80H_00H) \
__PMC_EV_ALIAS("L2_ADS", IAP_EVENT_21H) \
__PMC_EV_ALIAS("L2_DBUS_BUSY_RD", IAP_EVENT_23H) \
__PMC_EV_ALIAS("L2_IFETCH", IAP_EVENT_28H) \
__PMC_EV_ALIAS("L2_LD", IAP_EVENT_29H) \
__PMC_EV_ALIAS("L2_LINES_IN", IAP_EVENT_24H) \
__PMC_EV_ALIAS("L2_LINES_OUT", IAP_EVENT_26H) \
__PMC_EV_ALIAS("L2_LOCK", IAP_EVENT_2BH) \
__PMC_EV_ALIAS("L2_M_LINES_IN", IAP_EVENT_25H) \
__PMC_EV_ALIAS("L2_M_LINES_OUT", IAP_EVENT_27H) \
__PMC_EV_ALIAS("L2_NO_REQ", IAP_EVENT_32H) \
__PMC_EV_ALIAS("L2_REJECT_BUSQ", IAP_EVENT_30H) \
__PMC_EV_ALIAS("L2_RQSTS", IAP_EVENT_2EH) \
__PMC_EV_ALIAS("L2_RQSTS.SELF.DEMAND.I_STATE", \
IAP_EVENT_2EH_41H) \
__PMC_EV_ALIAS("L2_RQSTS.SELF.DEMAND.MESI", \
IAP_EVENT_2EH_4FH) \
__PMC_EV_ALIAS("L2_ST", IAP_EVENT_2AH) \
__PMC_EV_ALIAS("LOAD_BLOCK.L1D", IAP_EVENT_03H_20H) \
__PMC_EV_ALIAS("LOAD_BLOCK.OVERLAP_STORE", \
IAP_EVENT_03H_08H) \
__PMC_EV_ALIAS("LOAD_BLOCK.STA", IAP_EVENT_03H_02H) \
__PMC_EV_ALIAS("LOAD_BLOCK.STD", IAP_EVENT_03H_04H) \
__PMC_EV_ALIAS("LOAD_BLOCK.UNTIL_RETIRE", IAP_EVENT_03H_10H) \
__PMC_EV_ALIAS("LOAD_HIT_PRE", IAP_EVENT_4CH_00H) \
__PMC_EV_ALIAS("MACHINE_NUKES.MEM_ORDER", IAP_EVENT_C3H_04H) \
__PMC_EV_ALIAS("MACHINE_NUKES.SMC", IAP_EVENT_C3H_01H) \
__PMC_EV_ALIAS("MACRO_INSTS.CISC_DECODED", IAP_EVENT_AAH_08H) \
__PMC_EV_ALIAS("MACRO_INSTS.DECODED", IAP_EVENT_AAH_01H) \
__PMC_EV_ALIAS("MEMORY_DISAMBIGUATION.RESET", \
IAP_EVENT_09H_01H) \
__PMC_EV_ALIAS("MEMORY_DISAMBIGUATION.SUCCESS", \
IAP_EVENT_09H_02H) \
__PMC_EV_ALIAS("MEM_LOAD_RETIRED.DTLB_MISS", \
IAP_EVENT_CBH_10H) \
__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L1D_LINE_MISS", \
IAP_EVENT_CBH_02H) \
__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L1D_MISS", \
IAP_EVENT_CBH_01H) \
__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L2_LINE_MISS", \
IAP_EVENT_CBH_08H) \
__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L2_MISS", \
IAP_EVENT_CBH_04H) \
__PMC_EV_ALIAS("MUL", IAP_EVENT_12H_00H) \
__PMC_EV_ALIAS("PAGE_WALKS.COUNT", IAP_EVENT_0CH_01H) \
__PMC_EV_ALIAS("PAGE_WALKS.CYCLES", IAP_EVENT_0CH_02H) \
__PMC_EV_ALIAS("PREF_RQSTS_DN", IAP_EVENT_F8H_00H) \
__PMC_EV_ALIAS("PREF_RQSTS_UP", IAP_EVENT_F0H_00H) \
__PMC_EV_ALIAS("RAT_STALLS.ANY", IAP_EVENT_D2H_0FH) \
__PMC_EV_ALIAS("RAT_STALLS.FLAGS", IAP_EVENT_D2H_04H) \
__PMC_EV_ALIAS("RAT_STALLS.FPSW", IAP_EVENT_D2H_08H) \
__PMC_EV_ALIAS("RAT_STALLS.OTHER_SERIALIZATION_STALLS", \
IAP_EVENT_D2H_10H) \
__PMC_EV_ALIAS("RAT_STALLS.PARTIAL_CYCLES", \
IAP_EVENT_D2H_02H) \
__PMC_EV_ALIAS("RAT_STALLS.ROB_READ_PORT", \
IAP_EVENT_D2H_01H) \
__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_DCH_1FH) \
__PMC_EV_ALIAS("RESOURCE_STALLS.BR_MISS_CLEAR", \
IAP_EVENT_DCH_10H) \
__PMC_EV_ALIAS("RESOURCE_STALLS.FPCW", IAP_EVENT_DCH_08H) \
__PMC_EV_ALIAS("RESOURCE_STALLS.LD_ST", IAP_EVENT_DCH_04H) \
__PMC_EV_ALIAS("RESOURCE_STALLS.ROB_FULL", \
IAP_EVENT_DCH_01H) \
__PMC_EV_ALIAS("RESOURCE_STALLS.RS_FULL", IAP_EVENT_DCH_02H) \
__PMC_EV_ALIAS("RS_UOPS_DISPATCHED", IAP_EVENT_A0H_00H) \
__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT0", IAP_EVENT_A1H_01H) \
__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT1", IAP_EVENT_A1H_02H) \
__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT2", IAP_EVENT_A1H_04H) \
__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT3", IAP_EVENT_A1H_08H) \
__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT4", IAP_EVENT_A1H_10H) \
__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT5", IAP_EVENT_A1H_20H) \
__PMC_EV_ALIAS("SB_DRAIN_CYCLES", IAP_EVENT_04H_01H) \
__PMC_EV_ALIAS("SEGMENT_REG_LOADS", IAP_EVENT_06H_00H) \
__PMC_EV_ALIAS("SEG_REG_RENAMES.ANY", IAP_EVENT_D5H_0FH) \
__PMC_EV_ALIAS("SEG_REG_RENAMES.DS", IAP_EVENT_D5H_02H) \
__PMC_EV_ALIAS("SEG_REG_RENAMES.ES", IAP_EVENT_D5H_01H) \
__PMC_EV_ALIAS("SEG_REG_RENAMES.FS", IAP_EVENT_D5H_04H) \
__PMC_EV_ALIAS("SEG_REG_RENAMES.GS", IAP_EVENT_D5H_08H) \
__PMC_EV_ALIAS("SEG_RENAME_STALLS.ANY", IAP_EVENT_D4H_0FH) \
__PMC_EV_ALIAS("SEG_RENAME_STALLS.DS", IAP_EVENT_D4H_02H) \
__PMC_EV_ALIAS("SEG_RENAME_STALLS.ES", IAP_EVENT_D4H_01H) \
__PMC_EV_ALIAS("SEG_RENAME_STALLS.FS", IAP_EVENT_D4H_04H) \
__PMC_EV_ALIAS("SEG_RENAME_STALLS.GS", IAP_EVENT_D4H_08H) \
__PMC_EV_ALIAS("SIMD_ASSIST", IAP_EVENT_CDH_00H) \
__PMC_EV_ALIAS("SIMD_COMP_INST_RETIRED.PACKED_DOUBLE", \
IAP_EVENT_CAH_04H) \
__PMC_EV_ALIAS("SIMD_COMP_INST_RETIRED.PACKED_SINGLE", \
IAP_EVENT_CAH_01H) \
__PMC_EV_ALIAS("SIMD_COMP_INST_RETIRED.SCALAR_DOUBLE", \
IAP_EVENT_CAH_08H) \
__PMC_EV_ALIAS("SIMD_COMP_INST_RETIRED.SCALAR_SINGLE", \
IAP_EVENT_CAH_02H) \
__PMC_EV_ALIAS("SIMD_INSTR_RETIRED", IAP_EVENT_CEH_00H) \
__PMC_EV_ALIAS("SIMD_INST_RETIRED.ANY", IAP_EVENT_C7H_1FH) \
__PMC_EV_ALIAS("SIMD_INST_RETIRED.PACKED_DOUBLE", \
IAP_EVENT_C7H_04H) \
__PMC_EV_ALIAS("SIMD_INST_RETIRED.PACKED_SINGLE", \
IAP_EVENT_C7H_01H) \
__PMC_EV_ALIAS("SIMD_INST_RETIRED.SCALAR_DOUBLE", \
IAP_EVENT_C7H_08H) \
__PMC_EV_ALIAS("SIMD_INST_RETIRED.SCALAR_SINGLE", \
IAP_EVENT_C7H_02H) \
__PMC_EV_ALIAS("SIMD_INST_RETIRED.VECTOR", IAP_EVENT_C7H_10H) \
__PMC_EV_ALIAS("SIMD_SAT_INSTR_RETIRED", IAP_EVENT_CFH_00H) \
__PMC_EV_ALIAS("SIMD_SAT_UOP_EXEC", IAP_EVENT_B1H_00H) \
__PMC_EV_ALIAS("SIMD_UOPS_EXEC", IAP_EVENT_B0H_00H) \
__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.ARITHMETIC", IAP_EVENT_B3H_20H) \
__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.LOGICAL", IAP_EVENT_B3H_10H) \
__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.MUL", IAP_EVENT_B3H_01H) \
__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.PACK", IAP_EVENT_B3H_04H) \
__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.SHIFT", IAP_EVENT_B3H_02H) \
__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.UNPACK", IAP_EVENT_B3H_08H) \
__PMC_EV_ALIAS("SNOOP_STALL_DRV", IAP_EVENT_7EH) \
__PMC_EV_ALIAS("SSE_PRE_EXEC.L1", IAP_EVENT_07H_01H) \
__PMC_EV_ALIAS("SSE_PRE_EXEC.L2", IAP_EVENT_07H_02H) \
__PMC_EV_ALIAS("SSE_PRE_EXEC.NTA", IAP_EVENT_07H_00H) \
__PMC_EV_ALIAS("SSE_PRE_EXEC.STORES", IAP_EVENT_07H_03H) \
__PMC_EV_ALIAS("SSE_PRE_MISS.L1", IAP_EVENT_4BH_01H) \
__PMC_EV_ALIAS("SSE_PRE_MISS.L2", IAP_EVENT_4BH_02H) \
__PMC_EV_ALIAS("SSE_PRE_MISS.NTA", IAP_EVENT_4BH_00H) \
__PMC_EV_ALIAS("STORE_BLOCK.ORDER", IAP_EVENT_04H_02H) \
__PMC_EV_ALIAS("STORE_BLOCK.SNOOP", IAP_EVENT_04H_08H) \
__PMC_EV_ALIAS("THERMAL_TRIP", IAP_EVENT_3BH_C0H) \
__PMC_EV_ALIAS("UOPS_RETIRED.ANY", IAP_EVENT_C2H_0FH) \
__PMC_EV_ALIAS("UOPS_RETIRED.FUSED", IAP_EVENT_C2H_07H) \
__PMC_EV_ALIAS("UOPS_RETIRED.LD_IND_BR", IAP_EVENT_C2H_01H) \
__PMC_EV_ALIAS("UOPS_RETIRED.MACRO_FUSION", IAP_EVENT_C2H_04H) \
__PMC_EV_ALIAS("UOPS_RETIRED.NON_FUSED", IAP_EVENT_C2H_08H) \
__PMC_EV_ALIAS("UOPS_RETIRED.STD_STA", IAP_EVENT_C2H_02H) \
__PMC_EV_ALIAS("X87_OPS_RETIRED.ANY", IAP_EVENT_C1H_FEH) \
__PMC_EV_ALIAS("X87_OPS_RETIRED.FXCH", IAP_EVENT_C1H_01H)
/* timestamp counters. */
#define __PMC_EV_TSC() \

View File

@ -52,6 +52,7 @@ struct pmc_mdep;
*/
#include <dev/hwpmc/hwpmc_amd.h> /* K7 and K8 */
#include <dev/hwpmc/hwpmc_core.h>
#include <dev/hwpmc/hwpmc_piv.h>
#include <dev/hwpmc/hwpmc_ppro.h>
#include <dev/hwpmc/hwpmc_pentium.h>
@ -68,8 +69,8 @@ struct pmc_mdep;
#define PMC_MDEP_CLASS_INDEX_P4 1
#define PMC_MDEP_CLASS_INDEX_P5 1
#define PMC_MDEP_CLASS_INDEX_P6 1
#define PMC_MDEP_CLASS_INDEX_IAF 1
#define PMC_MDEP_CLASS_INDEX_IAP 2
#define PMC_MDEP_CLASS_INDEX_IAP 1
#define PMC_MDEP_CLASS_INDEX_IAF 2
/*
* Architecture specific extensions to <sys/pmc.h> structures.
@ -77,9 +78,11 @@ struct pmc_mdep;
union pmc_md_op_pmcallocate {
struct pmc_md_amd_op_pmcallocate pm_amd;
struct pmc_md_ppro_op_pmcallocate pm_ppro;
struct pmc_md_pentium_op_pmcallocate pm_pentium;
struct pmc_md_iaf_op_pmcallocate pm_iaf;
struct pmc_md_iap_op_pmcallocate pm_iap;
struct pmc_md_p4_op_pmcallocate pm_p4;
struct pmc_md_pentium_op_pmcallocate pm_pentium;
struct pmc_md_ppro_op_pmcallocate pm_ppro;
uint64_t __pad[4];
};
@ -92,9 +95,11 @@ union pmc_md_op_pmcallocate {
/* MD extension for 'struct pmc' */
union pmc_md_pmc {
struct pmc_md_amd_pmc pm_amd;
struct pmc_md_ppro_pmc pm_ppro;
struct pmc_md_pentium_pmc pm_pentium;
struct pmc_md_iaf_pmc pm_iaf;
struct pmc_md_iap_pmc pm_iap;
struct pmc_md_p4_pmc pm_p4;
struct pmc_md_pentium_pmc pm_pentium;
struct pmc_md_ppro_pmc pm_ppro;
};
struct pmc;

View File

@ -9,7 +9,8 @@ KMOD= hwpmc
SRCS= hwpmc_mod.c hwpmc_logging.c vnode_if.h
.if ${MACHINE_ARCH} == "amd64"
SRCS+= hwpmc_amd.c hwpmc_intel.c hwpmc_piv.c hwpmc_tsc.c hwpmc_x86.c
SRCS+= hwpmc_amd.c hwpmc_core.c hwpmc_intel.c hwpmc_piv.c hwpmc_tsc.c
SRCS+= hwpmc_x86.c
SRCS+= device_if.h bus_if.h
.endif
@ -18,8 +19,8 @@ SRCS+= hwpmc_arm.c
.endif
.if ${MACHINE_ARCH} == "i386"
SRCS+= hwpmc_amd.c hwpmc_intel.c hwpmc_piv.c hwpmc_ppro.c hwpmc_pentium.c
SRCS+= hwpmc_tsc.c hwpmc_x86.c
SRCS+= hwpmc_amd.c hwpmc_core.c hwpmc_intel.c hwpmc_piv.c hwpmc_ppro.c
SRCS+= hwpmc_pentium.c hwpmc_tsc.c hwpmc_x86.c
SRCS+= device_if.h bus_if.h
.endif

View File

@ -57,7 +57,7 @@
* is created, otherwise 1.
*/
#undef __FreeBSD_version
#define __FreeBSD_version 800054 /* Master, propagated to newvers */
#define __FreeBSD_version 800055 /* Master, propagated to newvers */
#ifndef LOCORE
#include <sys/types.h>

View File

@ -55,7 +55,7 @@
* The patch version is incremented for every bug fix.
*/
#define PMC_VERSION_MAJOR 0x03
#define PMC_VERSION_MINOR 0x00
#define PMC_VERSION_MINOR 0x01
#define PMC_VERSION_PATCH 0x0000
#define PMC_VERSION (PMC_VERSION_MAJOR << 24 | \
@ -82,6 +82,7 @@
__PMC_CPU(INTEL_PIV, 0x86, "Intel Pentium IV") \
__PMC_CPU(INTEL_CORE, 0x87, "Intel Core Solo/Duo") \
__PMC_CPU(INTEL_CORE2, 0x88, "Intel Core2") \
__PMC_CPU(INTEL_CORE2EXTREME, 0x89, "Intel Core2 Extreme") \
__PMC_CPU(INTEL_ATOM, 0x8A, "Intel Atom")
enum pmc_cputype {
@ -920,8 +921,8 @@ struct pmc_mdep {
*/
/* per-cpu initialization and finalization */
int (*pmd_pcpu_init)(int _cpu); /* initialization */
int (*pmd_pcpu_fini)(int _cpu); /* finalization */
int (*pmd_pcpu_init)(struct pmc_mdep *_md, int _cpu);
int (*pmd_pcpu_fini)(struct pmc_mdep *_md, int _cpu);
/* thread context switch in/out */
int (*pmd_switch_in)(struct pmc_cpu *_p, struct pmc_process *_pp);
@ -942,7 +943,6 @@ struct pmc_mdep {
*/
extern struct pmc_cpu **pmc_pcpu;
extern struct pmc_mdep *md;
/* driver statistics */
extern struct pmc_op_getdriverstats pmc_stats;

View File

@ -239,7 +239,8 @@ union pmclog_entry { /* only used to size scratch areas */
/*
* Prototypes
*/
int pmclog_configure_log(struct pmc_owner *_po, int _logfd);
int pmclog_configure_log(struct pmc_mdep *_md, struct pmc_owner *_po,
int _logfd);
int pmclog_deconfigure_log(struct pmc_owner *_po);
int pmclog_flush(struct pmc_owner *_po);
void pmclog_initialize(void);