ioat(4): Use memory completion rather than device register
The CHANSTS register is a split 64-bit register on CBDMA units before hardware v3.3. If a torn read happens during ioat_process_events(), software cannot know when to stop completing descriptors correctly. So, just use the device-pushed main memory channel status instead. Remove the ioat_get_active() seatbelt as well. It does nothing if the completion address is valid. Sponsored by: Dell EMC Isilon
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=308070
@ -677,7 +677,7 @@ ioat_process_events(struct ioat_softc *ioat)
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}
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completed = 0;
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comp_update = ioat_get_chansts(ioat);
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comp_update = *ioat->comp_update;
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status = comp_update & IOAT_CHANSTS_COMPLETED_DESCRIPTOR_MASK;
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if (status == ioat->last_seen) {
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@ -691,7 +691,7 @@ ioat_process_events(struct ioat_softc *ioat)
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__func__, ioat->chan_idx, comp_update, ioat->last_seen);
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desc = ioat_get_ring_entry(ioat, ioat->tail - 1);
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while (desc->hw_desc_bus_addr != status && ioat_get_active(ioat) > 0) {
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while (desc->hw_desc_bus_addr != status) {
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desc = ioat_get_ring_entry(ioat, ioat->tail);
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dmadesc = &desc->bus_dmadesc;
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CTR5(KTR_IOAT, "channel=%u completing desc idx %u (%p) ok cb %p(%p)",
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@ -523,6 +523,15 @@ struct ioat_softc {
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void ioat_test_attach(void);
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void ioat_test_detach(void);
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/*
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* XXX DO NOT USE this routine for obtaining the current completed descriptor.
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*
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* The double_4 read on ioat<3.3 appears to result in torn reads. And v3.2
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* hardware is still commonplace (Broadwell Xeon has it). Instead, use the
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* device-pushed *comp_update.
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*
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* It is safe to use ioat_get_chansts() for the low status bits.
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*/
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static inline uint64_t
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ioat_get_chansts(struct ioat_softc *ioat)
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{
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