Add better support for the Ricoh 5C296 and 5C396 chips. These chips
have a slightly different 3.3V support than the other clones, so compensate as best we can. Note: 3.3V support is untested since I do not have any 3.3V cards that I know of to test it with.
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@ -44,9 +44,10 @@
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#define PCIC_VG465 6 /* Vadem 465 */
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#define PCIC_VG468 7 /* Vadem 468 */
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#define PCIC_VG469 8 /* Vadem 469 */
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#define PCIC_RF5C396 9 /* Ricoh RF5C396 */
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#define PCIC_IBM_KING 10 /* IBM KING PCMCIA Controller */
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#define PCIC_I82365SL_DF 11 /* Intel i82365sl-DF step */
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#define PCIC_RF5C296 9 /* Ricoh RF5C296 */
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#define PCIC_RF5C396 10 /* Ricoh RF5C396 */
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#define PCIC_IBM_KING 11 /* IBM KING PCMCIA Controller */
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#define PCIC_I82365SL_DF 12 /* Intel i82365sl-DF step */
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/*
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* Address of the controllers. Each controller can manage
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@ -84,8 +85,10 @@
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#define PCIC_MISC2 0x1e /* PD672x: Misc control register 2 per chip */
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#define PCIC_CLCHIP 0x1f /* PD67xx: Chip I/D */
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#define PCIC_CVSR 0x2f /* Vadem: Voltage select register */
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#define PCIC_RICOH_MCR2 0x2f /* Ricoh: Mode Control Register 2 */
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#define PCIC_VMISC 0x3a /* Vadem: Misc control register */
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#define PCIC_RICOH_ID 0x3a /* Ricoh: ID register */
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#define PCIC_TIME_SETUP0 0x3a
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#define PCIC_TIME_CMD0 0x3b
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@ -241,9 +244,16 @@
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#define PCIC_CVSR_VS_XX 0x02 /* X.XV when available */
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#define PCIC_CVSR_VS_33 0x03 /* 3.3V */
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/* Ricoh: Misc Control Register 2 (PCIC_RICOH_MCR2) */
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#define PCIC_MCR2_VCC_33 0x01 /* 3.3V */
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/* Vadem: misc register (PCIC_VMISC) */
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#define PCIC_VADEMREV 0x40
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/* Ricoh: ID register values (PCIC_RICOH_ID) */
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#define PCIC_RID_296 0x32
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#define PCIC_RID_396 0xb2
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/*
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* Mask of allowable interrupts.
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*
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@ -457,6 +457,10 @@ pcic_power(struct slot *slt)
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pcic_setb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33);
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break;
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}
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if (sc->flags & PCIC_RICOH_POWER) {
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pcic_setb(sp, PCIC_RICOH_MCR2, PCIC_MCR2_VCC_33);
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break;
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}
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/*
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* Technically, The A, B, C stepping didn't support the 3.3V
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@ -480,6 +484,8 @@ pcic_power(struct slot *slt)
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pcic_clrb(sp, PCIC_CVSR, PCIC_CVSR_VS);
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else if (sc->flags & PCIC_PD_POWER)
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pcic_clrb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33);
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else if (sc->flags & PCIC_RICOH_POWER)
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pcic_clrb(sp, PCIC_RICOH_MCR2, PCIC_MCR2_VCC_33);
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break;
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}
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sp->putb(sp, PCIC_POWER, reg);
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@ -66,7 +66,8 @@ static struct {
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{ "Vadem 465", PCIC_VG_POWER},
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{ "Vadem 468", PCIC_VG_POWER},
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{ "Vadem 469", PCIC_VG_POWER},
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{ "Ricoh RF5C396", PCIC_AB_POWER},
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{ "Ricoh RF5C296", PCIC_RICOH_POWER},
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{ "Ricoh RF5C396", PCIC_RICOH_POWER},
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{ "IBM KING", PCIC_KING_POWER},
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{ "Intel i82365SL-DF", PCIC_DF_POWER}
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};
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@ -214,16 +215,17 @@ pcic_isa_probe(device_t dev)
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}
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/*
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* Check for RICOH RF5C396 PCMCIA Controller
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* Check for RICOH RF5C[23]96 PCMCIA Controller
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*/
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c = sp->getb(sp, 0x3a);
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if (c == 0xb2) {
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c = sp->getb(sp, PCIC_RICOH_ID);
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if (c == PCIC_RID_396)
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sp->controller = PCIC_RF5C396;
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}
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else if (c == PCIC_RID_296)
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sp->controller = PCIC_RF5C296;
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break;
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/*
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* Intel i82365D or maybe a vlsi 82c146
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* Intel i82365sl-DF step or maybe a vlsi 82c146
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* we detected the vlsi case earlier, so if the controller
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* isn't set, we know it is a i82365sl step D.
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*/
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@ -49,6 +49,7 @@ struct pcic_softc
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#define PCIC_PD_POWER 0x00000004 /* Uses CL-PD regs */
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#define PCIC_VG_POWER 0x00000008 /* Uses VG power regs */
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#define PCIC_KING_POWER 0x00000010 /* Uses IBM KING regs */
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#define PCIC_RICOH_POWER 0x00000020 /* Uses the ricoh power regs */
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int iorid; /* Rid of I/O region */
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struct resource *iores; /* resource for I/O region */
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int memrid;
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