Add better support for the Ricoh 5C296 and 5C396 chips. These chips

have a slightly different 3.3V support than the other clones, so
compensate as best we can.  Note: 3.3V support is untested since I do
not have any 3.3V cards that I know of to test it with.
This commit is contained in:
imp 2001-05-23 05:06:04 +00:00
parent 4c25d6030e
commit 0d5506445c
4 changed files with 28 additions and 9 deletions

View File

@ -44,9 +44,10 @@
#define PCIC_VG465 6 /* Vadem 465 */
#define PCIC_VG468 7 /* Vadem 468 */
#define PCIC_VG469 8 /* Vadem 469 */
#define PCIC_RF5C396 9 /* Ricoh RF5C396 */
#define PCIC_IBM_KING 10 /* IBM KING PCMCIA Controller */
#define PCIC_I82365SL_DF 11 /* Intel i82365sl-DF step */
#define PCIC_RF5C296 9 /* Ricoh RF5C296 */
#define PCIC_RF5C396 10 /* Ricoh RF5C396 */
#define PCIC_IBM_KING 11 /* IBM KING PCMCIA Controller */
#define PCIC_I82365SL_DF 12 /* Intel i82365sl-DF step */
/*
* Address of the controllers. Each controller can manage
@ -84,8 +85,10 @@
#define PCIC_MISC2 0x1e /* PD672x: Misc control register 2 per chip */
#define PCIC_CLCHIP 0x1f /* PD67xx: Chip I/D */
#define PCIC_CVSR 0x2f /* Vadem: Voltage select register */
#define PCIC_RICOH_MCR2 0x2f /* Ricoh: Mode Control Register 2 */
#define PCIC_VMISC 0x3a /* Vadem: Misc control register */
#define PCIC_RICOH_ID 0x3a /* Ricoh: ID register */
#define PCIC_TIME_SETUP0 0x3a
#define PCIC_TIME_CMD0 0x3b
@ -241,9 +244,16 @@
#define PCIC_CVSR_VS_XX 0x02 /* X.XV when available */
#define PCIC_CVSR_VS_33 0x03 /* 3.3V */
/* Ricoh: Misc Control Register 2 (PCIC_RICOH_MCR2) */
#define PCIC_MCR2_VCC_33 0x01 /* 3.3V */
/* Vadem: misc register (PCIC_VMISC) */
#define PCIC_VADEMREV 0x40
/* Ricoh: ID register values (PCIC_RICOH_ID) */
#define PCIC_RID_296 0x32
#define PCIC_RID_396 0xb2
/*
* Mask of allowable interrupts.
*

View File

@ -457,6 +457,10 @@ pcic_power(struct slot *slt)
pcic_setb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33);
break;
}
if (sc->flags & PCIC_RICOH_POWER) {
pcic_setb(sp, PCIC_RICOH_MCR2, PCIC_MCR2_VCC_33);
break;
}
/*
* Technically, The A, B, C stepping didn't support the 3.3V
@ -480,6 +484,8 @@ pcic_power(struct slot *slt)
pcic_clrb(sp, PCIC_CVSR, PCIC_CVSR_VS);
else if (sc->flags & PCIC_PD_POWER)
pcic_clrb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33);
else if (sc->flags & PCIC_RICOH_POWER)
pcic_clrb(sp, PCIC_RICOH_MCR2, PCIC_MCR2_VCC_33);
break;
}
sp->putb(sp, PCIC_POWER, reg);

View File

@ -66,7 +66,8 @@ static struct {
{ "Vadem 465", PCIC_VG_POWER},
{ "Vadem 468", PCIC_VG_POWER},
{ "Vadem 469", PCIC_VG_POWER},
{ "Ricoh RF5C396", PCIC_AB_POWER},
{ "Ricoh RF5C296", PCIC_RICOH_POWER},
{ "Ricoh RF5C396", PCIC_RICOH_POWER},
{ "IBM KING", PCIC_KING_POWER},
{ "Intel i82365SL-DF", PCIC_DF_POWER}
};
@ -214,16 +215,17 @@ pcic_isa_probe(device_t dev)
}
/*
* Check for RICOH RF5C396 PCMCIA Controller
* Check for RICOH RF5C[23]96 PCMCIA Controller
*/
c = sp->getb(sp, 0x3a);
if (c == 0xb2) {
c = sp->getb(sp, PCIC_RICOH_ID);
if (c == PCIC_RID_396)
sp->controller = PCIC_RF5C396;
}
else if (c == PCIC_RID_296)
sp->controller = PCIC_RF5C296;
break;
/*
* Intel i82365D or maybe a vlsi 82c146
* Intel i82365sl-DF step or maybe a vlsi 82c146
* we detected the vlsi case earlier, so if the controller
* isn't set, we know it is a i82365sl step D.
*/

View File

@ -49,6 +49,7 @@ struct pcic_softc
#define PCIC_PD_POWER 0x00000004 /* Uses CL-PD regs */
#define PCIC_VG_POWER 0x00000008 /* Uses VG power regs */
#define PCIC_KING_POWER 0x00000010 /* Uses IBM KING regs */
#define PCIC_RICOH_POWER 0x00000020 /* Uses the ricoh power regs */
int iorid; /* Rid of I/O region */
struct resource *iores; /* resource for I/O region */
int memrid;