From 0e6b06d5c8719597b2ec59e6856b5decbd9e65f6 Mon Sep 17 00:00:00 2001 From: Konstantin Belousov Date: Tue, 14 Dec 2021 01:25:36 +0200 Subject: [PATCH] x86: add a comment providing source for numbers in legacy XSAVE area layout Suggested by: Michael Pratt Reviewed by: Michael Pratt , emaste Sponsored by: The FreeBSD Foundation MFC after: 3 days Differential revision: https://reviews.freebsd.org/D33423 --- sys/amd64/amd64/fpu.c | 3 ++- sys/i386/i386/npx.c | 5 ++++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/sys/amd64/amd64/fpu.c b/sys/amd64/amd64/fpu.c index daf079b7d2cc..9b23cc5773a3 100644 --- a/sys/amd64/amd64/fpu.c +++ b/sys/amd64/amd64/fpu.c @@ -472,7 +472,8 @@ fpuinitstate(void *arg __unused) /* * Create a table describing the layout of the CPU Extended - * Save Area. + * Save Area. See Intel SDM rev. 075 Vol. 1 13.4.1 "Legacy + * Region of an XSAVE Area" for the source of offsets/sizes. */ if (use_xsave) { xstate_bv = (uint64_t *)((char *)(fpu_initialstate + 1) + diff --git a/sys/i386/i386/npx.c b/sys/i386/i386/npx.c index 4767d8896de9..dc04d84b0eb5 100644 --- a/sys/i386/i386/npx.c +++ b/sys/i386/i386/npx.c @@ -527,7 +527,10 @@ npxinitstate(void *arg __unused) /* * Create a table describing the layout of the CPU Extended - * Save Area. + * Save Area. See Intel SDM rev. 075 Vol. 1 13.4.1 "Legacy + * Region of an XSAVE Area" for the source of offsets/sizes. + * Note that 32bit XSAVE does not use %xmm8-%xmm15, see + * 10.5.1.2 and 13.5.2 "SSE State". */ if (use_xsave) { xstate_bv = (uint64_t *)((char *)(npx_initialstate + 1) +