iwn(4) update. Notable changes:

* new firmware
* untested support for 1000 and 6000 series
* bgscan support
* remove unnecessary RXON changes
* allow setting of country/regdomain by enforcing channel flags read
  from the EEPROM
* suspend/resume fixes
* RF kill switch fixes
* LED adjustments
* several bus_dma*() related fixes
* addressed some LORs
* many other bug fixes

Submitted by:	Bernhard Schmidt <bschmidt at techwires.net>
Obtained from:	Brandon Gooch <jamesbrandongooch at gmail dot com> (LED
		related changes), Benjamin Kaduk <kaduk at mit dot edu>
		(LOR fixes), OpenBSD
This commit is contained in:
Rui Paulo 2009-12-29 19:47:34 +00:00
parent d439b6c223
commit 0f454b93f8
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=201209
15 changed files with 25137 additions and 10147 deletions

View File

@ -1082,6 +1082,20 @@ iwi_monitor.fw optional iwimonitorfw | iwifw \
no-obj no-implicit-rule \
clean "iwi_monitor.fw"
dev/iwn/if_iwn.c optional iwn
iwn1000fw.c optional iwn1000fw | iwnfw \
compile-with "${AWK} -f $S/tools/fw_stub.awk iwn1000.fw:iwn1000fw -miwn1000fw -c${.TARGET}" \
no-implicit-rule before-depend local \
clean "iwn1000fw.c"
iwn1000fw.fwo optional iwn1000fw | iwnfw \
dependency "iwn1000.fw" \
compile-with "${LD} -b binary -d -warn-common -r -d -o ${.TARGET} iwn1000.fw" \
no-implicit-rule \
clean "iwn1000fw.fwo"
iwn1000.fw optional iwn1000fw | iwnfw \
dependency ".PHONY" \
compile-with "uudecode -o ${.TARGET} $S/contrib/dev/iwn/iwlwifi-1000-128.50.3.1.fw.uu" \
no-obj no-implicit-rule \
clean "iwn1000.fw"
iwn4965fw.c optional iwn4965fw | iwnfw \
compile-with "${AWK} -f $S/tools/fw_stub.awk iwn4965.fw:iwn4965fw -miwn4965fw -c${.TARGET}" \
no-implicit-rule before-depend local \
@ -1093,7 +1107,7 @@ iwn4965fw.fwo optional iwn4965fw | iwnfw \
clean "iwn4965fw.fwo"
iwn4965.fw optional iwn4965fw | iwnfw \
dependency ".PHONY" \
compile-with "uudecode -o ${.TARGET} $S/contrib/dev/iwn/iwlwifi-4965-228.57.2.23.fw.uu" \
compile-with "uudecode -o ${.TARGET} $S/contrib/dev/iwn/iwlwifi-4965-228.61.2.24.fw.uu" \
no-obj no-implicit-rule \
clean "iwn4965.fw"
iwn5000fw.c optional iwn5000fw | iwnfw \
@ -1107,7 +1121,7 @@ iwn5000fw.fwo optional iwn5000fw | iwnfw \
clean "iwn5000fw.fwo"
iwn5000.fw optional iwn5000fw | iwnfw \
dependency ".PHONY" \
compile-with "uudecode -o ${.TARGET} $S/contrib/dev/iwn/iwlwifi-5000-5.4.A.11.fw.uu" \
compile-with "uudecode -o ${.TARGET} $S/contrib/dev/iwn/iwlwifi-5000-8.24.2.12.fw.uu" \
no-obj no-implicit-rule \
clean "iwn5000.fw"
iwn5150fw.c optional iwn5150fw | iwnfw \
@ -1124,6 +1138,20 @@ iwn5150.fw optional iwn5150fw | iwnfw \
compile-with "uudecode -o ${.TARGET} $S/contrib/dev/iwn/iwlwifi-5150-8.24.2.2.fw.uu" \
no-obj no-implicit-rule \
clean "iwn5150.fw"
iwn6000fw.c optional iwn6000fw | iwnfw \
compile-with "${AWK} -f $S/tools/fw_stub.awk iwn6000.fw:iwn6000fw -miwn6000fw -c${.TARGET}" \
no-implicit-rule before-depend local \
clean "iwn6000fw.c"
iwn6000fw.fwo optional iwn6000fw | iwnfw \
dependency "iwn6000.fw" \
compile-with "${LD} -b binary -d -warn-common -r -d -o ${.TARGET} iwn6000.fw" \
no-implicit-rule \
clean "iwn6000fw.fwo"
iwn6000.fw optional iwn6000fw | iwnfw \
dependency ".PHONY" \
compile-with "uudecode -o ${.TARGET} $S/contrib/dev/iwn/iwlwifi-6000-9.176.4.1.fw.uu" \
no-obj no-implicit-rule \
clean "iwn6000.fw"
dev/ixgb/if_ixgb.c optional ixgb
dev/ixgb/ixgb_ee.c optional ixgb
dev/ixgb/ixgb_hw.c optional ixgb

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@ -1,5 +1,5 @@
/* $FreeBSD$ */
/* $OpenBSD: if_iwnreg.h,v 1.26 2009/05/29 08:25:45 damien Exp $ */
/* $OpenBSD: if_iwnreg.h,v 1.34 2009/11/08 11:54:48 damien Exp $ */
/*-
* Copyright (c) 2007, 2008
@ -18,8 +18,6 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#define EDCA_NUM_AC 4
#define IWN_TX_RING_COUNT 256
#define IWN_TX_RING_LOMARK 192
#define IWN_TX_RING_HIMARK 224
@ -34,6 +32,9 @@
#define IWN_SRVC_DMACHNL 9
#define IWN_ICT_SIZE 4096
#define IWN_ICT_COUNT (IWN_ICT_SIZE / sizeof (uint32_t))
/* Maximum number of DMA segments for TX. */
#define IWN_MAX_SCATTER 20
@ -57,8 +58,9 @@
*/
#define IWN_HW_IF_CONFIG 0x000
#define IWN_INT_COALESCING 0x004
#define IWN_INT_PERIODIC 0x005 /* use IWN_WRITE_1 */
#define IWN_INT 0x008
#define IWN_MASK 0x00c
#define IWN_INT_MASK 0x00c
#define IWN_FH_INT 0x010
#define IWN_RESET 0x020
#define IWN_GP_CNTRL 0x024
@ -67,19 +69,23 @@
#define IWN_EEPROM_GP 0x030
#define IWN_OTP_GP 0x034
#define IWN_GIO 0x03c
#define IWN_GP_DRIVER 0x050
#define IWN_UCODE_GP1_CLR 0x05c
#define IWN_LED 0x094
#define IWN_DRAM_INT_TBL 0x0a0
#define IWN_GIO_CHICKEN 0x100
#define IWN_ANA_PLL 0x20c
#define IWN_HW_REV_WA 0x22c
#define IWN_DBG_HPET_MEM 0x240
#define IWN_DBG_LINK_PWR_MGMT 0x250
#define IWN_MEM_RADDR 0x40c
#define IWN_MEM_WADDR 0x410
#define IWN_MEM_WDATA 0x418
#define IWN_MEM_RDATA 0x41c
#define IWN_PRPH_WADDR 0x444
#define IWN_PRPH_RADDR 0x448
#define IWN_PRPH_WDATA 0x44c
#define IWN_PRPH_RDATA 0x450
#define IWN_PRPH_WADDR 0x444
#define IWN_PRPH_RADDR 0x448
#define IWN_PRPH_WDATA 0x44c
#define IWN_PRPH_RDATA 0x450
#define IWN_HBUS_TARG_WRPTR 0x460
/*
@ -134,10 +140,12 @@
/*
* NIC internal memory offsets.
*/
#define IWN_CLOCK_CTL 0x3000
#define IWN_APMG_CLK_CTRL 0x3004
#define IWN_APMG_CLK_CTRL 0x3000
#define IWN_APMG_CLK_EN 0x3004
#define IWN_APMG_CLK_DIS 0x3008
#define IWN_APMG_PS 0x300c
#define IWN_APMG_DIGITAL_SVR 0x3058
#define IWN_APMG_ANALOG_SVR 0x306c
#define IWN_APMG_PCI_STT 0x3010
#define IWN_BSM_WR_CTRL 0x3400
#define IWN_BSM_WR_MEM_SRC 0x3404
@ -149,9 +157,6 @@
#define IWN_BSM_DRAM_DATA_SIZE 0x349c
#define IWN_BSM_SRAM_BASE 0x3800
/* Possible values for IWN_APMG_CLK_DIS. */
#define IWN_APMG_CLK_DMA_RQT (1 << 9)
/* Possible flags for register IWN_HW_IF_CONFIG. */
#define IWN_HW_IF_CONFIG_4965_R (1 << 4)
#define IWN_HW_IF_CONFIG_MAC_SI (1 << 8)
@ -162,6 +167,10 @@
#define IWN_HW_IF_CONFIG_PREPARE_DONE (1 << 25)
#define IWN_HW_IF_CONFIG_PREPARE (1 << 27)
/* Possible values for register IWN_INT_PERIODIC. */
#define IWN_INT_PERIODIC_DIS 0x00
#define IWN_INT_PERIODIC_ENA 0xff
/* Possible flags for registers IWN_PRPH_RADDR/IWN_PRPH_WADDR. */
#define IWN_PRPH_DWORD ((sizeof (uint32_t) - 1) << 24)
@ -174,6 +183,7 @@
#define IWN_RESET_SW (1 << 7)
#define IWN_RESET_MASTER_DISABLED (1 << 8)
#define IWN_RESET_STOP_MASTER (1 << 9)
#define IWN_RESET_LINK_PWR_MGMT_DIS (1 << 31)
/* Possible flags for register IWN_GP_CNTRL. */
#define IWN_GP_CNTRL_MAC_ACCESS_ENA (1 << 0)
@ -202,6 +212,11 @@
/* Possible flags for register IWN_GIO. */
#define IWN_GIO_L0S_ENA (1 << 1)
/* Possible flags for register IWN_GP_DRIVER. */
#define IWN_GP_DRIVER_RADIO_3X3_HYB (0 << 0)
#define IWN_GP_DRIVER_RADIO_2X2_HYB (1 << 0)
#define IWN_GP_DRIVER_RADIO_2X2_IPA (2 << 0)
/* Possible flags for register IWN_UCODE_GP1_CLR. */
#define IWN_UCODE_GP1_RFKILL (1 << 1)
#define IWN_UCODE_GP1_CMD_BLOCKED (1 << 2)
@ -212,6 +227,10 @@
#define IWN_LED_OFF 0x00000038
#define IWN_LED_ON 0x00000078
/* Possible flags for register IWN_DRAM_INT_TBL. */
#define IWN_DRAM_INT_TBL_WRAP_CHECK (1 << 27)
#define IWN_DRAM_INT_TBL_ENABLE (1 << 31)
/* Possible values for register IWN_ANA_PLL. */
#define IWN_ANA_PLL_INIT 0x00880300
@ -229,12 +248,14 @@
#define IWN_INT_CT_REACHED (1 << 6)
#define IWN_INT_RF_TOGGLED (1 << 7)
#define IWN_INT_SW_ERR (1 << 25)
#define IWN_INT_SCHED (1 << 26)
#define IWN_INT_FH_TX (1 << 27)
#define IWN_INT_RX_PERIODIC (1 << 28)
#define IWN_INT_HW_ERR (1 << 29)
#define IWN_INT_FH_RX (1 << 31)
/* Shortcut. */
#define IWN_INT_MASK \
#define IWN_INT_MASK_DEF \
(IWN_INT_SW_ERR | IWN_INT_HW_ERR | IWN_INT_FH_TX | \
IWN_INT_FH_RX | IWN_INT_ALIVE | IWN_INT_WAKEUP | \
IWN_INT_SW_RX | IWN_INT_CT_REACHED | IWN_INT_RF_TOGGLED)
@ -301,7 +322,7 @@
#define IWN5000_TXQ_STATUS_INACTIVE 0x00ff0010
#define IWN5000_TXQ_STATUS_CHGACT (1 << 19)
/* Possible flags for register IWN_APMG_CLK_CTRL. */
/* Possible flags for registers IWN_APMG_CLK_*. */
#define IWN_APMG_CLK_CTRL_DMA_CLK_RQT (1 << 9)
#define IWN_APMG_CLK_CTRL_BSM_CLK_RQT (1 << 11)
@ -313,6 +334,13 @@
#define IWN_APMG_PS_PWR_SRC_MASK IWN_APMG_PS_PWR_SRC(3)
#define IWN_APMG_PS_RESET_REQ (1 << 26)
/* Possible flags for register IWN_APMG_DIGITAL_SVR. */
#define IWN_APMG_DIGITAL_SVR_VOLTAGE(x) (((x) & 0xf) << 5)
#define IWN_APMG_DIGITAL_SVR_VOLTAGE_MASK \
IWN_APMG_DIGITAL_SVR_VOLTAGE(0xf)
#define IWN_APMG_DIGITAL_SVR_VOLTAGE_1_32 \
IWN_APMG_DIGITAL_SVR_VOLTAGE(3)
/* Possible flags for IWN_APMG_PCI_STT. */
#define IWN_APMG_PCI_STT_L1A_DIS (1 << 11)
@ -362,6 +390,7 @@ struct iwn_rx_desc {
#define IWN_RX_PHY 192
#define IWN_MPDU_RX_DONE 193
#define IWN_RX_DONE 195
#define IWN_RX_COMPRESSED_BA 197
uint8_t flags;
uint8_t idx;
@ -382,8 +411,8 @@ struct iwn_rx_desc {
struct iwn_tx_cmd {
uint8_t code;
#define IWN_CMD_CONFIGURE 16
#define IWN_CMD_ASSOCIATE 17
#define IWN_CMD_RXON 16
#define IWN_CMD_RXON_ASSOC 17
#define IWN_CMD_EDCA_PARAMS 19
#define IWN_CMD_TIMING 20
#define IWN_CMD_ADD_NODE 24
@ -394,8 +423,9 @@ struct iwn_tx_cmd {
#define IWN5000_CMD_CALIB_CONFIG 101
#define IWN_CMD_SET_POWER_MODE 119
#define IWN_CMD_SCAN 128
#define IWN_CMD_TXPOWER_DBM 149
#define IWN_CMD_TXPOWER 151
#define IWN_CMD_TXPOWER_DBM 152
#define IWN5000_CMD_TX_ANT_CONFIG 152
#define IWN_CMD_BT_COEX 155
#define IWN_CMD_GET_STATISTICS 156
#define IWN_CMD_SET_CRITICAL_TEMP 164
@ -412,10 +442,12 @@ struct iwn_tx_cmd {
#define IWN_ANT_A (1 << 0)
#define IWN_ANT_B (1 << 1)
#define IWN_ANT_C (1 << 2)
/* Shortcut. */
/* Shortcuts. */
#define IWN_ANT_AB (IWN_ANT_A | IWN_ANT_B)
#define IWN_ANT_BC (IWN_ANT_B | IWN_ANT_C)
#define IWN_ANT_ABC (IWN_ANT_A | IWN_ANT_B | IWN_ANT_C)
/* Structure for command IWN_CMD_CONFIGURE. */
/* Structure for command IWN_CMD_RXON. */
struct iwn_rxon {
uint8_t myaddr[IEEE80211_ADDR_LEN];
uint16_t reserved1;
@ -431,10 +463,10 @@ struct iwn_rxon {
uint8_t air;
uint16_t rxchain;
#define IWN_RXCHAIN_FORCE (1 << 0)
#define IWN_RXCHAIN_VALID(x) ((x) << 1)
#define IWN_RXCHAIN_SEL(x) ((x) << 4)
#define IWN_RXCHAIN_MIMO(x) ((x) << 7)
#define IWN_RXCHAIN_DRIVER_FORCE (1 << 0)
#define IWN_RXCHAIN_VALID(x) (((x) & IWN_ANT_ABC) << 1)
#define IWN_RXCHAIN_FORCE_SEL(x) (((x) & IWN_ANT_ABC) << 4)
#define IWN_RXCHAIN_FORCE_MIMO_SEL(x) (((x) & IWN_ANT_ABC) << 7)
#define IWN_RXCHAIN_IDLE_COUNT(x) ((x) << 10)
#define IWN_RXCHAIN_MIMO_COUNT(x) ((x) << 12)
#define IWN_RXCHAIN_MIMO_FORCE (1 << 14)
@ -443,23 +475,16 @@ struct iwn_rxon {
uint8_t cck_mask;
uint16_t associd;
uint32_t flags;
#define IWN_RXON_24GHZ 0x00000001 /* band */
#define IWN_RXON_CCK 0x00000002 /* modulation */
#define IWN_RXON_AUTO 0x00000004 /* 2.4-only auto-detect */
#define IWN_RXON_HTPROT 0x00000008 /* xmit with HT protection */
#define IWN_RXON_SHSLOT 0x00000010 /* short slot time */
#define IWN_RXON_SHPREAMBLE 0x00000020 /* short premable */
#define IWN_RXON_NODIVERSITY 0x00000080 /* disable antenna diversity */
#define IWN_RXON_ANTENNA_A 0x00000100
#define IWN_RXON_ANTENNA_B 0x00000200
#define IWN_RXON_RADAR 0x00001000 /* enable radar detect */
#define IWN_RXON_NARROW 0x00002000 /* MKK narrow band select */
#define IWN_RXON_TSF 0x00008000
#define IWN_RXON_HT 0x06400000
#define IWN_RXON_HT20 0x02000000
#define IWN_RXON_HT40U 0x04000000
#define IWN_RXON_HT40D 0x04400000
#define IWN_RXON_CTS_TO_SELF 0x40000000
#define IWN_RXON_24GHZ (1 << 0)
#define IWN_RXON_CCK (1 << 1)
#define IWN_RXON_AUTO (1 << 2)
#define IWN_RXON_SHSLOT (1 << 4)
#define IWN_RXON_SHPREAMBLE (1 << 5)
#define IWN_RXON_NODIVERSITY (1 << 7)
#define IWN_RXON_ANTENNA_A (1 << 8)
#define IWN_RXON_ANTENNA_B (1 << 9)
#define IWN_RXON_TSF (1 << 15)
#define IWN_RXON_CTS_TO_SELF (1 << 30)
uint32_t filter;
#define IWN_FILTER_PROMISC (1 << 0)
@ -473,7 +498,7 @@ struct iwn_rxon {
uint8_t reserved4;
uint8_t ht_single_mask;
uint8_t ht_dual_mask;
/* The following fields are for 5000 Series only. */
/* The following fields are for >=5000 Series only. */
uint8_t ht_triple_mask;
uint8_t reserved5;
uint16_t acquisition;
@ -504,7 +529,7 @@ struct iwn_edca_params {
uint8_t aifsn;
uint8_t reserved;
uint16_t txoplimit;
} __packed ac[EDCA_NUM_AC];
} __packed ac[WME_NUM_AC];
} __packed;
/* Structure for command IWN_CMD_TIMING. */
@ -595,12 +620,7 @@ struct iwn4965_node_info {
uint32_t reserved7;
} __packed;
#define IWN_RFLAG_HT (1 << 0) /* use HT modulation */
#define IWN_RFLAG_CCK (1 << 1) /* use CCK modulation */
#define IWN_RFLAG_HT40 (1 << 3) /* use dual-stream */
#define IWN_RFLAG_SGI (1 << 5) /* use short GI */
#define IWN_RFLAG_ANT_A (1 << 6) /* start on antenna port A */
#define IWN_RFLAG_ANT_B (1 << 7) /* start on antenna port B */
#define IWN_RFLAG_CCK (1 << 1)
#define IWN_RFLAG_ANT(x) ((x) << 6)
/* Structure for command IWN_CMD_TX_DATA. */
@ -660,7 +680,7 @@ struct iwn_cmd_link_quality {
uint8_t mimo;
uint8_t antmsk_1stream;
uint8_t antmsk_2stream;
uint8_t ridx[EDCA_NUM_AC];
uint8_t ridx[WME_NUM_AC];
uint16_t ampdu_limit;
uint8_t ampdu_threshold;
uint8_t ampdu_max;
@ -688,7 +708,12 @@ struct iwn_cmd_led {
/* Structure for command IWN5000_CMD_WIMAX_COEX. */
struct iwn5000_wimax_coex {
uint32_t flags;
struct {
#define IWN_WIMAX_COEX_STA_TABLE_VALID (1 << 0)
#define IWN_WIMAX_COEX_UNASSOC_WA_UNMASK (1 << 2)
#define IWN_WIMAX_COEX_ASSOC_WA_UNMASK (1 << 3)
#define IWN_WIMAX_COEX_ENABLE (1 << 7)
struct iwn5000_wimax_event {
uint8_t request;
uint8_t window;
uint8_t reserved;
@ -804,11 +829,20 @@ struct iwn5000_cmd_txpower {
/* Structure for command IWN_CMD_BLUETOOTH. */
struct iwn_bluetooth {
uint8_t flags;
uint8_t lead;
uint8_t kill;
#define IWN_BT_COEX_DISABLE 0
#define IWN_BT_COEX_MODE_2WIRE 1
#define IWN_BT_COEX_MODE_3WIRE 2
#define IWN_BT_COEX_MODE_4WIRE 3
uint8_t lead_time;
#define IWN_BT_LEAD_TIME_DEF 30
uint8_t max_kill;
#define IWN_BT_MAX_KILL_DEF 5
uint8_t reserved;
uint32_t ack;
uint32_t cts;
uint32_t kill_ack;
uint32_t kill_cts;
} __packed;
/* Structure for command IWN_CMD_SET_CRITICAL_TEMP. */
@ -850,7 +884,7 @@ struct iwn_phy_calib {
#define IWN5000_PHY_CALIB_TX_IQ 11
#define IWN5000_PHY_CALIB_CRYSTAL 15
#define IWN5000_PHY_CALIB_BASE_BAND 16
#define IWN5000_PHY_CALIB_TX_IQ_PERD 17
#define IWN5000_PHY_CALIB_TX_IQ_PERIODIC 17
#define IWN5000_PHY_CALIB_RESET_NOISE_GAIN 18
#define IWN5000_PHY_CALIB_NOISE_GAIN 19
@ -946,9 +980,9 @@ struct iwn_ucode_info {
struct iwn4965_tx_stat {
uint8_t nframes;
uint8_t killcnt;
uint8_t rtscnt;
uint8_t retrycnt;
uint8_t btkillcnt;
uint8_t rtsfailcnt;
uint8_t ackfailcnt;
uint8_t rate;
uint8_t rflags;
uint16_t xrflags;
@ -960,9 +994,9 @@ struct iwn4965_tx_stat {
struct iwn5000_tx_stat {
uint8_t nframes;
uint8_t killcnt;
uint8_t rtscnt;
uint8_t retrycnt;
uint8_t btkillcnt;
uint8_t rtsfailcnt;
uint8_t ackfailcnt;
uint8_t rate;
uint8_t rflags;
uint16_t xrflags;
@ -972,7 +1006,9 @@ struct iwn5000_tx_stat {
uint32_t info;
uint16_t seq;
uint16_t len;
uint32_t tlc;
uint8_t tlc;
uint8_t ratid;
uint8_t fc[2];
uint16_t status;
uint16_t sequence;
} __packed;
@ -1027,6 +1063,18 @@ struct iwn_rx_stat {
#define IWN_RSSI_TO_DBM 44
/* Structure for IWN_RX_COMPRESSED_BA notification. */
struct iwn_compressed_ba {
uint8_t macaddr[IEEE80211_ADDR_LEN];
uint16_t reserved;
uint8_t id;
uint8_t tid;
uint16_t seq;
uint64_t bitmap;
uint16_t qid;
uint16_t ssn;
} __packed;
/* Structure for IWN_START_SCAN notification. */
struct iwn_start_scan {
uint64_t tstamp;
@ -1078,7 +1126,7 @@ struct iwn_spectrum_notif {
#define IWN_MEASUREMENT_FAILED 8
} __packed;
/* Structure for IWN_{RX,BEACON}_STATISTICS notification. */
/* Structures for IWN_{RX,BEACON}_STATISTICS notification. */
struct iwn_rx_phy_stats {
uint32_t ina;
uint32_t fina;
@ -1208,16 +1256,6 @@ struct iwn_fw_dump {
uint32_t time[2];
} __packed;
/* Firmware image file header. */
struct iwn_firmware_hdr {
uint32_t version;
uint32_t main_textsz;
uint32_t main_datasz;
uint32_t init_textsz;
uint32_t init_datasz;
uint32_t boot_textsz;
} __packed;
#define IWN4965_FW_TEXT_MAXSZ ( 96 * 1024)
#define IWN4965_FW_DATA_MAXSZ ( 40 * 1024)
#define IWN5000_FW_TEXT_MAXSZ (256 * 1024)
@ -1226,6 +1264,8 @@ struct iwn_firmware_hdr {
#define IWN4965_FWSZ (IWN4965_FW_TEXT_MAXSZ + IWN4965_FW_DATA_MAXSZ)
#define IWN5000_FWSZ IWN5000_FW_TEXT_MAXSZ
#define IWN_FW_API(x) (((x) >> 8) & 0xff)
/*
* Offsets into EEPROM.
*/
@ -1253,6 +1293,7 @@ struct iwn_firmware_hdr {
#define IWN5000_EEPROM_BAND5 0x03a
#define IWN5000_EEPROM_BAND6 0x041
#define IWN5000_EEPROM_BAND7 0x049
#define IWN6000_EEPROM_ENHINFO 0x054
#define IWN5000_EEPROM_CRYSTAL 0x128
#define IWN5000_EEPROM_TEMP 0x12a
#define IWN5000_EEPROM_VOLT 0x12b
@ -1270,12 +1311,18 @@ struct iwn_eeprom_chan {
#define IWN_EEPROM_CHAN_IBSS (1 << 1)
#define IWN_EEPROM_CHAN_ACTIVE (1 << 3)
#define IWN_EEPROM_CHAN_RADAR (1 << 4)
#define IWN_EEPROM_CHAN_WIDE (1 << 5) /* HT40 */
#define IWN_EEPROM_CHAN_NARROW (1 << 6) /* HT20 */
int8_t maxpwr;
} __packed;
struct iwn_eeprom_enhinfo {
uint16_t chan;
int8_t chain[3]; /* max power in half-dBm */
uint8_t reserved;
int8_t mimo2; /* max power in half-dBm */
int8_t mimo3; /* max power in half-dBm */
} __packed;
#define IWN_NSAMPLES 3
struct iwn4965_eeprom_chan_samples {
uint8_t num;
@ -1336,7 +1383,9 @@ static const struct iwn_chan_band {
{ 11, { 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157 } }
};
#define IWN_RIDX_MCS 0x08 /* or'd to indicate MCS */
#define IWN1000_OTP_NBLOCKS 3
#define IWN6000_OTP_NBLOCKS 4
#define IWN6050_OTP_NBLOCKS 7
/* HW rate indices. */
#define IWN_RIDX_CCK1 0
@ -1489,7 +1538,7 @@ struct iwn_sensitivity_limits {
*/
static const struct iwn_sensitivity_limits iwn4965_sensitivity_limits = {
105, 140,
170, 210,
220, 270,
85, 120,
170, 210,
125, 200,
@ -1511,11 +1560,55 @@ static const struct iwn_sensitivity_limits iwn5000_sensitivity_limits = {
95
};
static const struct iwn_sensitivity_limits iwn5150_sensitivity_limits = {
105, 105, /* min = max for performance bug in DSP. */
220, 220, /* min = max for performance bug in DSP. */
90, 120,
170, 210,
125, 200,
170, 400,
95,
95,
95
};
static const struct iwn_sensitivity_limits iwn6000_sensitivity_limits = {
105, 145,
192, 232,
80, 145,
128, 232,
125, 175,
160, 310,
97,
97,
100
};
/* Map TID to TX scheduler's FIFO. */
static const uint8_t iwn_tid2fifo[] = {
1, 0, 0, 1, 2, 2, 3, 3, 7, 7, 7, 7, 7, 7, 7, 7, 3
};
/* WiFi/WiMAX coexist event priority table for 6050. */
static const struct iwn5000_wimax_event iwn6050_wimax_events[] = {
{ 0x04, 0x03, 0x00, 0x00 },
{ 0x04, 0x03, 0x00, 0x03 },
{ 0x04, 0x03, 0x00, 0x03 },
{ 0x04, 0x03, 0x00, 0x03 },
{ 0x04, 0x03, 0x00, 0x00 },
{ 0x04, 0x03, 0x00, 0x07 },
{ 0x04, 0x03, 0x00, 0x00 },
{ 0x04, 0x03, 0x00, 0x03 },
{ 0x04, 0x03, 0x00, 0x03 },
{ 0x04, 0x03, 0x00, 0x00 },
{ 0x06, 0x03, 0x00, 0x07 },
{ 0x04, 0x03, 0x00, 0x00 },
{ 0x06, 0x06, 0x00, 0x03 },
{ 0x04, 0x03, 0x00, 0x07 },
{ 0x04, 0x03, 0x00, 0x00 },
{ 0x04, 0x03, 0x00, 0x00 }
};
/* Firmware errors. */
static const char * const iwn_fw_errmsg[] = {
"OK",
@ -1558,8 +1651,19 @@ static const char * const iwn_fw_errmsg[] = {
#define IWN_WRITE(sc, reg, val) \
bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
#define IWN_WRITE_1(sc, reg, val) \
bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
#define IWN_SETBITS(sc, reg, mask) \
IWN_WRITE(sc, reg, IWN_READ(sc, reg) | (mask))
#define IWN_CLRBITS(sc, reg, mask) \
IWN_WRITE(sc, reg, IWN_READ(sc, reg) & ~(mask))
#define IWN_BARRIER_WRITE(sc) \
bus_space_barrier((sc)->sc_st, (sc)->sc_sh, 0, (sc)->sc_sz, \
BUS_SPACE_BARRIER_WRITE)
#define IWN_BARRIER_READ_WRITE(sc) \
bus_space_barrier((sc)->sc_st, (sc)->sc_sh, 0, (sc)->sc_sz, \
BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)

View File

@ -1,5 +1,5 @@
/* $FreeBSD$ */
/* $OpenBSD: if_iwnvar.h,v 1.12 2009/05/29 08:25:45 damien Exp $ */
/* $OpenBSD: if_iwnvar.h,v 1.16 2009/11/04 17:46:52 damien Exp $ */
/*-
* Copyright (c) 2007, 2008
@ -74,6 +74,7 @@ struct iwn_tx_ring {
struct iwn_tx_desc *desc;
struct iwn_tx_cmd *cmd;
struct iwn_tx_data data[IWN_TX_RING_COUNT];
bus_dma_tag_t data_dmat;
int qid;
int queued;
int cur;
@ -92,13 +93,12 @@ struct iwn_rx_ring {
uint32_t *desc;
struct iwn_rx_status *stat;
struct iwn_rx_data data[IWN_RX_RING_COUNT];
bus_dma_tag_t data_dmat;
int cur;
};
struct iwn_node {
struct ieee80211_node ni; /* must be the first */
#define IWN_NODE(_ni) ((struct iwn_node *)(_ni))
struct ieee80211_amrr_node amn;
uint16_t disable_tid;
uint8_t id;
@ -161,21 +161,24 @@ struct iwn_hal {
int (*load_firmware)(struct iwn_softc *);
void (*read_eeprom)(struct iwn_softc *);
int (*post_alive)(struct iwn_softc *);
int (*apm_init)(struct iwn_softc *);
int (*nic_config)(struct iwn_softc *);
void (*update_sched)(struct iwn_softc *, int, int, uint8_t,
uint16_t);
int (*get_temperature)(struct iwn_softc *);
int (*get_rssi)(struct iwn_softc *, struct iwn_rx_stat *);
int (*set_txpower)(struct iwn_softc *,
struct ieee80211_channel *, int);
int (*set_txpower)(struct iwn_softc *, int);
int (*init_gains)(struct iwn_softc *);
int (*set_gains)(struct iwn_softc *);
int (*add_node)(struct iwn_softc *, struct iwn_node_info *,
int);
void (*tx_done)(struct iwn_softc *, struct iwn_rx_desc *,
struct iwn_rx_data *);
const struct iwn_sensitivity_limits *limits;
#if 0 /* HT */
void (*ampdu_tx_start)(struct iwn_softc *,
struct ieee80211_node *, uint8_t, uint16_t);
void (*ampdu_tx_stop)(struct iwn_softc *, uint8_t,
uint16_t);
#endif
int ntxqs;
int ndmachnls;
uint8_t broadcast_id;
@ -202,7 +205,7 @@ struct iwn_softc {
struct ifnet *sc_ifp;
int sc_debug;
/* locks */
/* Locks */
struct mtx sc_mtx;
/* Bus */
@ -215,11 +218,15 @@ struct iwn_softc {
u_int sc_flags;
#define IWN_FLAG_HAS_5GHZ (1 << 0)
#define IWN_FLAG_HAS_OTPROM (1 << 1)
#define IWN_FLAG_FIRST_BOOT (1 << 2)
#define IWN_FLAG_CALIB_DONE (1 << 2)
#define IWN_FLAG_USE_ICT (1 << 3)
#define IWN_FLAG_INTERNAL_PA (1 << 4)
uint8_t hw_type;
const struct iwn_hal *sc_hal;
const char *fwname;
const struct iwn_sensitivity_limits
*limits;
/* TX scheduler rings. */
struct iwn_dma_info sched_dma;
@ -235,6 +242,11 @@ struct iwn_softc {
/* Firmware DMA transfer. */
struct iwn_dma_info fw_dma;
/* ICT table. */
struct iwn_dma_info ict_dma;
uint32_t *ict;
int ict_cur;
/* TX/RX rings. */
struct iwn_tx_ring txq[IWN5000_NTXQUEUES];
struct iwn_rx_ring rxq;
@ -249,7 +261,7 @@ struct iwn_softc {
struct task sc_reinit_task;
struct task sc_radioon_task;
struct task sc_radiooff_task;
int calib_cnt;
struct iwn_calib_state calib;
@ -266,8 +278,10 @@ struct iwn_softc {
int noise;
uint32_t qfullmsk;
uint32_t prom_base;
struct iwn4965_eeprom_band
bands[IWN_NBANDS];
struct iwn_eeprom_chan eeprom_channels[IWN_NBANDS][IWN_MAX_CHAN_PER_BAND];
uint16_t rfcfg;
char eeprom_domain[4];
uint32_t eeprom_crystal;
@ -275,20 +289,21 @@ struct iwn_softc {
int8_t maxpwr2GHz;
int8_t maxpwr5GHz;
int8_t maxpwr[IEEE80211_CHAN_MAX];
int8_t enh_maxpwr[35];
uint32_t critical_temp;
int32_t temp_off;
uint32_t int_mask;
uint8_t ntxchains;
uint8_t nrxchains;
uint8_t txantmsk;
uint8_t rxantmsk;
uint8_t antmsk;
uint8_t txchainmask;
uint8_t rxchainmask;
uint8_t chainmask;
struct callout sc_timer_to;
int sc_tx_timer;
struct iwn_rx_radiotap_header sc_rxtap;
struct iwn_tx_radiotap_header sc_txtap;
const struct ieee80211_channel *sc_curchan;
};
#define IWN_LOCK_INIT(_sc) \

View File

@ -1,5 +1,5 @@
# $FreeBSD$
SUBDIR= iwn4965 iwn5000 iwn5150
SUBDIR= iwn1000 iwn4965 iwn5000 iwn5150 iwn6000
.include <bsd.subdir.mk>

View File

@ -0,0 +1,6 @@
# $FreeBSD$
KMOD= iwn1000fw
IMG= iwlwifi-1000-128.50.3.1
.include <bsd.kmod.mk>

View File

@ -1,6 +1,6 @@
# $FreeBSD$
KMOD= iwn4965fw
IMG= iwlwifi-4965-228.57.2.23
IMG= iwlwifi-4965-228.61.2.24
.include <bsd.kmod.mk>

View File

@ -1,6 +1,6 @@
# $FreeBSD$
KMOD= iwn5000fw
IMG= iwlwifi-5000-5.4.A.11
IMG= iwlwifi-5000-8.24.2.12
.include <bsd.kmod.mk>

View File

@ -0,0 +1,6 @@
# $FreeBSD$
KMOD= iwn6000fw
IMG= iwlwifi-6000-9.176.4.1
.include <bsd.kmod.mk>