Add cpufreq support on the PowerPC G5, along with a skeleton SMU driver
in order to slew CPU voltage during frequency changes. The OpenBSD SMU driver was an extremely helpful reference for this.
This commit is contained in:
Nathan Whitehorn
parent
7f0ad28f28
commit
1016f143f0
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=194679
@ -99,6 +99,7 @@ powerpc/booke/swtch.S optional e500
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powerpc/booke/trap.c optional e500
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powerpc/booke/vm_machdep.c optional e500
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powerpc/cpufreq/dfs.c optional cpufreq
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powerpc/cpufreq/pcr.c optional cpufreq aim
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powerpc/fpu/fpu_add.c optional fpu_emu
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powerpc/fpu/fpu_compare.c optional fpu_emu
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powerpc/fpu/fpu_div.c optional fpu_emu
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@ -127,18 +128,19 @@ powerpc/ofw/ofw_syscons.c optional sc aim
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powerpc/powermac/ata_kauai.c optional powermac ata | powermac atamacio
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powerpc/powermac/ata_macio.c optional powermac ata | powermac atamacio
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powerpc/powermac/ata_dbdma.c optional powermac ata | powermac atamacio
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powerpc/powermac/cuda.c optional powermac cuda
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powerpc/powermac/cpcht.c optional powermac pci
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powerpc/powermac/dbdma.c optional powermac pci
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powerpc/powermac/grackle.c optional powermac pci
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powerpc/powermac/hrowpic.c optional powermac pci
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powerpc/powermac/kiic.c optional powermac kiic
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powerpc/powermac/macgpio.c optional powermac pci
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powerpc/powermac/macio.c optional powermac pci
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powerpc/powermac/openpic_macio.c optional powermac pci
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powerpc/powermac/pswitch.c optional powermac pswitch
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powerpc/powermac/uninorth.c optional powermac pci
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powerpc/powermac/cuda.c optional powermac cuda
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powerpc/powermac/pmu.c optional powermac pmu
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powerpc/powermac/macgpio.c optional powermac pci
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powerpc/powermac/cpcht.c optional powermac pci
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powerpc/powermac/smu.c optional powermac smu
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powerpc/powermac/uninorth.c optional powermac pci
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powerpc/powermac/vcoregpio.c optional powermac
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powerpc/powerpc/altivec.c optional aim
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powerpc/powerpc/atomic.S standard
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@ -158,6 +158,7 @@ device fwe # Ethernet over FireWire (non-standard!)
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# Misc
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device powermac_nvram # Open Firmware configuration NVRAM
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device smu # Apple System Management Unit
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# ADB support
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device adb
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@ -33,6 +33,7 @@ device ofwd # Open Firmware disks
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device adb # Apple Desktop Bus
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device cuda # VIA-CUDA ADB interface
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device pmu # Apple Power Management Unit
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device smu # Apple System Management Unit
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device snd_ai2s # Apple I2S Audio
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device snd_davbus # Apple Davbus Audio
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333
sys/powerpc/cpufreq/pcr.c
Normal file
333
sys/powerpc/cpufreq/pcr.c
Normal file
@ -0,0 +1,333 @@
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/*-
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* Copyright (c) 2009 Nathan Whitehorn
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/cpu.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <dev/ofw/ofw_bus.h>
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#include "cpufreq_if.h"
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struct pcr_softc {
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device_t dev;
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uint32_t pcr_vals[3];
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int nmodes;
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};
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static void pcr_identify(driver_t *driver, device_t parent);
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static int pcr_probe(device_t dev);
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static int pcr_attach(device_t dev);
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static int pcr_settings(device_t dev, struct cf_setting *sets, int *count);
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static int pcr_set(device_t dev, const struct cf_setting *set);
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static int pcr_get(device_t dev, struct cf_setting *set);
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static int pcr_type(device_t dev, int *type);
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static device_method_t pcr_methods[] = {
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/* Device interface */
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DEVMETHOD(device_identify, pcr_identify),
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DEVMETHOD(device_probe, pcr_probe),
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DEVMETHOD(device_attach, pcr_attach),
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/* cpufreq interface */
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DEVMETHOD(cpufreq_drv_set, pcr_set),
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DEVMETHOD(cpufreq_drv_get, pcr_get),
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DEVMETHOD(cpufreq_drv_type, pcr_type),
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DEVMETHOD(cpufreq_drv_settings, pcr_settings),
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{0, 0}
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};
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static driver_t pcr_driver = {
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"pcr",
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pcr_methods,
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sizeof(struct pcr_softc)
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};
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static devclass_t pcr_devclass;
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DRIVER_MODULE(pcr, cpu, pcr_driver, pcr_devclass, 0, 0);
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/*
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* States
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*/
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#define PCR_TO_FREQ(a) ((a >> 17) & 3)
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#define PCR_FULL 0
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#define PCR_HALF 1
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#define PCR_QUARTER 2 /* Only on 970MP */
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#define PSR_RECEIVED (1ULL << 61)
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#define PSR_COMPLETED (1ULL << 61)
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/*
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* SCOM addresses
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*/
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#define SCOM_PCR 0x0aa00100 /* Power Control Register */
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#define SCOM_PCR_BIT 0x80000000 /* Data bit for PCR */
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#define SCOM_PSR 0x40800100 /* Power Status Register */
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/*
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* SCOM Glue
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*/
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#define SCOMC_READ 0x00008000
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#define SCOMC_WRITE 0x00000000
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static void
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write_scom(register_t address, uint64_t value)
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{
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register_t msr;
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register_t hi, lo, scratch;
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hi = (value >> 32) & 0xffffffff;
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lo = value & 0xffffffff;
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msr = mfmsr();
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mtmsr(msr & ~PSL_EE); isync();
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mtspr64(SPR_SCOMD, hi, lo, scratch);
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isync();
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mtspr(SPR_SCOMC, address | SCOMC_WRITE);
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isync();
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mtmsr(msr); isync();
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}
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static uint64_t
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read_scom(register_t address)
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{
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register_t msr;
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uint64_t ret;
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msr = mfmsr();
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mtmsr(msr & ~PSL_EE); isync();
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mtspr(SPR_SCOMC, address | SCOMC_READ);
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isync();
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__asm __volatile ("mfspr %0,%1;"
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" mr %0+1, %0; srdi %0,%0,32" : "=r" (ret) : "K" (SPR_SCOMD));
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(void)mfspr(SPR_SCOMC); /* Complete transcation */
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mtmsr(msr); isync();
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return (ret);
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}
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static void
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pcr_identify(driver_t *driver, device_t parent)
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{
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uint16_t vers;
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vers = mfpvr() >> 16;
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/* Check for an IBM 970-class CPU */
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switch (vers) {
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case IBM970FX:
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case IBM970GX:
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case IBM970MP:
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break;
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default:
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return;
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}
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/* Make sure we're not being doubly invoked. */
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if (device_find_child(parent, "pcr", -1) != NULL)
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return;
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/*
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* We attach a child for every CPU since settings need to
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* be performed on every CPU in the SMP case.
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*/
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if (BUS_ADD_CHILD(parent, 10, "pcr", -1) == NULL)
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device_printf(parent, "add pcr child failed\n");
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}
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static int
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pcr_probe(device_t dev)
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{
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if (resource_disabled("pcr", 0))
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return (ENXIO);
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device_set_desc(dev, "PPC 970 Power Control Register");
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return (0);
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}
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static int
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pcr_attach(device_t dev)
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{
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struct pcr_softc *sc;
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phandle_t cpu;
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uint32_t modes[3];
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int i;
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sc = device_get_softc(dev);
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sc->dev = dev;
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cpu = ofw_bus_get_node(device_get_parent(dev));
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if (cpu <= 0) {
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device_printf(dev,"No CPU device tree node!\n");
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return (ENXIO);
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}
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/*
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* Collect the PCR values for each mode from the device tree.
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* These include bus timing information, and so cannot be
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* directly computed.
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*/
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sc->nmodes = OF_getproplen(cpu, "power-mode-data");
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if (sc->nmodes <= 0 || sc->nmodes > sizeof(sc->pcr_vals)) {
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device_printf(dev,"No power mode data in device tree!\n");
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return (ENXIO);
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}
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OF_getprop(cpu, "power-mode-data", modes, sc->nmodes);
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sc->nmodes /= sizeof(modes[0]);
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/* Sort the modes */
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for (i = 0; i < sc->nmodes; i++)
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sc->pcr_vals[PCR_TO_FREQ(modes[i])] = modes[i];
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cpufreq_register(dev);
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return (0);
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}
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static int
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pcr_settings(device_t dev, struct cf_setting *sets, int *count)
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{
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struct pcr_softc *sc;
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sc = device_get_softc(dev);
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if (sets == NULL || count == NULL)
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return (EINVAL);
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if (*count < sc->nmodes)
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return (E2BIG);
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/* Return a list of valid settings for this driver. */
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memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * sc->nmodes);
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sets[0].freq = 10000; sets[0].dev = dev;
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sets[1].freq = 5000; sets[1].dev = dev;
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if (sc->nmodes > 2)
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sets[2].freq = 2500; sets[2].dev = dev;
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*count = sc->nmodes;
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return (0);
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}
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static int
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pcr_set(device_t dev, const struct cf_setting *set)
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{
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struct pcr_softc *sc;
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register_t pcr, msr;
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uint64_t psr;
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if (set == NULL)
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return (EINVAL);
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sc = device_get_softc(dev);
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/* Construct the new PCR */
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pcr = SCOM_PCR_BIT;
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if (set->freq == 10000)
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pcr |= sc->pcr_vals[0];
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else if (set->freq == 5000)
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pcr |= sc->pcr_vals[1];
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else if (set->freq == 2500)
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pcr |= sc->pcr_vals[2];
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msr = mfmsr();
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mtmsr(msr & ~PSL_EE); isync();
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/* 970MP requires PCR and PCRH to be cleared first */
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write_scom(SCOM_PCR,0); /* Clear PCRH */
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write_scom(SCOM_PCR,SCOM_PCR_BIT); /* Clear PCR */
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/* Set PCR */
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write_scom(SCOM_PCR, pcr);
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/* Wait for completion */
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do {
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DELAY(100);
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psr = read_scom(SCOM_PSR);
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} while ((psr & PSR_RECEIVED) && !(psr & PSR_COMPLETED));
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mtmsr(msr); isync();
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return (0);
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}
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static int
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pcr_get(device_t dev, struct cf_setting *set)
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{
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struct pcr_softc *sc;
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uint64_t psr;
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if (set == NULL)
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return (EINVAL);
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sc = device_get_softc(dev);
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memset(set, CPUFREQ_VAL_UNKNOWN, sizeof(*set));
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psr = read_scom(SCOM_PSR);
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/* We want bits 6 and 7 */
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psr = (psr >> 56) & 3;
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set->freq = 10000;
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if (psr == PCR_HALF)
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set->freq = 5000;
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else if (psr == PCR_QUARTER)
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set->freq = 2500;
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set->dev = dev;
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return (0);
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}
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static int
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pcr_type(device_t dev, int *type)
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{
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if (type == NULL)
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return (EINVAL);
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*type = CPUFREQ_TYPE_RELATIVE;
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return (0);
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}
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288
sys/powerpc/powermac/smu.c
Normal file
288
sys/powerpc/powermac/smu.c
Normal file
@ -0,0 +1,288 @@
|
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/*-
|
||||
* Copyright (c) 2009 Nathan Whitehorn
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
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__FBSDID("$FreeBSD$");
|
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|
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#include <sys/param.h>
|
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#include <sys/bus.h>
|
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#include <sys/systm.h>
|
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#include <sys/module.h>
|
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#include <sys/conf.h>
|
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#include <sys/cpu.h>
|
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#include <sys/kernel.h>
|
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#include <sys/rman.h>
|
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#include <sys/sysctl.h>
|
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|
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#include <machine/bus.h>
|
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#include <machine/md_var.h>
|
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|
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#include <dev/ofw/openfirm.h>
|
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#include <dev/ofw/ofw_bus.h>
|
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#include <powerpc/powermac/macgpiovar.h>
|
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|
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struct smu_cmd {
|
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uint8_t cmd;
|
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uint8_t len;
|
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uint8_t data[254];
|
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};
|
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|
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struct smu_softc {
|
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device_t sc_dev;
|
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struct mtx sc_mtx;
|
||||
|
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struct resource *sc_memr;
|
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int sc_memrid;
|
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|
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bus_dma_tag_t sc_dmatag;
|
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bus_space_tag_t sc_bt;
|
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bus_space_handle_t sc_mailbox;
|
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|
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struct smu_cmd *sc_cmd;
|
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bus_addr_t sc_cmd_phys;
|
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bus_dmamap_t sc_cmd_dmamap;
|
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};
|
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|
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/* regular bus attachment functions */
|
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|
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static int smu_probe(device_t);
|
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static int smu_attach(device_t);
|
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|
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/* cpufreq notification hooks */
|
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|
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static void smu_cpufreq_pre_change(device_t, const struct cf_level *level);
|
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static void smu_cpufreq_post_change(device_t, const struct cf_level *level);
|
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|
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/* where to find the doorbell GPIO */
|
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|
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static device_t smu_doorbell = NULL;
|
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|
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static device_method_t smu_methods[] = {
|
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/* Device interface */
|
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DEVMETHOD(device_probe, smu_probe),
|
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DEVMETHOD(device_attach, smu_attach),
|
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{ 0, 0 },
|
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};
|
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|
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static driver_t smu_driver = {
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"smu",
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smu_methods,
|
||||
sizeof(struct smu_softc)
|
||||
};
|
||||
|
||||
static devclass_t smu_devclass;
|
||||
|
||||
DRIVER_MODULE(smu, nexus, smu_driver, smu_devclass, 0, 0);
|
||||
|
||||
#define SMU_MAILBOX 0x860c
|
||||
|
||||
/* Command types */
|
||||
#define SMU_POWER 0xaa
|
||||
|
||||
static int
|
||||
smu_probe(device_t dev)
|
||||
{
|
||||
const char *name = ofw_bus_get_name(dev);
|
||||
|
||||
if (strcmp(name, "smu") != 0)
|
||||
return (ENXIO);
|
||||
|
||||
device_set_desc(dev, "Apple System Management Unit");
|
||||
return (0);
|
||||
}
|
||||
|
||||
static void
|
||||
smu_phys_callback(void *xsc, bus_dma_segment_t *segs, int nsegs, int error)
|
||||
{
|
||||
struct smu_softc *sc = xsc;
|
||||
|
||||
sc->sc_cmd_phys = segs[0].ds_addr;
|
||||
}
|
||||
|
||||
static int
|
||||
smu_attach(device_t dev)
|
||||
{
|
||||
struct smu_softc *sc;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
|
||||
mtx_init(&sc->sc_mtx, "smu", NULL, MTX_DEF);
|
||||
|
||||
/*
|
||||
* Map the mailbox area. This should be determined from firmware,
|
||||
* but I have not found a simple way to do that.
|
||||
*/
|
||||
bus_dma_tag_create(NULL, 16, 0, BUS_SPACE_MAXADDR_32BIT,
|
||||
BUS_SPACE_MAXADDR, NULL, NULL, PAGE_SIZE, 1, PAGE_SIZE, 0, NULL,
|
||||
NULL, &(sc->sc_dmatag));
|
||||
sc->sc_bt = &bs_be_tag;
|
||||
bus_space_map(sc->sc_bt, SMU_MAILBOX, 4, 0, &sc->sc_mailbox);
|
||||
|
||||
/*
|
||||
* Allocate the command buffer. This can be anywhere in the low 4 GB
|
||||
* of memory.
|
||||
*/
|
||||
bus_dmamem_alloc(sc->sc_dmatag, (void **)&sc->sc_cmd, BUS_DMA_WAITOK |
|
||||
BUS_DMA_ZERO, &sc->sc_cmd_dmamap);
|
||||
bus_dmamap_load(sc->sc_dmatag, sc->sc_cmd_dmamap,
|
||||
sc->sc_cmd, PAGE_SIZE, smu_phys_callback, sc, 0);
|
||||
|
||||
/*
|
||||
* Set up handlers to change CPU voltage when CPU frequency is changed.
|
||||
*/
|
||||
EVENTHANDLER_REGISTER(cpufreq_pre_change, smu_cpufreq_pre_change, dev,
|
||||
EVENTHANDLER_PRI_ANY);
|
||||
EVENTHANDLER_REGISTER(cpufreq_post_change, smu_cpufreq_post_change, dev,
|
||||
EVENTHANDLER_PRI_ANY);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
smu_run_cmd(device_t dev, struct smu_cmd *cmd)
|
||||
{
|
||||
struct smu_softc *sc;
|
||||
int doorbell_ack, result;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
|
||||
mtx_lock(&sc->sc_mtx);
|
||||
|
||||
/* Copy the command to the mailbox */
|
||||
memcpy(sc->sc_cmd, cmd, sizeof(*cmd));
|
||||
bus_dmamap_sync(sc->sc_dmatag, sc->sc_cmd_dmamap, BUS_DMASYNC_PREWRITE);
|
||||
bus_space_write_4(sc->sc_bt, sc->sc_mailbox, 0, sc->sc_cmd_phys);
|
||||
|
||||
/* Invalidate the cacheline it is in -- SMU bypasses the cache */
|
||||
__asm __volatile("dcbst 0,%0; sync" :: "r"(sc->sc_cmd): "memory");
|
||||
|
||||
/* Ring SMU doorbell */
|
||||
macgpio_write(smu_doorbell, GPIO_DDR_OUTPUT);
|
||||
|
||||
/* Wait for the doorbell GPIO to go high, signaling completion */
|
||||
do {
|
||||
/* XXX: timeout */
|
||||
DELAY(50);
|
||||
doorbell_ack = macgpio_read(smu_doorbell);
|
||||
} while (!doorbell_ack);
|
||||
|
||||
/* Check result. First invalidate the cache again... */
|
||||
__asm __volatile("dcbf 0,%0; sync" :: "r"(sc->sc_cmd) : "memory");
|
||||
|
||||
bus_dmamap_sync(sc->sc_dmatag, sc->sc_cmd_dmamap, BUS_DMASYNC_POSTREAD);
|
||||
|
||||
/* SMU acks the command by inverting the command bits */
|
||||
if (sc->sc_cmd->cmd == ~cmd->cmd)
|
||||
result = 0;
|
||||
else
|
||||
result = EIO;
|
||||
|
||||
mtx_unlock(&sc->sc_mtx);
|
||||
|
||||
return (result);
|
||||
}
|
||||
|
||||
static void
|
||||
smu_slew_cpu_voltage(device_t dev, int to)
|
||||
{
|
||||
struct smu_cmd cmd;
|
||||
|
||||
cmd.cmd = SMU_POWER;
|
||||
cmd.len = 8;
|
||||
cmd.data[0] = 'V';
|
||||
cmd.data[1] = 'S';
|
||||
cmd.data[2] = 'L';
|
||||
cmd.data[3] = 'E';
|
||||
cmd.data[4] = 'W';
|
||||
cmd.data[5] = 0xff;
|
||||
cmd.data[6] = 1;
|
||||
cmd.data[7] = to;
|
||||
|
||||
smu_run_cmd(dev, &cmd);
|
||||
}
|
||||
|
||||
static void
|
||||
smu_cpufreq_pre_change(device_t dev, const struct cf_level *level)
|
||||
{
|
||||
/*
|
||||
* Make sure the CPU voltage is raised before we raise
|
||||
* the clock.
|
||||
*/
|
||||
|
||||
if (level->rel_set[0].freq == 10000 /* max */)
|
||||
smu_slew_cpu_voltage(dev, 0);
|
||||
}
|
||||
|
||||
static void
|
||||
smu_cpufreq_post_change(device_t dev, const struct cf_level *level)
|
||||
{
|
||||
/* We are safe to reduce CPU voltage after a downward transition */
|
||||
|
||||
if (level->rel_set[0].freq < 10000 /* max */)
|
||||
smu_slew_cpu_voltage(dev, 1); /* XXX: 1/4 voltage for 970MP? */
|
||||
}
|
||||
|
||||
/* Routines for probing the SMU doorbell GPIO */
|
||||
static int doorbell_probe(device_t dev);
|
||||
static int doorbell_attach(device_t dev);
|
||||
|
||||
static device_method_t doorbell_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, doorbell_probe),
|
||||
DEVMETHOD(device_attach, doorbell_attach),
|
||||
{ 0, 0 },
|
||||
};
|
||||
|
||||
static driver_t doorbell_driver = {
|
||||
"smudoorbell",
|
||||
doorbell_methods,
|
||||
0
|
||||
};
|
||||
|
||||
static devclass_t doorbell_devclass;
|
||||
|
||||
DRIVER_MODULE(smudoorbell, macgpio, doorbell_driver, doorbell_devclass, 0, 0);
|
||||
|
||||
static int
|
||||
doorbell_probe(device_t dev)
|
||||
{
|
||||
const char *name = ofw_bus_get_name(dev);
|
||||
|
||||
if (strcmp(name, "smu-doorbell") != 0)
|
||||
return (ENXIO);
|
||||
|
||||
device_set_desc(dev, "SMU Doorbell GPIO");
|
||||
device_quiet(dev);
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
doorbell_attach(device_t dev)
|
||||
{
|
||||
smu_doorbell = dev;
|
||||
return (0);
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user