Bring in Andrew Thompson's port of Sepherosa Ziehau's bwi driver for
Broadcom BCM43xx chipsets. This driver uses the v3 firmware that needs to be fetched separately. A port will be committed to create the bwi firmware module. The driver matches the following chips: Broadcom BCM4301, BCM4307, BCM4306, BCM4309, BCM4311, BCM4312, BCM4318, BCM4319 The driver works for 802.11b and 802.11g. Limitations: This doesn't support the 802.11a or 802.11n portion of radios. Some BCM4306 and BCM4309 cards don't work with Channel 1, 2 or 3. Documenation for this firmware is reverse engineered from http://bcm.sipsolutions.net/ V4 of the firmware is needed for 11a or 11n support http://bcm-v4.sipsolutions.net/ Firmware needs to be fetched from a third party, port to be committed # I've tested this with a BCM4319 mini-pci and a BCM4318 CardBus card, and # not connected it to the build until the firmware port is committed. Obtained from: DragonFlyBSD, //depot/projects/vap Reviewed by: sam@, thompsa@
This commit is contained in:
Warner Losh
parent
80c516a808
commit
12e36acb09
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=191762
@ -712,6 +712,11 @@ dev/buslogic/bt_eisa.c optional bt eisa
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dev/buslogic/bt_isa.c optional bt isa
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dev/buslogic/bt_mca.c optional bt mca
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dev/buslogic/bt_pci.c optional bt pci
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dev/bwi/bwiirf.c optional bwi
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dev/bwi/bwimac.c optional bwi
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dev/bwi/bwiphy.c optional bwi
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dev/bwi/if_bwi.c optional bwi
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dev/bwi/if_bwi_pci.c optional bwi pci
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dev/cardbus/cardbus.c optional cardbus
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dev/cardbus/cardbus_cis.c optional cardbus
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dev/cardbus/cardbus_device.c optional cardbus
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@ -763,6 +763,10 @@ AH_NEED_DESC_SWAP opt_ah.h
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AH_USE_INIPDGAIN opt_ah.h
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AH_MAXCHAN opt_ah.h
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# options for the Broadcom BCM43xx driver (bwi)
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BWI_DEBUG opt_bwi.h
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BWI_DEBUG_VERBOSE opt_bwi.h
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# options for the Marvell 8335 wireless driver
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MALO_DEBUG opt_malo.h
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MALO_TXBUF opt_malo.h
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81
sys/dev/bwi/bitops.h
Normal file
81
sys/dev/bwi/bitops.h
Normal file
@ -0,0 +1,81 @@
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/*
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* Copyright (c) 2004, 2005 David Young. All rights reserved.
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*
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* Programmed for NetBSD by David Young.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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||||
* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of David Young may not be used to endorse or promote
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* products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
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* Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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* OF SUCH DAMAGE.
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*
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* $DragonFly: src/sys/dev/netif/bwi/bitops.h,v 1.1 2007/09/08 06:15:54 sephe Exp $
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* $FreeBSD$
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*/
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#ifndef _BITOPS_H
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#define _BITOPS_H
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/*
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* __BIT(n): Return a bitmask with bit m set, where the least
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* significant bit is bit 0.
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*
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* __BITS(m, n): Return a bitmask with bits m through n, inclusive,
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* set. It does not matter whether m>n or m<=n. The
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* least significant bit is bit 0.
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*
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* A "bitfield" is a span of consecutive bits defined by a bitmask,
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* where 1s select the bits in the bitfield. __SHIFTIN, __SHIFTOUT,
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* and SHIFTOUT_MASK help read and write bitfields from device registers.
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*
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* __SHIFTIN(v, mask): Left-shift bits `v' into the bitfield
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* defined by `mask', and return them. No
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* side-effects.
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*
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* __SHIFTOUT(v, mask): Extract and return the bitfield selected
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* by `mask' from `v', right-shifting the
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* bits so that the rightmost selected bit
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* is at bit 0. No side-effects.
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*
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* __SHIFTOUT_MASK(mask): Right-shift the bits in `mask' so that
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* the rightmost non-zero bit is at bit
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* 0. This is useful for finding the
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* greatest unsigned value that a bitfield
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* can hold. No side-effects. Note that
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* SHIFTOUT_MASK(m) = SHIFTOUT(m, m).
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*/
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/* __BIT(n): nth bit, where __BIT(0) == 0x1. */
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#define __BIT(__n) (((__n) == 32) ? 0 : ((uint32_t)1 << (__n)))
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/* __BITS(m, n): bits m through n, m < n. */
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#define __BITS(__m, __n) \
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((__BIT(MAX((__m), (__n)) + 1) - 1) ^ (__BIT(MIN((__m), (__n))) - 1))
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/* Find least significant bit that is set */
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#define __LOWEST_SET_BIT(__mask) ((((__mask) - 1) & (__mask)) ^ (__mask))
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#define __SHIFTOUT(__x, __mask) (((__x) & (__mask)) / __LOWEST_SET_BIT(__mask))
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#define __SHIFTIN(__x, __mask) ((__x) * __LOWEST_SET_BIT(__mask))
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#define __SHIFTOUT_MASK(__mask) __SHIFTOUT((__mask), (__mask))
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#endif /* !_BITOPS_H */
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1982
sys/dev/bwi/bwimac.c
Normal file
1982
sys/dev/bwi/bwimac.c
Normal file
File diff suppressed because it is too large
Load Diff
100
sys/dev/bwi/bwimac.h
Normal file
100
sys/dev/bwi/bwimac.h
Normal file
@ -0,0 +1,100 @@
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/*
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* Copyright (c) 2007 The DragonFly Project. All rights reserved.
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*
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* This code is derived from software contributed to The DragonFly Project
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* by Sepherosa Ziehau <sepherosa@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name of The DragonFly Project nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific, prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
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* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $DragonFly: src/sys/dev/netif/bwi/bwimac.h,v 1.2 2008/02/15 11:15:38 sephe Exp $
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* $FreeBSD$
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*/
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#ifndef _BWI_MAC_H
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#define _BWI_MAC_H
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int bwi_mac_attach(struct bwi_softc *, int, uint8_t);
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int bwi_mac_lateattach(struct bwi_mac *);
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void bwi_mac_detach(struct bwi_mac *);
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int bwi_mac_init(struct bwi_mac *);
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void bwi_mac_reset(struct bwi_mac *, int);
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int bwi_mac_start(struct bwi_mac *);
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int bwi_mac_stop(struct bwi_mac *);
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void bwi_mac_shutdown(struct bwi_mac *);
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void bwi_mac_updateslot(struct bwi_mac *, int);
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void bwi_mac_set_promisc(struct bwi_mac *, int);
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void bwi_mac_calibrate_txpower(struct bwi_mac *,
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enum bwi_txpwrcb_type);
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void bwi_mac_set_tpctl_11bg(struct bwi_mac *,
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const struct bwi_tpctl *);
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void bwi_mac_init_tpctl_11bg(struct bwi_mac *);
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void bwi_mac_dummy_xmit(struct bwi_mac *);
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void bwi_mac_reset_hwkeys(struct bwi_mac *);
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int bwi_mac_config_ps(struct bwi_mac *);
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uint16_t bwi_memobj_read_2(struct bwi_mac *, uint16_t, uint16_t);
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uint32_t bwi_memobj_read_4(struct bwi_mac *, uint16_t, uint16_t);
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void bwi_memobj_write_2(struct bwi_mac *, uint16_t, uint16_t,
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uint16_t);
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void bwi_memobj_write_4(struct bwi_mac *, uint16_t, uint16_t,
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uint32_t);
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void bwi_tmplt_write_4(struct bwi_mac *, uint32_t, uint32_t);
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void bwi_hostflags_write(struct bwi_mac *, uint64_t);
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uint64_t bwi_hostflags_read(struct bwi_mac *);
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#define MOBJ_WRITE_2(mac, objid, ofs, val) \
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bwi_memobj_write_2((mac), (objid), (ofs), (val))
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#define MOBJ_WRITE_4(mac, objid, ofs, val) \
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bwi_memobj_write_4((mac), (objid), (ofs), (val))
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#define MOBJ_READ_2(mac, objid, ofs) \
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bwi_memobj_read_2((mac), (objid), (ofs))
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#define MOBJ_READ_4(mac, objid, ofs) \
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bwi_memobj_read_4((mac), (objid), (ofs))
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#define MOBJ_SETBITS_4(mac, objid, ofs, bits) \
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MOBJ_WRITE_4((mac), (objid), (ofs), \
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MOBJ_READ_4((mac), (objid), (ofs)) | (bits))
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#define MOBJ_CLRBITS_4(mac, objid, ofs, bits) \
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MOBJ_WRITE_4((mac), (objid), (ofs), \
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MOBJ_READ_4((mac), (objid), (ofs)) & ~(bits))
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#define MOBJ_FILT_SETBITS_2(mac, objid, ofs, filt, bits) \
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MOBJ_WRITE_2((mac), (objid), (ofs), \
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(MOBJ_READ_2((mac), (objid), (ofs)) & (filt)) | (bits))
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#define TMPLT_WRITE_4(mac, ofs, val) bwi_tmplt_write_4((mac), (ofs), (val))
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#define HFLAGS_WRITE(mac, flags) bwi_hostflags_write((mac), (flags))
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#define HFLAGS_READ(mac) bwi_hostflags_read((mac))
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#define HFLAGS_CLRBITS(mac, bits) \
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HFLAGS_WRITE((mac), HFLAGS_READ((mac)) | (bits))
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#define HFLAGS_SETBITS(mac, bits) \
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HFLAGS_WRITE((mac), HFLAGS_READ((mac)) & ~(bits))
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#endif /* !_BWI_MAC_H */
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1020
sys/dev/bwi/bwiphy.c
Normal file
1020
sys/dev/bwi/bwiphy.c
Normal file
File diff suppressed because it is too large
Load Diff
224
sys/dev/bwi/bwiphy.h
Normal file
224
sys/dev/bwi/bwiphy.h
Normal file
@ -0,0 +1,224 @@
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/*
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* Copyright (c) 2007 The DragonFly Project. All rights reserved.
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*
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* This code is derived from software contributed to The DragonFly Project
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* by Sepherosa Ziehau <sepherosa@gmail.com>
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||||
*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name of The DragonFly Project nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific, prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $DragonFly: src/sys/dev/netif/bwi/bwiphy.h,v 1.1 2007/09/08 06:15:54 sephe Exp $
|
||||
* $FreeBSD$
|
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*/
|
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#ifndef _BWI_PHY_H
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#define _BWI_PHY_H
|
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|
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struct bwi_gains {
|
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int16_t tbl_gain1;
|
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int16_t tbl_gain2;
|
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int16_t phy_gain;
|
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};
|
||||
|
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int bwi_phy_attach(struct bwi_mac *);
|
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void bwi_phy_clear_state(struct bwi_phy *);
|
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|
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int bwi_phy_calibrate(struct bwi_mac *);
|
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void bwi_phy_set_bbp_atten(struct bwi_mac *, uint16_t);
|
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|
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void bwi_set_gains(struct bwi_mac *, const struct bwi_gains *);
|
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int16_t bwi_nrssi_read(struct bwi_mac *, uint16_t);
|
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void bwi_nrssi_write(struct bwi_mac *, uint16_t, int16_t);
|
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uint16_t bwi_phy_read(struct bwi_mac *, uint16_t);
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void bwi_phy_write(struct bwi_mac *, uint16_t, uint16_t);
|
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|
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static __inline void
|
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bwi_phy_init(struct bwi_mac *_mac)
|
||||
{
|
||||
_mac->mac_phy.phy_init(_mac);
|
||||
}
|
||||
|
||||
#define PHY_WRITE(mac, ctrl, val) bwi_phy_write((mac), (ctrl), (val))
|
||||
#define PHY_READ(mac, ctrl) bwi_phy_read((mac), (ctrl))
|
||||
|
||||
#define PHY_SETBITS(mac, ctrl, bits) \
|
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PHY_WRITE((mac), (ctrl), PHY_READ((mac), (ctrl)) | (bits))
|
||||
#define PHY_CLRBITS(mac, ctrl, bits) \
|
||||
PHY_WRITE((mac), (ctrl), PHY_READ((mac), (ctrl)) & ~(bits))
|
||||
#define PHY_FILT_SETBITS(mac, ctrl, filt, bits) \
|
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PHY_WRITE((mac), (ctrl), (PHY_READ((mac), (ctrl)) & (filt)) | (bits))
|
||||
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||||
#define BWI_PHYR_NRSSI_THR_11B 0x020
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#define BWI_PHYR_BBP_ATTEN 0x060
|
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#define BWI_PHYR_TBL_CTRL_11A 0x072
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#define BWI_PHYR_TBL_DATA_LO_11A 0x073
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#define BWI_PHYR_TBL_DATA_HI_11A 0x074
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#define BWI_PHYR_TBL_CTRL_11G 0x472
|
||||
#define BWI_PHYR_TBL_DATA_LO_11G 0x473
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||||
#define BWI_PHYR_TBL_DATA_HI_11G 0x474
|
||||
#define BWI_PHYR_NRSSI_THR_11G 0x48a
|
||||
#define BWI_PHYR_NRSSI_CTRL 0x803
|
||||
#define BWI_PHYR_NRSSI_DATA 0x804
|
||||
#define BWI_PHYR_RF_LO 0x810
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||||
|
||||
/*
|
||||
* PHY Tables
|
||||
*/
|
||||
/*
|
||||
* http://bcm-specs.sipsolutions.net/APHYSetup/FineFrequency
|
||||
* G PHY
|
||||
*/
|
||||
#define BWI_PHY_FREQ_11G_REV1 \
|
||||
0x0089, 0x02e9, 0x0409, 0x04e9, 0x05a9, 0x0669, 0x0709, 0x0789, \
|
||||
0x0829, 0x08a9, 0x0929, 0x0989, 0x0a09, 0x0a69, 0x0ac9, 0x0b29, \
|
||||
0x0ba9, 0x0be9, 0x0c49, 0x0ca9, 0x0d09, 0x0d69, 0x0da9, 0x0e09, \
|
||||
0x0e69, 0x0ea9, 0x0f09, 0x0f49, 0x0fa9, 0x0fe9, 0x1029, 0x1089, \
|
||||
0x10c9, 0x1109, 0x1169, 0x11a9, 0x11e9, 0x1229, 0x1289, 0x12c9, \
|
||||
0x1309, 0x1349, 0x1389, 0x13c9, 0x1409, 0x1449, 0x14a9, 0x14e9, \
|
||||
0x1529, 0x1569, 0x15a9, 0x15e9, 0x1629, 0x1669, 0x16a9, 0x16e8, \
|
||||
0x1728, 0x1768, 0x17a8, 0x17e8, 0x1828, 0x1868, 0x18a8, 0x18e8, \
|
||||
0x1928, 0x1968, 0x19a8, 0x19e8, 0x1a28, 0x1a68, 0x1aa8, 0x1ae8, \
|
||||
0x1b28, 0x1b68, 0x1ba8, 0x1be8, 0x1c28, 0x1c68, 0x1ca8, 0x1ce8, \
|
||||
0x1d28, 0x1d68, 0x1dc8, 0x1e08, 0x1e48, 0x1e88, 0x1ec8, 0x1f08, \
|
||||
0x1f48, 0x1f88, 0x1fe8, 0x2028, 0x2068, 0x20a8, 0x2108, 0x2148, \
|
||||
0x2188, 0x21c8, 0x2228, 0x2268, 0x22c8, 0x2308, 0x2348, 0x23a8, \
|
||||
0x23e8, 0x2448, 0x24a8, 0x24e8, 0x2548, 0x25a8, 0x2608, 0x2668, \
|
||||
0x26c8, 0x2728, 0x2787, 0x27e7, 0x2847, 0x28c7, 0x2947, 0x29a7, \
|
||||
0x2a27, 0x2ac7, 0x2b47, 0x2be7, 0x2ca7, 0x2d67, 0x2e47, 0x2f67, \
|
||||
0x3247, 0x3526, 0x3646, 0x3726, 0x3806, 0x38a6, 0x3946, 0x39e6, \
|
||||
0x3a66, 0x3ae6, 0x3b66, 0x3bc6, 0x3c45, 0x3ca5, 0x3d05, 0x3d85, \
|
||||
0x3de5, 0x3e45, 0x3ea5, 0x3ee5, 0x3f45, 0x3fa5, 0x4005, 0x4045, \
|
||||
0x40a5, 0x40e5, 0x4145, 0x4185, 0x41e5, 0x4225, 0x4265, 0x42c5, \
|
||||
0x4305, 0x4345, 0x43a5, 0x43e5, 0x4424, 0x4464, 0x44c4, 0x4504, \
|
||||
0x4544, 0x4584, 0x45c4, 0x4604, 0x4644, 0x46a4, 0x46e4, 0x4724, \
|
||||
0x4764, 0x47a4, 0x47e4, 0x4824, 0x4864, 0x48a4, 0x48e4, 0x4924, \
|
||||
0x4964, 0x49a4, 0x49e4, 0x4a24, 0x4a64, 0x4aa4, 0x4ae4, 0x4b23, \
|
||||
0x4b63, 0x4ba3, 0x4be3, 0x4c23, 0x4c63, 0x4ca3, 0x4ce3, 0x4d23, \
|
||||
0x4d63, 0x4da3, 0x4de3, 0x4e23, 0x4e63, 0x4ea3, 0x4ee3, 0x4f23, \
|
||||
0x4f63, 0x4fc3, 0x5003, 0x5043, 0x5083, 0x50c3, 0x5103, 0x5143, \
|
||||
0x5183, 0x51e2, 0x5222, 0x5262, 0x52a2, 0x52e2, 0x5342, 0x5382, \
|
||||
0x53c2, 0x5402, 0x5462, 0x54a2, 0x5502, 0x5542, 0x55a2, 0x55e2, \
|
||||
0x5642, 0x5682, 0x56e2, 0x5722, 0x5782, 0x57e1, 0x5841, 0x58a1, \
|
||||
0x5901, 0x5961, 0x59c1, 0x5a21, 0x5aa1, 0x5b01, 0x5b81, 0x5be1, \
|
||||
0x5c61, 0x5d01, 0x5d80, 0x5e20, 0x5ee0, 0x5fa0, 0x6080, 0x61c0
|
||||
|
||||
/*
|
||||
* http://bcm-specs.sipsolutions.net/APHYSetup/noise_table
|
||||
*/
|
||||
/* G PHY Revision 1 */
|
||||
#define BWI_PHY_NOISE_11G_REV1 \
|
||||
0x013c, 0x01f5, 0x031a, 0x0631, 0x0001, 0x0001, 0x0001, 0x0001
|
||||
/* G PHY generic */
|
||||
#define BWI_PHY_NOISE_11G \
|
||||
0x5484, 0x3c40, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
|
||||
/*
|
||||
* http://bcm-specs.sipsolutions.net/APHYSetup/rotor_table
|
||||
* G PHY Revision 1
|
||||
*/
|
||||
#define BWI_PHY_ROTOR_11G_REV1 \
|
||||
0xfeb93ffd, 0xfec63ffd, 0xfed23ffd, 0xfedf3ffd, \
|
||||
0xfeec3ffe, 0xfef83ffe, 0xff053ffe, 0xff113ffe, \
|
||||
0xff1e3ffe, 0xff2a3fff, 0xff373fff, 0xff443fff, \
|
||||
0xff503fff, 0xff5d3fff, 0xff693fff, 0xff763fff, \
|
||||
0xff824000, 0xff8f4000, 0xff9b4000, 0xffa84000, \
|
||||
0xffb54000, 0xffc14000, 0xffce4000, 0xffda4000, \
|
||||
0xffe74000, 0xfff34000, 0x00004000, 0x000d4000, \
|
||||
0x00194000, 0x00264000, 0x00324000, 0x003f4000, \
|
||||
0x004b4000, 0x00584000, 0x00654000, 0x00714000, \
|
||||
0x007e4000, 0x008a3fff, 0x00973fff, 0x00a33fff, \
|
||||
0x00b03fff, 0x00bc3fff, 0x00c93fff, 0x00d63fff, \
|
||||
0x00e23ffe, 0x00ef3ffe, 0x00fb3ffe, 0x01083ffe, \
|
||||
0x01143ffe, 0x01213ffd, 0x012e3ffd, 0x013a3ffd, \
|
||||
0x01473ffd
|
||||
|
||||
/*
|
||||
* http://bcm-specs.sipsolutions.net/APHYSetup/noise_scale_table
|
||||
*/
|
||||
/* G PHY Revision [0,2] */
|
||||
#define BWI_PHY_NOISE_SCALE_11G_REV2 \
|
||||
0x6c77, 0x5162, 0x3b40, 0x3335, 0x2f2d, 0x2a2a, 0x2527, 0x1f21, \
|
||||
0x1a1d, 0x1719, 0x1616, 0x1414, 0x1414, 0x1400, 0x1414, 0x1614, \
|
||||
0x1716, 0x1a19, 0x1f1d, 0x2521, 0x2a27, 0x2f2a, 0x332d, 0x3b35, \
|
||||
0x5140, 0x6c62, 0x0077
|
||||
/* G PHY Revsion 7 */
|
||||
#define BWI_PHY_NOISE_SCALE_11G_REV7 \
|
||||
0xa4a4, 0xa4a4, 0xa4a4, 0xa4a4, 0xa4a4, 0xa4a4, 0xa4a4, 0xa4a4, \
|
||||
0xa4a4, 0xa4a4, 0xa4a4, 0xa4a4, 0xa4a4, 0xa400, 0xa4a4, 0xa4a4, \
|
||||
0xa4a4, 0xa4a4, 0xa4a4, 0xa4a4, 0xa4a4, 0xa4a4, 0xa4a4, 0xa4a4, \
|
||||
0xa4a4, 0xa4a4, 0x00a4
|
||||
/* G PHY generic */
|
||||
#define BWI_PHY_NOISE_SCALE_11G \
|
||||
0xd8dd, 0xcbd4, 0xbcc0, 0xb6b7, 0xb2b0, 0xadad, 0xa7a9, 0x9fa1, \
|
||||
0x969b, 0x9195, 0x8f8f, 0x8a8a, 0x8a8a, 0x8a00, 0x8a8a, 0x8f8a, \
|
||||
0x918f, 0x9695, 0x9f9b, 0xa7a1, 0xada9, 0xb2ad, 0xb6b0, 0xbcb7, \
|
||||
0xcbc0, 0xd8d4, 0x00dd
|
||||
|
||||
/*
|
||||
* http://bcm-specs.sipsolutions.net/APHYSetup/sigma_square_table
|
||||
*/
|
||||
/* G PHY Revision 2 */
|
||||
#define BWI_PHY_SIGMA_SQ_11G_REV2 \
|
||||
0x007a, 0x0075, 0x0071, 0x006c, 0x0067, 0x0063, 0x005e, 0x0059, \
|
||||
0x0054, 0x0050, 0x004b, 0x0046, 0x0042, 0x003d, 0x003d, 0x003d, \
|
||||
0x003d, 0x003d, 0x003d, 0x003d, 0x003d, 0x003d, 0x003d, 0x003d, \
|
||||
0x003d, 0x003d, 0x0000, 0x003d, 0x003d, 0x003d, 0x003d, 0x003d, \
|
||||
0x003d, 0x003d, 0x003d, 0x003d, 0x003d, 0x003d, 0x003d, 0x003d, \
|
||||
0x0042, 0x0046, 0x004b, 0x0050, 0x0054, 0x0059, 0x005e, 0x0063, \
|
||||
0x0067, 0x006c, 0x0071, 0x0075, 0x007a
|
||||
/* G PHY Revision (2,7] */
|
||||
#define BWI_PHY_SIGMA_SQ_11G_REV7 \
|
||||
0x00de, 0x00dc, 0x00da, 0x00d8, 0x00d6, 0x00d4, 0x00d2, 0x00cf, \
|
||||
0x00cd, 0x00ca, 0x00c7, 0x00c4, 0x00c1, 0x00be, 0x00be, 0x00be, \
|
||||
0x00be, 0x00be, 0x00be, 0x00be, 0x00be, 0x00be, 0x00be, 0x00be, \
|
||||
0x00be, 0x00be, 0x0000, 0x00be, 0x00be, 0x00be, 0x00be, 0x00be, \
|
||||
0x00be, 0x00be, 0x00be, 0x00be, 0x00be, 0x00be, 0x00be, 0x00be, \
|
||||
0x00c1, 0x00c4, 0x00c7, 0x00ca, 0x00cd, 0x00cf, 0x00d2, 0x00d4, \
|
||||
0x00d6, 0x00d8, 0x00da, 0x00dc, 0x00de
|
||||
|
||||
/*
|
||||
* http://bcm-specs.sipsolutions.net/APHYSetup/retard_table
|
||||
* G PHY
|
||||
*/
|
||||
#define BWI_PHY_DELAY_11G_REV1 \
|
||||
0xdb93cb87, 0xd666cf64, 0xd1fdd358, 0xcda6d826, \
|
||||
0xca38dd9f, 0xc729e2b4, 0xc469e88e, 0xc26aee2b, \
|
||||
0xc0def46c, 0xc073fa62, 0xc01d00d5, 0xc0760743, \
|
||||
0xc1560d1e, 0xc2e51369, 0xc4ed18ff, 0xc7ac1ed7, \
|
||||
0xcb2823b2, 0xcefa28d9, 0xd2f62d3f, 0xd7bb3197, \
|
||||
0xdce53568, 0xe1fe3875, 0xe7d13b35, 0xed663d35, \
|
||||
0xf39b3ec4, 0xf98e3fa7, 0x00004000, 0x06723fa7, \
|
||||
0x0c653ec4, 0x129a3d35, 0x182f3b35, 0x1e023875, \
|
||||
0x231b3568, 0x28453197, 0x2d0a2d3f, 0x310628d9, \
|
||||
0x34d823b2, 0x38541ed7, 0x3b1318ff, 0x3d1b1369, \
|
||||
0x3eaa0d1e, 0x3f8a0743, 0x3fe300d5, 0x3f8dfa62, \
|
||||
0x3f22f46c, 0x3d96ee2b, 0x3b97e88e, 0x38d7e2b4, \
|
||||
0x35c8dd9f, 0x325ad826, 0x2e03d358, 0x299acf64, \
|
||||
0x246dcb87
|
||||
|
||||
#endif /* !_BWI_PHY_H */
|
||||
2690
sys/dev/bwi/bwirf.c
Normal file
2690
sys/dev/bwi/bwirf.c
Normal file
File diff suppressed because it is too large
Load Diff
160
sys/dev/bwi/bwirf.h
Normal file
160
sys/dev/bwi/bwirf.h
Normal file
@ -0,0 +1,160 @@
|
||||
/*
|
||||
* Copyright (c) 2007 The DragonFly Project. All rights reserved.
|
||||
*
|
||||
* This code is derived from software contributed to The DragonFly Project
|
||||
* by Sepherosa Ziehau <sepherosa@gmail.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name of The DragonFly Project nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific, prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $DragonFly: src/sys/dev/netif/bwi/bwirf.h,v 1.3 2007/10/03 04:53:19 sephe Exp $
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#ifndef _BWI_RF_H
|
||||
#define _BWI_RF_H
|
||||
|
||||
int bwi_rf_attach(struct bwi_mac *);
|
||||
void bwi_rf_clear_state(struct bwi_rf *);
|
||||
|
||||
int bwi_rf_map_txpower(struct bwi_mac *);
|
||||
void bwi_rf_lo_adjust(struct bwi_mac *, const struct bwi_tpctl *);
|
||||
void bwi_rf_set_chan(struct bwi_mac *, u_int, int);
|
||||
void bwi_rf_get_gains(struct bwi_mac *);
|
||||
void bwi_rf_init(struct bwi_mac *);
|
||||
void bwi_rf_init_bcm2050(struct bwi_mac *);
|
||||
void bwi_rf_init_hw_nrssi_table(struct bwi_mac *, uint16_t);
|
||||
void bwi_rf_set_ant_mode(struct bwi_mac *, int);
|
||||
|
||||
void bwi_rf_clear_tssi(struct bwi_mac *);
|
||||
int bwi_rf_get_latest_tssi(struct bwi_mac *, int8_t[], uint16_t);
|
||||
int bwi_rf_tssi2dbm(struct bwi_mac *, int8_t, int8_t *);
|
||||
|
||||
void bwi_rf_write(struct bwi_mac *, uint16_t, uint16_t);
|
||||
uint16_t bwi_rf_read(struct bwi_mac *, uint16_t);
|
||||
|
||||
static __inline void
|
||||
bwi_rf_off(struct bwi_mac *_mac)
|
||||
{
|
||||
_mac->mac_rf.rf_off(_mac);
|
||||
/* TODO:LED */
|
||||
|
||||
_mac->mac_rf.rf_flags &= ~BWI_RF_F_ON;
|
||||
}
|
||||
|
||||
static __inline void
|
||||
bwi_rf_on(struct bwi_mac *_mac)
|
||||
{
|
||||
if (_mac->mac_rf.rf_flags & BWI_RF_F_ON)
|
||||
return;
|
||||
|
||||
_mac->mac_rf.rf_on(_mac);
|
||||
/* TODO: LED */
|
||||
|
||||
_mac->mac_rf.rf_flags |= BWI_RF_F_ON;
|
||||
}
|
||||
|
||||
static __inline void
|
||||
bwi_rf_calc_nrssi_slope(struct bwi_mac *_mac)
|
||||
{
|
||||
_mac->mac_rf.rf_calc_nrssi_slope(_mac);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
bwi_rf_set_nrssi_thr(struct bwi_mac *_mac)
|
||||
{
|
||||
_mac->mac_rf.rf_set_nrssi_thr(_mac);
|
||||
}
|
||||
|
||||
static __inline int
|
||||
bwi_rf_calc_rssi(struct bwi_mac *_mac, const struct bwi_rxbuf_hdr *_hdr)
|
||||
{
|
||||
return _mac->mac_rf.rf_calc_rssi(_mac, _hdr);
|
||||
}
|
||||
|
||||
static __inline int
|
||||
bwi_rf_calc_noise(struct bwi_mac *_mac)
|
||||
{
|
||||
return _mac->mac_rf.rf_calc_noise(_mac);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
bwi_rf_lo_update(struct bwi_mac *_mac)
|
||||
{
|
||||
return _mac->mac_rf.rf_lo_update(_mac);
|
||||
}
|
||||
|
||||
#define RF_WRITE(mac, ofs, val) bwi_rf_write((mac), (ofs), (val))
|
||||
#define RF_READ(mac, ofs) bwi_rf_read((mac), (ofs))
|
||||
|
||||
#define RF_SETBITS(mac, ofs, bits) \
|
||||
RF_WRITE((mac), (ofs), RF_READ((mac), (ofs)) | (bits))
|
||||
#define RF_CLRBITS(mac, ofs, bits) \
|
||||
RF_WRITE((mac), (ofs), RF_READ((mac), (ofs)) & ~(bits))
|
||||
#define RF_FILT_SETBITS(mac, ofs, filt, bits) \
|
||||
RF_WRITE((mac), (ofs), (RF_READ((mac), (ofs)) & (filt)) | (bits))
|
||||
|
||||
#define BWI_RFR_ATTEN 0x43
|
||||
|
||||
#define BWI_RFR_TXPWR 0x52
|
||||
#define BWI_RFR_TXPWR1_MASK __BITS(6, 4)
|
||||
|
||||
#define BWI_RFR_BBP_ATTEN 0x60
|
||||
#define BWI_RFR_BBP_ATTEN_CALIB_BIT __BIT(0)
|
||||
#define BWI_RFR_BBP_ATTEN_CALIB_IDX __BITS(4, 1)
|
||||
|
||||
/*
|
||||
* TSSI -- TX power maps
|
||||
*/
|
||||
/*
|
||||
* http://bcm-specs.sipsolutions.net/TSSI_to_DBM_Table
|
||||
* B PHY
|
||||
*/
|
||||
#define BWI_TXPOWER_MAP_11B \
|
||||
0x4d, 0x4c, 0x4b, 0x4a, 0x4a, 0x49, 0x48, 0x47, \
|
||||
0x47, 0x46, 0x45, 0x45, 0x44, 0x43, 0x42, 0x42, \
|
||||
0x41, 0x40, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a, \
|
||||
0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x32, 0x31, \
|
||||
0x30, 0x2f, 0x2d, 0x2c, 0x2b, 0x29, 0x28, 0x26, \
|
||||
0x25, 0x23, 0x21, 0x1f, 0x1d, 0x1a, 0x17, 0x14, \
|
||||
0x10, 0x0c, 0x06, 0x00, -7, -7, -7, -7, \
|
||||
-7, -7, -7, -7, -7, -7, -7, -7
|
||||
/*
|
||||
* http://bcm-specs.sipsolutions.net/TSSI_to_DBM_Table
|
||||
* G PHY
|
||||
*/
|
||||
#define BWI_TXPOWER_MAP_11G \
|
||||
77, 77, 77, 76, 76, 76, 75, 75, \
|
||||
74, 74, 73, 73, 73, 72, 72, 71, \
|
||||
71, 70, 70, 69, 68, 68, 67, 67, \
|
||||
66, 65, 65, 64, 63, 63, 62, 61, \
|
||||
60, 59, 58, 57, 56, 55, 54, 53, \
|
||||
52, 50, 49, 47, 45, 43, 40, 37, \
|
||||
33, 28, 22, 14, 5, -7, -20, -20, \
|
||||
-20, -20, -20, -20, -20, -20, -20, -20
|
||||
|
||||
#endif /* !_BWI_RF_H */
|
||||
4056
sys/dev/bwi/if_bwi.c
Normal file
4056
sys/dev/bwi/if_bwi.c
Normal file
File diff suppressed because it is too large
Load Diff
253
sys/dev/bwi/if_bwi_pci.c
Normal file
253
sys/dev/bwi/if_bwi_pci.c
Normal file
@ -0,0 +1,253 @@
|
||||
/*-
|
||||
* Copyright (c) 2002-2007 Sam Leffler, Errno Consulting
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer,
|
||||
* without modification.
|
||||
* 2. Redistributions in binary form must reproduce at minimum a disclaimer
|
||||
* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
|
||||
* redistribution must be conditioned upon including a substantially
|
||||
* similar Disclaimer requirement for further binary redistribution.
|
||||
*
|
||||
* NO WARRANTY
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
|
||||
* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
|
||||
* THE POSSIBILITY OF SUCH DAMAGES.
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
/*
|
||||
* PCI/Cardbus front-end for the Broadcom Wireless LAN controller driver.
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/module.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/errno.h>
|
||||
|
||||
#include <machine/bus.h>
|
||||
#include <machine/resource.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/rman.h>
|
||||
|
||||
#include <sys/socket.h>
|
||||
|
||||
#include <net/if.h>
|
||||
#include <net/if_media.h>
|
||||
#include <net/if_arp.h>
|
||||
|
||||
#include <net80211/ieee80211_var.h>
|
||||
#include <net80211/ieee80211_radiotap.h>
|
||||
#include <net80211/ieee80211_amrr.h>
|
||||
|
||||
#include <dev/pci/pcivar.h>
|
||||
#include <dev/pci/pcireg.h>
|
||||
|
||||
#include <dev/bwi/if_bwivar.h>
|
||||
#include <dev/bwi/if_bwireg.h>
|
||||
#include <dev/bwi/bitops.h>
|
||||
|
||||
/*
|
||||
* PCI glue.
|
||||
*/
|
||||
|
||||
struct bwi_pci_softc {
|
||||
struct bwi_softc sc_sc;
|
||||
};
|
||||
|
||||
#define BS_BAR 0x10
|
||||
#define PCIR_RETRY_TIMEOUT 0x41
|
||||
|
||||
static const struct bwi_dev {
|
||||
uint16_t vid;
|
||||
uint16_t did;
|
||||
const char *desc;
|
||||
} bwi_devices[] = {
|
||||
{ PCI_VENDOR_BROADCOM, 0x4301,"Broadcom BCM4301 802.11 Wireless Lan" },
|
||||
{ PCI_VENDOR_BROADCOM, 0x4307,"Broadcom BCM4307 802.11 Wireless Lan" },
|
||||
{ PCI_VENDOR_BROADCOM, 0x4311,"Broadcom BCM4311 802.11 Wireless Lan" },
|
||||
{ PCI_VENDOR_BROADCOM, 0x4312,"Broadcom BCM4312 802.11 Wireless Lan" },
|
||||
{ PCI_VENDOR_BROADCOM, 0x4320,"Broadcom BCM4306v1 802.11 Wireless Lan"},
|
||||
{ PCI_VENDOR_BROADCOM, 0x4321,"Broadcom BCM4306v2 802.11 Wireless Lan"},
|
||||
{ PCI_VENDOR_BROADCOM, 0x4325,"Broadcom BCM4306v3 802.11 Wireless Lan"},
|
||||
{ PCI_VENDOR_BROADCOM, 0x4324,"Broadcom BCM4309 802.11 Wireless Lan" },
|
||||
{ PCI_VENDOR_BROADCOM, 0x4318,"Broadcom BCM4318 802.11 Wireless Lan" },
|
||||
{ PCI_VENDOR_BROADCOM, 0x4319,"Broadcom BCM4319 802.11 Wireless Lan" }
|
||||
};
|
||||
|
||||
static int
|
||||
bwi_pci_probe(device_t dev)
|
||||
{
|
||||
const struct bwi_dev *b;
|
||||
uint16_t did, vid;
|
||||
|
||||
did = pci_get_device(dev);
|
||||
vid = pci_get_vendor(dev);
|
||||
|
||||
for (b = bwi_devices; b->desc != NULL; ++b) {
|
||||
if (b->did == did && b->vid == vid) {
|
||||
device_set_desc(dev, b->desc);
|
||||
return BUS_PROBE_DEFAULT;
|
||||
}
|
||||
}
|
||||
return ENXIO;
|
||||
}
|
||||
|
||||
static int
|
||||
bwi_pci_attach(device_t dev)
|
||||
{
|
||||
struct bwi_pci_softc *psc = device_get_softc(dev);
|
||||
struct bwi_softc *sc = &psc->sc_sc;
|
||||
int error = ENXIO;
|
||||
|
||||
sc->sc_dev = dev;
|
||||
|
||||
/*
|
||||
* Enable bus mastering.
|
||||
*/
|
||||
pci_enable_busmaster(dev);
|
||||
|
||||
/*
|
||||
* Setup memory-mapping of PCI registers.
|
||||
*/
|
||||
sc->sc_mem_rid = BWI_PCIR_BAR;
|
||||
sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
|
||||
&sc->sc_mem_rid, RF_ACTIVE);
|
||||
if (sc->sc_mem_res == NULL) {
|
||||
device_printf(dev, "cannot map register space\n");
|
||||
goto bad;
|
||||
}
|
||||
sc->sc_mem_bt = rman_get_bustag(sc->sc_mem_res);
|
||||
sc->sc_mem_bh = rman_get_bushandle(sc->sc_mem_res);
|
||||
/*
|
||||
* Mark device invalid so any interrupts (shared or otherwise)
|
||||
* that arrive before the card is setup are discarded.
|
||||
*/
|
||||
sc->sc_invalid = 1;
|
||||
|
||||
/*
|
||||
* Arrange interrupt line.
|
||||
*/
|
||||
sc->sc_irq_rid = 0;
|
||||
sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
|
||||
&sc->sc_irq_rid,
|
||||
RF_SHAREABLE|RF_ACTIVE);
|
||||
if (sc->sc_irq_res == NULL) {
|
||||
device_printf(dev, "could not map interrupt\n");
|
||||
goto bad1;
|
||||
}
|
||||
if (bus_setup_intr(dev, sc->sc_irq_res,
|
||||
INTR_TYPE_NET | INTR_MPSAFE,
|
||||
NULL, bwi_intr, sc, &sc->sc_irq_handle)) {
|
||||
device_printf(dev, "could not establish interrupt\n");
|
||||
goto bad2;
|
||||
}
|
||||
|
||||
/* Get more PCI information */
|
||||
sc->sc_pci_did = pci_get_device(dev);
|
||||
sc->sc_pci_revid = pci_get_revid(dev);
|
||||
sc->sc_pci_subvid = pci_get_subvendor(dev);
|
||||
sc->sc_pci_subdid = pci_get_subdevice(dev);
|
||||
|
||||
error = bwi_attach(sc);
|
||||
if (error == 0) /* success */
|
||||
return 0;
|
||||
|
||||
bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_irq_handle);
|
||||
bad2:
|
||||
bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res);
|
||||
bad1:
|
||||
bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, sc->sc_mem_res);
|
||||
bad:
|
||||
return (error);
|
||||
}
|
||||
|
||||
static int
|
||||
bwi_pci_detach(device_t dev)
|
||||
{
|
||||
struct bwi_pci_softc *psc = device_get_softc(dev);
|
||||
struct bwi_softc *sc = &psc->sc_sc;
|
||||
|
||||
/* check if device was removed */
|
||||
sc->sc_invalid = !bus_child_present(dev);
|
||||
|
||||
bwi_detach(sc);
|
||||
|
||||
bus_generic_detach(dev);
|
||||
bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_irq_handle);
|
||||
bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res);
|
||||
|
||||
bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, sc->sc_mem_res);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
bwi_pci_shutdown(device_t dev)
|
||||
{
|
||||
struct bwi_pci_softc *psc = device_get_softc(dev);
|
||||
|
||||
bwi_shutdown(&psc->sc_sc);
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
bwi_pci_suspend(device_t dev)
|
||||
{
|
||||
struct bwi_pci_softc *psc = device_get_softc(dev);
|
||||
|
||||
bwi_suspend(&psc->sc_sc);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
bwi_pci_resume(device_t dev)
|
||||
{
|
||||
struct bwi_pci_softc *psc = device_get_softc(dev);
|
||||
|
||||
bwi_resume(&psc->sc_sc);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static device_method_t bwi_pci_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, bwi_pci_probe),
|
||||
DEVMETHOD(device_attach, bwi_pci_attach),
|
||||
DEVMETHOD(device_detach, bwi_pci_detach),
|
||||
DEVMETHOD(device_shutdown, bwi_pci_shutdown),
|
||||
DEVMETHOD(device_suspend, bwi_pci_suspend),
|
||||
DEVMETHOD(device_resume, bwi_pci_resume),
|
||||
|
||||
{ 0,0 }
|
||||
};
|
||||
static driver_t bwi_driver = {
|
||||
"bwi",
|
||||
bwi_pci_methods,
|
||||
sizeof (struct bwi_pci_softc)
|
||||
};
|
||||
static devclass_t bwi_devclass;
|
||||
DRIVER_MODULE(if_bwi, pci, bwi_driver, bwi_devclass, 0, 0);
|
||||
DRIVER_MODULE(bwi, cardbus, bwi_driver, bwi_devclass, 0, 0);
|
||||
MODULE_VERSION(if_bwi, 1);
|
||||
MODULE_DEPEND(if_bwi, wlan, 1, 1, 1); /* 802.11 media layer */
|
||||
MODULE_DEPEND(if_bwi, firmware, 1, 1, 1); /* firmware support */
|
||||
MODULE_DEPEND(if_bwi, wlan_amrr, 1, 1, 1);
|
||||
496
sys/dev/bwi/if_bwireg.h
Normal file
496
sys/dev/bwi/if_bwireg.h
Normal file
@ -0,0 +1,496 @@
|
||||
/*
|
||||
* Copyright (c) 2007 The DragonFly Project. All rights reserved.
|
||||
*
|
||||
* This code is derived from software contributed to The DragonFly Project
|
||||
* by Sepherosa Ziehau <sepherosa@gmail.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name of The DragonFly Project nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific, prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $DragonFly: src/sys/dev/netif/bwi/if_bwireg.h,v 1.4 2007/10/19 14:27:04 sephe Exp $
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#ifndef _IF_BWIREG_H
|
||||
#define _IF_BWIREG_H
|
||||
|
||||
/*
|
||||
* Registers for all of the register windows
|
||||
*/
|
||||
#define BWI_FLAGS 0xf18
|
||||
#define BWI_FLAGS_INTR_MASK __BITS(5, 0)
|
||||
|
||||
#define BWI_IMSTATE 0xf90
|
||||
#define BWI_IMSTATE_INBAND_ERR __BIT(17)
|
||||
#define BWI_IMSTATE_TIMEOUT __BIT(18)
|
||||
|
||||
#define BWI_INTRVEC 0xf94
|
||||
|
||||
#define BWI_STATE_LO 0xf98
|
||||
#define BWI_STATE_LO_RESET __BIT(0)
|
||||
#define BWI_STATE_LO_DISABLE1 __BIT(1)
|
||||
#define BWI_STATE_LO_DISABLE2 __BIT(2)
|
||||
#define BWI_STATE_LO_CLOCK __BIT(16)
|
||||
#define BWI_STATE_LO_GATED_CLOCK __BIT(17)
|
||||
#define BWI_STATE_LO_FLAG_PHYCLKEN __BIT(0)
|
||||
#define BWI_STATE_LO_FLAG_PHYRST __BIT(1)
|
||||
#define BWI_STATE_LO_FLAG_PHYLNK __BIT(11)
|
||||
#define BWI_STATE_LO_FLAGS_MASK __BITS(29, 18)
|
||||
|
||||
#define BWI_STATE_HI 0xf9c
|
||||
#define BWI_STATE_HI_SERROR __BIT(0)
|
||||
#define BWI_STATE_HI_BUSY __BIT(2)
|
||||
#define BWI_STATE_HI_FLAG_MAGIC1 0x1
|
||||
#define BWI_STATE_HI_FLAG_MAGIC2 0x2
|
||||
#define BWI_STATE_HI_FLAG_64BIT 0x1000
|
||||
#define BWI_STATE_HI_FLAGS_MASK __BITS(28, 16)
|
||||
|
||||
#define BWI_CONF_LO 0xfa8
|
||||
#define BWI_CONF_LO_SERVTO_MASK __BITS(2, 0) /* service timeout */
|
||||
#define BWI_CONF_LO_SERVTO 2
|
||||
#define BWI_CONF_LO_REQTO_MASK __BITS(6, 4) /* request timeout */
|
||||
#define BWI_CONF_LO_REQTO 3
|
||||
|
||||
|
||||
#define BWI_ID_LO 0xff8
|
||||
#define BWI_ID_LO_BUSREV_MASK __BITS(31, 28)
|
||||
/* Bus revision */
|
||||
#define BWI_BUSREV_0 0
|
||||
#define BWI_BUSREV_1 1
|
||||
|
||||
#define BWI_ID_HI 0xffc
|
||||
#define BWI_ID_HI_REGWIN_REV(v) (((v) & 0xf) | (((v) & 0x7000) >> 8))
|
||||
#define BWI_ID_HI_REGWIN_TYPE(v) (((v) & 0x8ff0) >> 4)
|
||||
#define BWI_ID_HI_REGWIN_VENDOR_MASK __BITS(31, 16)
|
||||
|
||||
/*
|
||||
* Registers for common register window
|
||||
*/
|
||||
#define BWI_INFO 0x0
|
||||
#define BWI_INFO_BBPID_MASK __BITS(15, 0)
|
||||
#define BWI_INFO_BBPREV_MASK __BITS(19, 16)
|
||||
#define BWI_INFO_BBPPKG_MASK __BITS(23, 20)
|
||||
#define BWI_INFO_NREGWIN_MASK __BITS(27, 24)
|
||||
|
||||
#define BWI_CAPABILITY 0x4
|
||||
#define BWI_CAP_CLKMODE __BIT(18)
|
||||
|
||||
#define BWI_CONTROL 0x28
|
||||
#define BWI_CONTROL_MAGIC0 0x3a4
|
||||
#define BWI_CONTROL_MAGIC1 0xa4
|
||||
#define BWI_PLL_ON_DELAY 0xb0
|
||||
#define BWI_FREQ_SEL_DELAY 0xb4
|
||||
|
||||
#define BWI_CLOCK_CTRL 0xb8
|
||||
#define BWI_CLOCK_CTRL_CLKSRC __BITS(2, 0)
|
||||
#define BWI_CLOCK_CTRL_SLOW __BIT(11)
|
||||
#define BWI_CLOCK_CTRL_IGNPLL __BIT(12)
|
||||
#define BWI_CLOCK_CTRL_NODYN __BIT(13)
|
||||
#define BWI_CLOCK_CTRL_FDIV __BITS(31, 16) /* freq divisor */
|
||||
|
||||
/* Possible values for BWI_CLOCK_CTRL_CLKSRC */
|
||||
#define BWI_CLKSRC_LP_OSC 0 /* Low power oscillator */
|
||||
#define BWI_CLKSRC_CS_OSC 1 /* Crystal oscillator */
|
||||
#define BWI_CLKSRC_PCI 2
|
||||
#define BWI_CLKSRC_MAX 3 /* Maximum of clock source */
|
||||
/* Min/Max frequency for given clock source */
|
||||
#define BWI_CLKSRC_LP_OSC_FMIN 25000
|
||||
#define BWI_CLKSRC_LP_OSC_FMAX 43000
|
||||
#define BWI_CLKSRC_CS_OSC_FMIN 19800000
|
||||
#define BWI_CLKSRC_CS_OSC_FMAX 20200000
|
||||
#define BWI_CLKSRC_PCI_FMIN 25000000
|
||||
#define BWI_CLKSRC_PCI_FMAX 34000000
|
||||
|
||||
#define BWI_CLOCK_INFO 0xc0
|
||||
#define BWI_CLOCK_INFO_FDIV __BITS(31, 16) /* freq divisor */
|
||||
|
||||
/*
|
||||
* Registers for bus register window
|
||||
*/
|
||||
#define BWI_BUS_ADDR 0x50
|
||||
#define BWI_BUS_ADDR_MAGIC 0xfd8
|
||||
|
||||
#define BWI_BUS_DATA 0x54
|
||||
|
||||
#define BWI_BUS_CONFIG 0x108
|
||||
#define BWI_BUS_CONFIG_PREFETCH __BIT(2)
|
||||
#define BWI_BUS_CONFIG_BURST __BIT(3)
|
||||
#define BWI_BUS_CONFIG_MRM __BIT(5)
|
||||
|
||||
/*
|
||||
* Register for MAC
|
||||
*/
|
||||
#define BWI_TXRX_INTR_STATUS_BASE 0x20
|
||||
#define BWI_TXRX_INTR_MASK_BASE 0x24
|
||||
#define BWI_TXRX_INTR_STATUS(i) (BWI_TXRX_INTR_STATUS_BASE + ((i) * 8))
|
||||
#define BWI_TXRX_INTR_MASK(i) (BWI_TXRX_INTR_MASK_BASE + ((i) * 8))
|
||||
|
||||
#define BWI_MAC_STATUS 0x120
|
||||
#define BWI_MAC_STATUS_ENABLE __BIT(0)
|
||||
#define BWI_MAC_STATUS_UCODE_START __BIT(1)
|
||||
#define BWI_MAC_STATUS_UCODE_JUMP0 __BIT(2)
|
||||
#define BWI_MAC_STATUS_IHREN __BIT(10)
|
||||
#define BWI_MAC_STATUS_GPOSEL_MASK __BITS(15, 14)
|
||||
#define BWI_MAC_STATUS_BSWAP __BIT(16)
|
||||
#define BWI_MAC_STATUS_INFRA __BIT(17)
|
||||
#define BWI_MAC_STATUS_OPMODE_HOSTAP __BIT(18)
|
||||
#define BWI_MAC_STATUS_RFLOCK __BIT(19)
|
||||
#define BWI_MAC_STATUS_PASS_BCN __BIT(20)
|
||||
#define BWI_MAC_STATUS_PASS_BADPLCP __BIT(21)
|
||||
#define BWI_MAC_STATUS_PASS_CTL __BIT(22)
|
||||
#define BWI_MAC_STATUS_PASS_BADFCS __BIT(23)
|
||||
#define BWI_MAC_STATUS_PROMISC __BIT(24)
|
||||
#define BWI_MAC_STATUS_HW_PS __BIT(25)
|
||||
#define BWI_MAC_STATUS_WAKEUP __BIT(26)
|
||||
#define BWI_MAC_STATUS_PHYLNK __BIT(31)
|
||||
|
||||
#define BWI_MAC_INTR_STATUS 0x128
|
||||
#define BWI_MAC_INTR_MASK 0x12c
|
||||
|
||||
#define BWI_MAC_TMPLT_CTRL 0x130
|
||||
#define BWI_MAC_TMPLT_DATA 0x134
|
||||
|
||||
#define BWI_MAC_PS_STATUS 0x140
|
||||
|
||||
#define BWI_MOBJ_CTRL 0x160
|
||||
#define BWI_MOBJ_CTRL_VAL(objid, ofs) ((objid) << 16 | (ofs))
|
||||
#define BWI_MOBJ_DATA 0x164
|
||||
#define BWI_MOBJ_DATA_UNALIGN 0x166
|
||||
/*
|
||||
* Memory object IDs
|
||||
*/
|
||||
#define BWI_WR_MOBJ_AUTOINC 0x100 /* Auto-increment wr */
|
||||
#define BWI_RD_MOBJ_AUTOINC 0x200 /* Auto-increment rd */
|
||||
/* Firmware ucode object */
|
||||
#define BWI_FW_UCODE_MOBJ 0x0
|
||||
/* Common object */
|
||||
#define BWI_COMM_MOBJ 0x1
|
||||
#define BWI_COMM_MOBJ_FWREV 0x0
|
||||
#define BWI_COMM_MOBJ_FWPATCHLV 0x2
|
||||
#define BWI_COMM_MOBJ_SLOTTIME 0x10
|
||||
#define BWI_COMM_MOBJ_MACREV 0x16
|
||||
#define BWI_COMM_MOBJ_TX_ACK 0x22
|
||||
#define BWI_COMM_MOBJ_UCODE_STATE 0x40
|
||||
#define BWI_COMM_MOBJ_SHRETRY_FB 0x44
|
||||
#define BWI_COMM_MOBJ_LGRETEY_FB 0x46
|
||||
#define BWI_COMM_MOBJ_TX_BEACON 0x54
|
||||
#define BWI_COMM_MOBJ_KEYTABLE_OFS 0x56
|
||||
#define BWI_COMM_MOBJ_TSSI_DS 0x58
|
||||
#define BWI_COMM_MOBJ_HFLAGS_LO 0x5e
|
||||
#define BWI_COMM_MOBJ_HFLAGS_MI 0x60
|
||||
#define BWI_COMM_MOBJ_HFLAGS_HI 0x62
|
||||
#define BWI_COMM_MOBJ_RF_ATTEN 0x64
|
||||
#define BWI_COMM_MOBJ_RF_NOISE 0x6e
|
||||
#define BWI_COMM_MOBJ_TSSI_OFDM 0x70
|
||||
#define BWI_COMM_MOBJ_PROBE_RESP_TO 0x74
|
||||
#define BWI_COMM_MOBJ_CHAN 0xa0
|
||||
#define BWI_COMM_MOBJ_KEY_ALGO 0x100
|
||||
#define BWI_COMM_MOBJ_TX_PROBE_RESP 0x188
|
||||
#define BWI_HFLAG_AUTO_ANTDIV 0x1ULL
|
||||
#define BWI_HFLAG_SYM_WA 0x2ULL /* ??? SYM work around */
|
||||
#define BWI_HFLAG_PWR_BOOST_DS 0x8ULL
|
||||
#define BWI_HFLAG_GDC_WA 0x20ULL /* ??? GDC work around */
|
||||
#define BWI_HFLAG_OFDM_PA 0x40ULL
|
||||
#define BWI_HFLAG_NOT_JAPAN 0x80ULL
|
||||
#define BWI_HFLAG_MAGIC1 0x200ULL
|
||||
#define BWI_UCODE_STATE_PS 4
|
||||
#define BWI_LO_TSSI_MASK __BITS(7, 0)
|
||||
#define BWI_HI_TSSI_MASK __BITS(15, 8)
|
||||
#define BWI_INVALID_TSSI 0x7f
|
||||
/* 802.11 object */
|
||||
#define BWI_80211_MOBJ 0x2
|
||||
#define BWI_80211_MOBJ_CWMIN 0xc
|
||||
#define BWI_80211_MOBJ_CWMAX 0x10
|
||||
#define BWI_80211_MOBJ_SHRETRY 0x18
|
||||
#define BWI_80211_MOBJ_LGRETRY 0x1c
|
||||
/* Firmware PCM object */
|
||||
#define BWI_FW_PCM_MOBJ 0x3
|
||||
/* MAC address of pairwise keys */
|
||||
#define BWI_PKEY_ADDR_MOBJ 0x4
|
||||
|
||||
#define BWI_TXSTATUS0 0x170
|
||||
#define BWI_TXSTATUS0_VALID __BIT(0)
|
||||
#define BWI_TXSTATUS0_ACKED __BIT(1)
|
||||
#define BWI_TXSTATUS0_FREASON_MASK __BITS(4, 2) /* Failure reason */
|
||||
#define BWI_TXSTATUS0_AMPDU __BIT(5)
|
||||
#define BWI_TXSTATUS0_PENDING __BIT(6)
|
||||
#define BWI_TXSTATUS0_PM __BIT(7)
|
||||
#define BWI_TXSTATUS0_RTS_TXCNT_MASK __BITS(11, 8)
|
||||
#define BWI_TXSTATUS0_DATA_TXCNT_MASK __BITS(15, 12)
|
||||
#define BWI_TXSTATUS0_TXID_MASK __BITS(31, 16)
|
||||
#define BWI_TXSTATUS1 0x174
|
||||
|
||||
#define BWI_TXRX_CTRL_BASE 0x200
|
||||
#define BWI_TX32_CTRL 0x0
|
||||
#define BWI_TX32_RINGINFO 0x4
|
||||
#define BWI_TX32_INDEX 0x8
|
||||
#define BWI_TX32_STATUS 0xc
|
||||
#define BWI_TX32_STATUS_STATE_MASK __BITS(15, 12)
|
||||
#define BWI_TX32_STATUS_STATE_DISABLED 0
|
||||
#define BWI_TX32_STATUS_STATE_IDLE 2
|
||||
#define BWI_TX32_STATUS_STATE_STOPPED 3
|
||||
#define BWI_RX32_CTRL 0x10
|
||||
#define BWI_RX32_CTRL_HDRSZ_MASK __BITS(7, 1)
|
||||
#define BWI_RX32_RINGINFO 0x14
|
||||
#define BWI_RX32_INDEX 0x18
|
||||
#define BWI_RX32_STATUS 0x1c
|
||||
#define BWI_RX32_STATUS_INDEX_MASK __BITS(11, 0)
|
||||
#define BWI_RX32_STATUS_STATE_MASK __BITS(15, 12)
|
||||
#define BWI_RX32_STATUS_STATE_DISABLED 0
|
||||
/* Shared by 32bit TX/RX CTRL */
|
||||
#define BWI_TXRX32_CTRL_ENABLE __BIT(0)
|
||||
#define BWI_TXRX32_CTRL_ADDRHI_MASK __BITS(17, 16)
|
||||
/* Shared by 32bit TX/RX RINGINFO */
|
||||
#define BWI_TXRX32_RINGINFO_FUNC_TXRX 0x1
|
||||
#define BWI_TXRX32_RINGINFO_FUNC_MASK __BITS(31, 30)
|
||||
#define BWI_TXRX32_RINGINFO_ADDR_MASK __BITS(29, 0)
|
||||
|
||||
#define BWI_PHYINFO 0x3e0
|
||||
#define BWI_PHYINFO_REV_MASK __BITS(3, 0)
|
||||
#define BWI_PHYINFO_TYPE_MASK __BITS(11, 8)
|
||||
#define BWI_PHYINFO_TYPE_11A 0
|
||||
#define BWI_PHYINFO_TYPE_11B 1
|
||||
#define BWI_PHYINFO_TYPE_11G 2
|
||||
#define BWI_PHYINFO_TYPE_11N 5
|
||||
#define BWI_PHYINFO_VER_MASK __BITS(15, 12)
|
||||
|
||||
#define BWI_RF_ANTDIV 0x3e2 /* Antenna Diversity?? */
|
||||
|
||||
#define BWI_PHY_MAGIC_REG1 0x3e4
|
||||
#define BWI_PHY_MAGIC_REG1_VAL1 0x3000
|
||||
#define BWI_PHY_MAGIC_REG1_VAL2 0x9
|
||||
|
||||
#define BWI_BBP_ATTEN 0x3e6
|
||||
#define BWI_BBP_ATTEN_MAGIC 0xf4
|
||||
#define BWI_BBP_ATTEN_MAGIC2 0x8140
|
||||
|
||||
#define BWI_BPHY_CTRL 0x3ec
|
||||
#define BWI_BPHY_CTRL_INIT 0x3f22
|
||||
|
||||
#define BWI_RF_CHAN 0x3f0
|
||||
#define BWI_RF_CHAN_EX 0x3f4
|
||||
|
||||
#define BWI_RF_CTRL 0x3f6
|
||||
/* Register values for BWI_RF_CTRL */
|
||||
#define BWI_RF_CTRL_RFINFO 0x1
|
||||
/* XXX extra bits for reading from radio */
|
||||
#define BWI_RF_CTRL_RD_11A 0x40
|
||||
#define BWI_RF_CTRL_RD_11BG 0x80
|
||||
#define BWI_RF_DATA_HI 0x3f8
|
||||
#define BWI_RF_DATA_LO 0x3fa
|
||||
/* Values read from BWI_RF_DATA_{HI,LO} after BWI_RF_CTRL_RFINFO */
|
||||
#define BWI_RFINFO_MANUFACT_MASK __BITS(11, 0)
|
||||
#define BWI_RF_MANUFACT_BCM 0x17f /* XXX */
|
||||
#define BWI_RFINFO_TYPE_MASK __BITS(27, 12)
|
||||
#define BWI_RF_T_BCM2050 0x2050
|
||||
#define BWI_RF_T_BCM2053 0x2053
|
||||
#define BWI_RF_T_BCM2060 0x2060
|
||||
#define BWI_RFINFO_REV_MASK __BITS(31, 28)
|
||||
|
||||
#define BWI_PHY_CTRL 0x3fc
|
||||
#define BWI_PHY_DATA 0x3fe
|
||||
|
||||
#define BWI_ADDR_FILTER_CTRL 0x420
|
||||
#define BWI_ADDR_FILTER_CTRL_SET 0x20
|
||||
#define BWI_ADDR_FILTER_MYADDR 0
|
||||
#define BWI_ADDR_FILTER_BSSID 3
|
||||
#define BWI_ADDR_FILTER_DATA 0x422
|
||||
|
||||
#define BWI_MAC_GPIO_CTRL 0x49c
|
||||
#define BWI_MAC_GPIO_MASK 0x49e
|
||||
#define BWI_MAC_PRE_TBTT 0x612
|
||||
#define BWI_MAC_SLOTTIME 0x684
|
||||
#define BWI_MAC_SLOTTIME_ADJUST 510
|
||||
#define BWI_MAC_POWERUP_DELAY 0x6a8
|
||||
|
||||
/*
|
||||
* Special registers
|
||||
*/
|
||||
/*
|
||||
* GPIO control
|
||||
* If common regwin exists, then it is within common regwin,
|
||||
* else it is in bus regwin.
|
||||
*/
|
||||
#define BWI_GPIO_CTRL 0x6c
|
||||
|
||||
#define PCI_VENDOR_BROADCOM 0x14e4 /* Broadcom */
|
||||
#define PCI_PRODUCT_BROADCOM_BCM4309 0x4324
|
||||
|
||||
/*
|
||||
* Extended PCI registers
|
||||
*/
|
||||
#define BWI_PCIR_BAR PCIR_BAR(0)
|
||||
#define BWI_PCIR_SEL_REGWIN 0x80
|
||||
/* Register value for BWI_PCIR_SEL_REGWIN */
|
||||
#define BWI_PCIM_REGWIN(id) (((id) * 0x1000) + 0x18000000)
|
||||
#define BWI_PCIR_GPIO_IN 0xb0
|
||||
#define BWI_PCIR_GPIO_OUT 0xb4
|
||||
#define BWI_PCIM_GPIO_OUT_CLKSRC __BIT(4)
|
||||
#define BWI_PCIR_GPIO_ENABLE 0xb8
|
||||
/* Register values for BWI_PCIR_GPIO_{IN,OUT,ENABLE} */
|
||||
#define BWI_PCIM_GPIO_PWR_ON __BIT(6)
|
||||
#define BWI_PCIM_GPIO_PLL_PWR_OFF __BIT(7)
|
||||
#define BWI_PCIR_INTCTL 0x94
|
||||
|
||||
/*
|
||||
* PCI subdevice IDs
|
||||
*/
|
||||
#define BWI_PCI_SUBDEVICE_BU4306 0x416
|
||||
#define BWI_PCI_SUBDEVICE_BCM4309G 0x421
|
||||
|
||||
#define BWI_IS_BRCM_BU4306(sc) \
|
||||
((sc)->sc_pci_subvid == PCI_VENDOR_BROADCOM && \
|
||||
(sc)->sc_pci_subdid == BWI_PCI_SUBDEVICE_BU4306)
|
||||
#define BWI_IS_BRCM_BCM4309G(sc) \
|
||||
((sc)->sc_pci_subvid == PCI_VENDOR_BROADCOM && \
|
||||
(sc)->sc_pci_subdid == BWI_PCI_SUBDEVICE_BCM4309G)
|
||||
|
||||
/*
|
||||
* EEPROM start address
|
||||
*/
|
||||
#define BWI_SPROM_START 0x1000
|
||||
#define BWI_SPROM_11BG_EADDR 0x48
|
||||
#define BWI_SPROM_11A_EADDR 0x54
|
||||
#define BWI_SPROM_CARD_INFO 0x5c
|
||||
#define BWI_SPROM_CARD_INFO_LOCALE __BITS(11, 8)
|
||||
#define BWI_SPROM_LOCALE_JAPAN 5
|
||||
#define BWI_SPROM_PA_PARAM_11BG 0x5e
|
||||
#define BWI_SPROM_GPIO01 0x64
|
||||
#define BWI_SPROM_GPIO_0 __BITS(7, 0)
|
||||
#define BWI_SPROM_GPIO_1 __BITS(15, 8)
|
||||
#define BWI_SPROM_GPIO23 0x66
|
||||
#define BWI_SPROM_GPIO_2 __BITS(7, 0)
|
||||
#define BWI_SPROM_GPIO_3 __BITS(15, 8)
|
||||
#define BWI_SPROM_MAX_TXPWR 0x68
|
||||
#define BWI_SPROM_MAX_TXPWR_MASK_11BG __BITS(7, 0) /* XXX */
|
||||
#define BWI_SPROM_MAX_TXPWR_MASK_11A __BITS(15, 8) /* XXX */
|
||||
#define BWI_SPROM_PA_PARAM_11A 0x6a
|
||||
#define BWI_SPROM_IDLE_TSSI 0x70
|
||||
#define BWI_SPROM_IDLE_TSSI_MASK_11BG __BITS(7, 0) /* XXX */
|
||||
#define BWI_SPROM_IDLE_TSSI_MASK_11A __BITS(15, 8) /* XXX */
|
||||
#define BWI_SPROM_CARD_FLAGS 0x72
|
||||
#define BWI_SPROM_ANT_GAIN 0x74
|
||||
#define BWI_SPROM_ANT_GAIN_MASK_11A __BITS(7, 0)
|
||||
#define BWI_SPROM_ANT_GAIN_MASK_11BG __BITS(15, 8)
|
||||
|
||||
/*
|
||||
* SPROM card flags
|
||||
*/
|
||||
#define BWI_CARD_F_BT_COEXIST __BIT(0) /* Bluetooth coexist */
|
||||
#define BWI_CARD_F_PA_GPIO9 __BIT(1) /* GPIO 9 controls PA */
|
||||
#define BWI_CARD_F_SW_NRSSI __BIT(3)
|
||||
#define BWI_CARD_F_NO_SLOWCLK __BIT(5) /* no slow clock */
|
||||
#define BWI_CARD_F_EXT_LNA __BIT(12) /* external LNA */
|
||||
#define BWI_CARD_F_ALT_IQ __BIT(15) /* alternate I/Q */
|
||||
|
||||
/*
|
||||
* SPROM GPIO
|
||||
*/
|
||||
#define BWI_LED_ACT_LOW __BIT(7)
|
||||
#define BWI_LED_ACT_MASK __BITS(6, 0)
|
||||
#define BWI_LED_ACT_OFF 0
|
||||
#define BWI_LED_ACT_ON 1
|
||||
#define BWI_LED_ACT_BLINK 2
|
||||
#define BWI_LED_ACT_RF_ENABLED 3
|
||||
#define BWI_LED_ACT_5GHZ 4
|
||||
#define BWI_LED_ACT_2GHZ 5
|
||||
#define BWI_LED_ACT_11G 6
|
||||
#define BWI_LED_ACT_BLINK_SLOW 7
|
||||
#define BWI_LED_ACT_BLINK_POLL 8
|
||||
#define BWI_LED_ACT_UNKN 9
|
||||
#define BWI_LED_ACT_ASSOC 10
|
||||
#define BWI_LED_ACT_NULL 11
|
||||
|
||||
#define BWI_VENDOR_LED_ACT_COMPAQ \
|
||||
BWI_LED_ACT_RF_ENABLED, \
|
||||
BWI_LED_ACT_2GHZ, \
|
||||
BWI_LED_ACT_5GHZ, \
|
||||
BWI_LED_ACT_OFF
|
||||
|
||||
#define BWI_VENDOR_LED_ACT_LINKSYS \
|
||||
BWI_LED_ACT_ASSOC, \
|
||||
BWI_LED_ACT_2GHZ, \
|
||||
BWI_LED_ACT_5GHZ, \
|
||||
BWI_LED_ACT_OFF
|
||||
|
||||
#define BWI_VENDOR_LED_ACT_DEFAULT \
|
||||
BWI_LED_ACT_BLINK, \
|
||||
BWI_LED_ACT_2GHZ, \
|
||||
BWI_LED_ACT_5GHZ, \
|
||||
BWI_LED_ACT_OFF
|
||||
|
||||
/*
|
||||
* BBP IDs
|
||||
*/
|
||||
#define BWI_BBPID_BCM4301 0x4301
|
||||
#define BWI_BBPID_BCM4306 0x4306
|
||||
#define BWI_BBPID_BCM4317 0x4317
|
||||
#define BWI_BBPID_BCM4320 0x4320
|
||||
#define BWI_BBPID_BCM4321 0x4321
|
||||
|
||||
/*
|
||||
* Register window types
|
||||
*/
|
||||
#define BWI_REGWIN_T_COM 0x800
|
||||
#define BWI_REGWIN_T_BUSPCI 0x804
|
||||
#define BWI_REGWIN_T_MAC 0x812
|
||||
#define BWI_REGWIN_T_BUSPCIE 0x820
|
||||
|
||||
/*
|
||||
* MAC interrupts
|
||||
*/
|
||||
#define BWI_INTR_READY __BIT(0)
|
||||
#define BWI_INTR_BEACON __BIT(1)
|
||||
#define BWI_INTR_TBTT __BIT(2)
|
||||
#define BWI_INTR_EO_ATIM __BIT(5) /* End of ATIM */
|
||||
#define BWI_INTR_PMQ __BIT(6) /* XXX?? */
|
||||
#define BWI_INTR_MAC_TXERR __BIT(9)
|
||||
#define BWI_INTR_PHY_TXERR __BIT(11)
|
||||
#define BWI_INTR_TIMER1 __BIT(14)
|
||||
#define BWI_INTR_RX_DONE __BIT(15)
|
||||
#define BWI_INTR_TX_FIFO __BIT(16) /* XXX?? */
|
||||
#define BWI_INTR_NOISE __BIT(18)
|
||||
#define BWI_INTR_RF_DISABLED __BIT(28)
|
||||
#define BWI_INTR_TX_DONE __BIT(29)
|
||||
|
||||
#define BWI_INIT_INTRS \
|
||||
(BWI_INTR_READY | BWI_INTR_BEACON | BWI_INTR_TBTT | \
|
||||
BWI_INTR_EO_ATIM | BWI_INTR_PMQ | BWI_INTR_MAC_TXERR | \
|
||||
BWI_INTR_PHY_TXERR | BWI_INTR_RX_DONE | BWI_INTR_TX_FIFO | \
|
||||
BWI_INTR_NOISE | BWI_INTR_RF_DISABLED | BWI_INTR_TX_DONE)
|
||||
#define BWI_ALL_INTRS 0xffffffff
|
||||
|
||||
/*
|
||||
* TX/RX interrupts
|
||||
*/
|
||||
#define BWI_TXRX_INTR_ERROR (__BIT(15) | __BIT(14) | __BITS(12, 10))
|
||||
#define BWI_TXRX_INTR_RX __BIT(16)
|
||||
#define BWI_TXRX_TX_INTRS BWI_TXRX_INTR_ERROR
|
||||
#define BWI_TXRX_RX_INTRS (BWI_TXRX_INTR_ERROR | BWI_TXRX_INTR_RX)
|
||||
#define BWI_TXRX_IS_RX(i) ((i) % 3 == 0)
|
||||
|
||||
#endif /* !_IF_BWIREG_H */
|
||||
711
sys/dev/bwi/if_bwivar.h
Normal file
711
sys/dev/bwi/if_bwivar.h
Normal file
@ -0,0 +1,711 @@
|
||||
/*
|
||||
* Copyright (c) 2007 The DragonFly Project. All rights reserved.
|
||||
*
|
||||
* This code is derived from software contributed to The DragonFly Project
|
||||
* by Sepherosa Ziehau <sepherosa@gmail.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name of The DragonFly Project nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific, prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $DragonFly: src/sys/dev/netif/bwi/if_bwivar.h,v 1.14 2008/02/15 11:15:38 sephe Exp $
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#ifndef _IF_BWIVAR_H
|
||||
#define _IF_BWIVAR_H
|
||||
|
||||
#define BWI_ALIGN 0x1000
|
||||
#define BWI_RING_ALIGN BWI_ALIGN
|
||||
#define BWI_BUS_SPACE_MAXADDR 0x3fffffff
|
||||
|
||||
#define BWI_TX_NRING 6
|
||||
#define BWI_TXRX_NRING 6
|
||||
#define BWI_TX_NDESC 128
|
||||
#define BWI_RX_NDESC 64
|
||||
#define BWI_TXSTATS_NDESC 64
|
||||
#define BWI_TX_NSPRDESC 2
|
||||
#define BWI_TX_DATA_RING 1
|
||||
|
||||
/* XXX Onoe/Sample/AMRR probably need different configuration */
|
||||
#define BWI_SHRETRY 7
|
||||
#define BWI_LGRETRY 4
|
||||
#define BWI_SHRETRY_FB 3
|
||||
#define BWI_LGRETRY_FB 2
|
||||
|
||||
#define BWI_LED_EVENT_NONE -1
|
||||
#define BWI_LED_EVENT_POLL 0
|
||||
#define BWI_LED_EVENT_TX 1
|
||||
#define BWI_LED_EVENT_RX 2
|
||||
#define BWI_LED_SLOWDOWN(dur) (dur) = (((dur) * 3) / 2)
|
||||
|
||||
enum bwi_txpwrcb_type {
|
||||
BWI_TXPWR_INIT = 0,
|
||||
BWI_TXPWR_FORCE = 1,
|
||||
BWI_TXPWR_CALIB = 2
|
||||
};
|
||||
|
||||
#define BWI_NOISE_FLOOR -95 /* TODO: noise floor calc */
|
||||
#define BWI_FRAME_MIN_LEN(hdr) \
|
||||
((hdr) + sizeof(struct ieee80211_frame_ack) + IEEE80211_CRC_LEN)
|
||||
|
||||
#define CSR_READ_4(sc, reg) \
|
||||
bus_space_read_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg))
|
||||
#define CSR_READ_2(sc, reg) \
|
||||
bus_space_read_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg))
|
||||
|
||||
#define CSR_WRITE_4(sc, reg, val) \
|
||||
bus_space_write_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))
|
||||
#define CSR_WRITE_2(sc, reg, val) \
|
||||
bus_space_write_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))
|
||||
|
||||
#define CSR_SETBITS_4(sc, reg, bits) \
|
||||
CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) | (bits))
|
||||
#define CSR_SETBITS_2(sc, reg, bits) \
|
||||
CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) | (bits))
|
||||
|
||||
#define CSR_FILT_SETBITS_4(sc, reg, filt, bits) \
|
||||
CSR_WRITE_4((sc), (reg), (CSR_READ_4((sc), (reg)) & (filt)) | (bits))
|
||||
#define CSR_FILT_SETBITS_2(sc, reg, filt, bits) \
|
||||
CSR_WRITE_2((sc), (reg), (CSR_READ_2((sc), (reg)) & (filt)) | (bits))
|
||||
|
||||
#define CSR_CLRBITS_4(sc, reg, bits) \
|
||||
CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) & ~(bits))
|
||||
#define CSR_CLRBITS_2(sc, reg, bits) \
|
||||
CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) & ~(bits))
|
||||
|
||||
#ifdef BWI_DEBUG
|
||||
|
||||
#define DPRINTF(sc, dbg, fmt, ...) \
|
||||
do { \
|
||||
if ((sc)->sc_debug & (dbg)) \
|
||||
device_printf((sc)->sc_dev, fmt, __VA_ARGS__); \
|
||||
} while (0)
|
||||
|
||||
#define _DPRINTF(sc, dbg, fmt, ...) \
|
||||
do { \
|
||||
if ((sc)->sc_debug & (dbg)) \
|
||||
printf(fmt, __VA_ARGS__); \
|
||||
} while (0)
|
||||
|
||||
#else /* !BWI_DEBUG */
|
||||
|
||||
#define DPRINTF(sc, dbg, fmt, ...) ((void)0)
|
||||
#define _DPRINTF(sc, dbg, fmt, ...) ((void)0)
|
||||
|
||||
#endif /* BWI_DEBUG */
|
||||
|
||||
struct bwi_desc32 {
|
||||
/* Little endian */
|
||||
uint32_t ctrl;
|
||||
uint32_t addr; /* BWI_DESC32_A_ */
|
||||
} __packed;
|
||||
|
||||
#define BWI_DESC32_A_FUNC_TXRX 0x1
|
||||
#define BWI_DESC32_A_FUNC_MASK __BITS(31, 30)
|
||||
#define BWI_DESC32_A_ADDR_MASK __BITS(29, 0)
|
||||
|
||||
#define BWI_DESC32_C_BUFLEN_MASK __BITS(12, 0)
|
||||
#define BWI_DESC32_C_ADDRHI_MASK __BITS(17, 16)
|
||||
#define BWI_DESC32_C_EOR __BIT(28)
|
||||
#define BWI_DESC32_C_INTR __BIT(29)
|
||||
#define BWI_DESC32_C_FRAME_END __BIT(30)
|
||||
#define BWI_DESC32_C_FRAME_START __BIT(31)
|
||||
|
||||
struct bwi_desc64 {
|
||||
/* Little endian */
|
||||
uint32_t ctrl0;
|
||||
uint32_t ctrl1;
|
||||
uint32_t addr_lo;
|
||||
uint32_t addr_hi;
|
||||
} __packed;
|
||||
|
||||
struct bwi_rxbuf_hdr {
|
||||
/* Little endian */
|
||||
uint16_t rxh_buflen; /* exclude bwi_rxbuf_hdr */
|
||||
uint8_t rxh_pad1[2];
|
||||
uint16_t rxh_flags1; /* BWI_RXH_F1_ */
|
||||
uint8_t rxh_rssi;
|
||||
uint8_t rxh_sq;
|
||||
uint16_t rxh_phyinfo; /* BWI_RXH_PHYINFO_ */
|
||||
uint16_t rxh_flags3; /* BWI_RXH_F3_ */
|
||||
uint16_t rxh_flags2; /* BWI_RXH_F2_ */
|
||||
uint16_t rxh_tsf;
|
||||
uint8_t rxh_pad3[14]; /* Padded to 30bytes */
|
||||
} __packed;
|
||||
|
||||
#define BWI_RXH_F1_BCM2053_RSSI __BIT(14)
|
||||
#define BWI_RXH_F1_SHPREAMBLE __BIT(7)
|
||||
#define BWI_RXH_F1_OFDM __BIT(0)
|
||||
|
||||
#define BWI_RXH_F2_TYPE2FRAME __BIT(2)
|
||||
|
||||
#define BWI_RXH_F3_BCM2050_RSSI __BIT(10)
|
||||
|
||||
#define BWI_RXH_PHYINFO_LNAGAIN __BITS(15, 14)
|
||||
|
||||
struct bwi_txbuf_hdr {
|
||||
/* Little endian */
|
||||
uint32_t txh_mac_ctrl; /* BWI_TXH_MAC_C_ */
|
||||
uint8_t txh_fc[2];
|
||||
uint16_t txh_unknown1;
|
||||
uint16_t txh_phy_ctrl; /* BWI_TXH_PHY_C_ */
|
||||
uint8_t txh_ivs[16];
|
||||
uint8_t txh_addr1[IEEE80211_ADDR_LEN];
|
||||
uint16_t txh_unknown2;
|
||||
uint8_t txh_rts_fb_plcp[4];
|
||||
uint16_t txh_rts_fb_duration;
|
||||
uint8_t txh_fb_plcp[4];
|
||||
uint16_t txh_fb_duration;
|
||||
uint8_t txh_pad2[2];
|
||||
uint16_t txh_id; /* BWI_TXH_ID_ */
|
||||
uint16_t txh_unknown3;
|
||||
uint8_t txh_rts_plcp[6];
|
||||
uint8_t txh_rts_fc[2];
|
||||
uint16_t txh_rts_duration;
|
||||
uint8_t txh_rts_ra[IEEE80211_ADDR_LEN];
|
||||
uint8_t txh_rts_ta[IEEE80211_ADDR_LEN];
|
||||
uint8_t txh_pad3[2];
|
||||
uint8_t txh_plcp[6];
|
||||
} __packed;
|
||||
|
||||
#define BWI_TXH_ID_RING_MASK __BITS(15, 13)
|
||||
#define BWI_TXH_ID_IDX_MASK __BITS(12, 0)
|
||||
|
||||
#define BWI_TXH_PHY_C_OFDM __BIT(0)
|
||||
#define BWI_TXH_PHY_C_SHPREAMBLE __BIT(4)
|
||||
#define BWI_TXH_PHY_C_ANTMODE_MASK __BITS(9, 8)
|
||||
|
||||
#define BWI_TXH_MAC_C_ACK __BIT(0)
|
||||
#define BWI_TXH_MAC_C_FIRST_FRAG __BIT(3)
|
||||
#define BWI_TXH_MAC_C_HWSEQ __BIT(4)
|
||||
#define BWI_TXH_MAC_C_FB_OFDM __BIT(8)
|
||||
|
||||
struct bwi_txstats {
|
||||
/* Little endian */
|
||||
uint8_t txs_pad1[4];
|
||||
uint16_t txs_id;
|
||||
uint8_t txs_flags; /* BWI_TXS_F_ */
|
||||
uint8_t txs_txcnt; /* BWI_TXS_TXCNT_ */
|
||||
uint8_t txs_pad2[2];
|
||||
uint16_t txs_seq;
|
||||
uint16_t txs_unknown;
|
||||
uint8_t txs_pad3[2]; /* Padded to 16bytes */
|
||||
} __packed;
|
||||
|
||||
#define BWI_TXS_TXCNT_DATA __BITS(7, 4)
|
||||
|
||||
#define BWI_TXS_F_ACKED __BIT(0)
|
||||
#define BWI_TXS_F_PENDING __BIT(5)
|
||||
|
||||
struct bwi_ring_data {
|
||||
uint32_t rdata_txrx_ctrl;
|
||||
bus_dmamap_t rdata_dmap;
|
||||
bus_addr_t rdata_paddr;
|
||||
void *rdata_desc;
|
||||
};
|
||||
|
||||
struct bwi_txbuf {
|
||||
struct mbuf *tb_mbuf;
|
||||
bus_dmamap_t tb_dmap;
|
||||
|
||||
struct ieee80211_node *tb_ni;
|
||||
int tb_rate[2];
|
||||
};
|
||||
|
||||
struct bwi_txbuf_data {
|
||||
struct bwi_txbuf tbd_buf[BWI_TX_NDESC];
|
||||
int tbd_used;
|
||||
int tbd_idx;
|
||||
};
|
||||
|
||||
struct bwi_rxbuf {
|
||||
struct mbuf *rb_mbuf;
|
||||
bus_addr_t rb_paddr;
|
||||
bus_dmamap_t rb_dmap;
|
||||
};
|
||||
|
||||
struct bwi_rxbuf_data {
|
||||
struct bwi_rxbuf rbd_buf[BWI_RX_NDESC];
|
||||
bus_dmamap_t rbd_tmp_dmap;
|
||||
int rbd_idx;
|
||||
};
|
||||
|
||||
struct bwi_txstats_data {
|
||||
bus_dma_tag_t stats_ring_dtag;
|
||||
bus_dmamap_t stats_ring_dmap;
|
||||
bus_addr_t stats_ring_paddr;
|
||||
void *stats_ring;
|
||||
|
||||
bus_dma_tag_t stats_dtag;
|
||||
bus_dmamap_t stats_dmap;
|
||||
bus_addr_t stats_paddr;
|
||||
struct bwi_txstats *stats;
|
||||
|
||||
uint32_t stats_ctrl_base;
|
||||
int stats_idx;
|
||||
};
|
||||
|
||||
struct bwi_fwhdr {
|
||||
/* Big endian */
|
||||
uint8_t fw_type; /* BWI_FW_T_ */
|
||||
uint8_t fw_gen; /* BWI_FW_GEN */
|
||||
uint8_t fw_pad[2];
|
||||
uint32_t fw_size;
|
||||
#define fw_iv_cnt fw_size
|
||||
} __packed;
|
||||
|
||||
#define BWI_FWHDR_SZ sizeof(struct bwi_fwhdr)
|
||||
|
||||
#define BWI_FW_T_UCODE 'u'
|
||||
#define BWI_FW_T_PCM 'p'
|
||||
#define BWI_FW_T_IV 'i'
|
||||
|
||||
#define BWI_FW_GEN_1 1
|
||||
|
||||
#define BWI_FW_VERSION3 3
|
||||
#define BWI_FW_VERSION4 4
|
||||
#define BWI_FW_VERSION3_REVMAX 0x128
|
||||
|
||||
#define BWI_FW_PATH "bwi_v%d_"
|
||||
#define BWI_FW_STUB_PATH BWI_FW_PATH "ucode"
|
||||
#define BWI_FW_UCODE_PATH BWI_FW_PATH "ucode%d"
|
||||
#define BWI_FW_PCM_PATH BWI_FW_PATH "pcm%d"
|
||||
#define BWI_FW_IV_PATH BWI_FW_PATH "b0g0initvals%d"
|
||||
#define BWI_FW_IV_EXT_PATH BWI_FW_PATH "b0g0bsinitvals%d"
|
||||
|
||||
struct bwi_fw_iv {
|
||||
/* Big endian */
|
||||
uint16_t iv_ofs;
|
||||
union {
|
||||
uint32_t val32;
|
||||
uint16_t val16;
|
||||
} iv_val;
|
||||
} __packed;
|
||||
|
||||
#define BWI_FW_IV_OFS_MASK __BITS(14, 0)
|
||||
#define BWI_FW_IV_IS_32BIT __BIT(15)
|
||||
|
||||
struct bwi_led {
|
||||
uint8_t l_flags; /* BWI_LED_F_ */
|
||||
uint8_t l_act; /* BWI_LED_ACT_ */
|
||||
uint8_t l_mask;
|
||||
};
|
||||
|
||||
#define BWI_LED_F_ACTLOW 0x1
|
||||
#define BWI_LED_F_BLINK 0x2
|
||||
#define BWI_LED_F_POLLABLE 0x4
|
||||
#define BWI_LED_F_SLOW 0x8
|
||||
|
||||
enum bwi_clock_mode {
|
||||
BWI_CLOCK_MODE_SLOW,
|
||||
BWI_CLOCK_MODE_FAST,
|
||||
BWI_CLOCK_MODE_DYN
|
||||
};
|
||||
|
||||
struct bwi_regwin {
|
||||
uint32_t rw_flags; /* BWI_REGWIN_F_ */
|
||||
uint16_t rw_type; /* BWI_REGWIN_T_ */
|
||||
uint8_t rw_id;
|
||||
uint8_t rw_rev;
|
||||
};
|
||||
|
||||
#define BWI_REGWIN_F_EXIST 0x1
|
||||
|
||||
#define BWI_CREATE_REGWIN(rw, id, type, rev) \
|
||||
do { \
|
||||
(rw)->rw_flags = BWI_REGWIN_F_EXIST; \
|
||||
(rw)->rw_type = (type); \
|
||||
(rw)->rw_id = (id); \
|
||||
(rw)->rw_rev = (rev); \
|
||||
} while (0)
|
||||
|
||||
#define BWI_REGWIN_EXIST(rw) ((rw)->rw_flags & BWI_REGWIN_F_EXIST)
|
||||
#define BWI_GPIO_REGWIN(sc) \
|
||||
(BWI_REGWIN_EXIST(&(sc)->sc_com_regwin) ? \
|
||||
&(sc)->sc_com_regwin : &(sc)->sc_bus_regwin)
|
||||
|
||||
struct bwi_mac;
|
||||
|
||||
struct bwi_phy {
|
||||
enum ieee80211_phymode phy_mode;
|
||||
int phy_rev;
|
||||
int phy_version;
|
||||
|
||||
uint32_t phy_flags; /* BWI_PHY_F_ */
|
||||
uint16_t phy_tbl_ctrl;
|
||||
uint16_t phy_tbl_data_lo;
|
||||
uint16_t phy_tbl_data_hi;
|
||||
|
||||
void (*phy_init)(struct bwi_mac *);
|
||||
};
|
||||
|
||||
#define BWI_PHY_F_CALIBRATED 0x1
|
||||
#define BWI_PHY_F_LINKED 0x2
|
||||
#define BWI_CLEAR_PHY_FLAGS (BWI_PHY_F_CALIBRATED)
|
||||
|
||||
/* TX power control */
|
||||
struct bwi_tpctl {
|
||||
uint16_t bbp_atten; /* BBP attenuation: 4bits */
|
||||
uint16_t rf_atten; /* RF attenuation */
|
||||
uint16_t tp_ctrl1; /* ??: 3bits */
|
||||
uint16_t tp_ctrl2; /* ??: 4bits */
|
||||
};
|
||||
|
||||
#define BWI_RF_ATTEN_FACTOR 4
|
||||
#define BWI_RF_ATTEN_MAX0 9
|
||||
#define BWI_RF_ATTEN_MAX1 31
|
||||
#define BWI_BBP_ATTEN_MAX 11
|
||||
#define BWI_TPCTL1_MAX 7
|
||||
|
||||
struct bwi_rf_lo {
|
||||
int8_t ctrl_lo;
|
||||
int8_t ctrl_hi;
|
||||
};
|
||||
|
||||
struct bwi_rf {
|
||||
uint16_t rf_type; /* BWI_RF_T_ */
|
||||
uint16_t rf_manu;
|
||||
int rf_rev;
|
||||
|
||||
uint32_t rf_flags; /* BWI_RF_F_ */
|
||||
|
||||
#define BWI_RFLO_MAX 56
|
||||
struct bwi_rf_lo rf_lo[BWI_RFLO_MAX];
|
||||
uint8_t rf_lo_used[8];
|
||||
|
||||
#define BWI_INVALID_NRSSI -1000
|
||||
int16_t rf_nrssi[2]; /* Narrow RSSI */
|
||||
int32_t rf_nrssi_slope;
|
||||
|
||||
#define BWI_NRSSI_TBLSZ 64
|
||||
int8_t rf_nrssi_table[BWI_NRSSI_TBLSZ];
|
||||
|
||||
uint16_t rf_lo_gain; /* loopback gain */
|
||||
uint16_t rf_rx_gain; /* TRSW RX gain */
|
||||
|
||||
uint16_t rf_calib; /* RF calibration value */
|
||||
u_int rf_curchan; /* current channel */
|
||||
|
||||
uint16_t rf_ctrl_rd;
|
||||
int rf_ctrl_adj;
|
||||
void (*rf_off)(struct bwi_mac *);
|
||||
void (*rf_on)(struct bwi_mac *);
|
||||
|
||||
void (*rf_set_nrssi_thr)(struct bwi_mac *);
|
||||
void (*rf_calc_nrssi_slope)(struct bwi_mac *);
|
||||
int (*rf_calc_rssi)
|
||||
(struct bwi_mac *,
|
||||
const struct bwi_rxbuf_hdr *);
|
||||
int (*rf_calc_noise)(struct bwi_mac *);
|
||||
|
||||
void (*rf_lo_update)(struct bwi_mac *);
|
||||
|
||||
#define BWI_TSSI_MAX 64
|
||||
int8_t rf_txpower_map0[BWI_TSSI_MAX];
|
||||
/* Indexed by TSSI */
|
||||
int rf_idle_tssi0;
|
||||
|
||||
int8_t rf_txpower_map[BWI_TSSI_MAX];
|
||||
int rf_idle_tssi;
|
||||
|
||||
int rf_base_tssi;
|
||||
|
||||
int rf_txpower_max; /* dBm */
|
||||
|
||||
int rf_ant_mode; /* BWI_ANT_MODE_ */
|
||||
};
|
||||
|
||||
#define BWI_RF_F_INITED 0x1
|
||||
#define BWI_RF_F_ON 0x2
|
||||
#define BWI_RF_CLEAR_FLAGS (BWI_RF_F_INITED)
|
||||
|
||||
#define BWI_ANT_MODE_0 0
|
||||
#define BWI_ANT_MODE_1 1
|
||||
#define BWI_ANT_MODE_UNKN 2
|
||||
#define BWI_ANT_MODE_AUTO 3
|
||||
|
||||
struct bwi_softc;
|
||||
struct firmware;
|
||||
|
||||
struct bwi_mac {
|
||||
struct bwi_regwin mac_regwin; /* MUST be first field */
|
||||
#define mac_rw_flags mac_regwin.rw_flags
|
||||
#define mac_type mac_regwin.rw_type
|
||||
#define mac_id mac_regwin.rw_id
|
||||
#define mac_rev mac_regwin.rw_rev
|
||||
|
||||
struct bwi_softc *mac_sc;
|
||||
|
||||
struct bwi_phy mac_phy; /* PHY I/F */
|
||||
struct bwi_rf mac_rf; /* RF I/F */
|
||||
|
||||
struct bwi_tpctl mac_tpctl; /* TX power control */
|
||||
uint32_t mac_flags; /* BWI_MAC_F_ */
|
||||
|
||||
const struct firmware *mac_stub;
|
||||
const struct firmware *mac_ucode;
|
||||
const struct firmware *mac_pcm;
|
||||
const struct firmware *mac_iv;
|
||||
const struct firmware *mac_iv_ext;
|
||||
};
|
||||
|
||||
#define BWI_MAC_F_BSWAP 0x1
|
||||
#define BWI_MAC_F_TPCTL_INITED 0x2
|
||||
#define BWI_MAC_F_HAS_TXSTATS 0x4
|
||||
#define BWI_MAC_F_INITED 0x8
|
||||
#define BWI_MAC_F_ENABLED 0x10
|
||||
#define BWI_MAC_F_LOCKED 0x20 /* for debug */
|
||||
#define BWI_MAC_F_TPCTL_ERROR 0x40
|
||||
#define BWI_MAC_F_PHYE_RESET 0x80
|
||||
|
||||
#define BWI_CREATE_MAC(mac, sc, id, rev) \
|
||||
do { \
|
||||
BWI_CREATE_REGWIN(&(mac)->mac_regwin, \
|
||||
(id), \
|
||||
BWI_REGWIN_T_MAC, \
|
||||
(rev)); \
|
||||
(mac)->mac_sc = (sc); \
|
||||
} while (0)
|
||||
|
||||
#define BWI_MAC_MAX 2
|
||||
#define BWI_LED_MAX 4
|
||||
|
||||
enum bwi_bus_space {
|
||||
BWI_BUS_SPACE_30BIT = 1,
|
||||
BWI_BUS_SPACE_32BIT,
|
||||
BWI_BUS_SPACE_64BIT
|
||||
};
|
||||
|
||||
#define BWI_TX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL))
|
||||
|
||||
struct bwi_tx_radiotap_hdr {
|
||||
struct ieee80211_radiotap_header wt_ihdr;
|
||||
uint8_t wt_flags;
|
||||
uint8_t wt_rate;
|
||||
uint16_t wt_chan_freq;
|
||||
uint16_t wt_chan_flags;
|
||||
};
|
||||
|
||||
#define BWI_RX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_TSFT) | \
|
||||
(1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | \
|
||||
(1 << IEEE80211_RADIOTAP_DBM_ANTNOISE))
|
||||
|
||||
struct bwi_rx_radiotap_hdr {
|
||||
struct ieee80211_radiotap_header wr_ihdr;
|
||||
uint64_t wr_tsf;
|
||||
uint8_t wr_flags;
|
||||
uint8_t wr_rate;
|
||||
uint16_t wr_chan_freq;
|
||||
uint16_t wr_chan_flags;
|
||||
int8_t wr_antsignal;
|
||||
int8_t wr_antnoise;
|
||||
/* TODO: sq */
|
||||
};
|
||||
|
||||
struct bwi_node {
|
||||
struct ieee80211_node ni; /* must be the first */
|
||||
struct ieee80211_amrr_node amn;
|
||||
};
|
||||
#define BWI_NODE(ni) ((struct bwi_node *)(ni))
|
||||
|
||||
struct bwi_vap {
|
||||
struct ieee80211vap bv_vap;
|
||||
struct ieee80211_amrr bv_amrr;
|
||||
int (*bv_newstate)(struct ieee80211vap *,
|
||||
enum ieee80211_state, int);
|
||||
};
|
||||
#define BWI_VAP(vap) ((struct bwi_vap *)(vap))
|
||||
|
||||
struct bwi_softc {
|
||||
struct ifnet *sc_ifp;
|
||||
uint32_t sc_flags; /* BWI_F_ */
|
||||
device_t sc_dev;
|
||||
struct mtx sc_mtx;
|
||||
int sc_invalid;
|
||||
|
||||
uint32_t sc_cap; /* BWI_CAP_ */
|
||||
uint16_t sc_bbp_id; /* BWI_BBPID_ */
|
||||
uint8_t sc_bbp_rev;
|
||||
uint8_t sc_bbp_pkg;
|
||||
|
||||
uint8_t sc_pci_revid;
|
||||
uint16_t sc_pci_did;
|
||||
uint16_t sc_pci_subvid;
|
||||
uint16_t sc_pci_subdid;
|
||||
|
||||
uint16_t sc_card_flags; /* BWI_CARD_F_ */
|
||||
uint16_t sc_pwron_delay;
|
||||
int sc_locale;
|
||||
|
||||
int sc_irq_rid;
|
||||
struct resource *sc_irq_res;
|
||||
void *sc_irq_handle;
|
||||
|
||||
int sc_mem_rid;
|
||||
struct resource *sc_mem_res;
|
||||
bus_space_tag_t sc_mem_bt;
|
||||
bus_space_handle_t sc_mem_bh;
|
||||
|
||||
struct callout sc_calib_ch;
|
||||
|
||||
struct bwi_regwin *sc_cur_regwin;
|
||||
struct bwi_regwin sc_com_regwin;
|
||||
struct bwi_regwin sc_bus_regwin;
|
||||
|
||||
int sc_nmac;
|
||||
struct bwi_mac sc_mac[BWI_MAC_MAX];
|
||||
|
||||
int sc_rx_rate;
|
||||
int sc_tx_rate;
|
||||
enum bwi_txpwrcb_type sc_txpwrcb_type;
|
||||
|
||||
int sc_led_blinking;
|
||||
int sc_led_ticks;
|
||||
struct bwi_led *sc_blink_led;
|
||||
struct callout sc_led_blink_ch;
|
||||
int sc_led_blink_offdur;
|
||||
struct bwi_led sc_leds[BWI_LED_MAX];
|
||||
|
||||
enum bwi_bus_space sc_bus_space;
|
||||
bus_dma_tag_t sc_parent_dtag;
|
||||
|
||||
bus_dma_tag_t sc_buf_dtag;
|
||||
struct bwi_txbuf_data sc_tx_bdata[BWI_TX_NRING];
|
||||
struct bwi_rxbuf_data sc_rx_bdata;
|
||||
|
||||
bus_dma_tag_t sc_txring_dtag;
|
||||
struct bwi_ring_data sc_tx_rdata[BWI_TX_NRING];
|
||||
bus_dma_tag_t sc_rxring_dtag;
|
||||
struct bwi_ring_data sc_rx_rdata;
|
||||
|
||||
struct bwi_txstats_data *sc_txstats;
|
||||
|
||||
int sc_tx_timer;
|
||||
const struct ieee80211_rate_table *sc_rates;
|
||||
|
||||
struct bwi_tx_radiotap_hdr sc_tx_th;
|
||||
int sc_tx_th_len;
|
||||
struct bwi_rx_radiotap_hdr sc_rx_th;
|
||||
int sc_rx_th_len;
|
||||
|
||||
struct taskqueue *sc_tq;
|
||||
struct task sc_restart_task;
|
||||
|
||||
int (*sc_init_tx_ring)(struct bwi_softc *, int);
|
||||
void (*sc_free_tx_ring)(struct bwi_softc *, int);
|
||||
|
||||
int (*sc_init_rx_ring)(struct bwi_softc *);
|
||||
void (*sc_free_rx_ring)(struct bwi_softc *);
|
||||
|
||||
int (*sc_init_txstats)(struct bwi_softc *);
|
||||
void (*sc_free_txstats)(struct bwi_softc *);
|
||||
|
||||
void (*sc_setup_rxdesc)
|
||||
(struct bwi_softc *, int, bus_addr_t, int);
|
||||
int (*sc_rxeof)(struct bwi_softc *);
|
||||
|
||||
void (*sc_setup_txdesc)
|
||||
(struct bwi_softc *, struct bwi_ring_data *,
|
||||
int, bus_addr_t, int);
|
||||
void (*sc_start_tx)
|
||||
(struct bwi_softc *, uint32_t, int);
|
||||
|
||||
void (*sc_txeof_status)(struct bwi_softc *);
|
||||
|
||||
/* Sysctl variables */
|
||||
int sc_fw_version; /* BWI_FW_VERSION[34] */
|
||||
int sc_dwell_time; /* milliseconds */
|
||||
int sc_led_idle;
|
||||
int sc_led_blink;
|
||||
int sc_txpwr_calib;
|
||||
uint32_t sc_debug; /* BWI_DBG_ */
|
||||
};
|
||||
|
||||
#define BWI_F_BUS_INITED 0x1
|
||||
#define BWI_F_PROMISC 0x2
|
||||
#define BWI_F_STOP 0x4
|
||||
|
||||
#define BWI_DBG_MAC 0x00000001
|
||||
#define BWI_DBG_RF 0x00000002
|
||||
#define BWI_DBG_PHY 0x00000004
|
||||
#define BWI_DBG_MISC 0x00000008
|
||||
|
||||
#define BWI_DBG_ATTACH 0x00000010
|
||||
#define BWI_DBG_INIT 0x00000020
|
||||
#define BWI_DBG_FIRMWARE 0x00000040
|
||||
#define BWI_DBG_80211 0x00000080
|
||||
#define BWI_DBG_TXPOWER 0x00000100
|
||||
#define BWI_DBG_INTR 0x00000200
|
||||
#define BWI_DBG_RX 0x00000400
|
||||
#define BWI_DBG_TX 0x00000800
|
||||
#define BWI_DBG_TXEOF 0x00001000
|
||||
#define BWI_DBG_LED 0x00002000
|
||||
|
||||
#define BWI_LOCK_INIT(sc) \
|
||||
mtx_init(&(sc)->sc_mtx, device_get_nameunit((sc)->sc_dev), \
|
||||
MTX_NETWORK_LOCK, MTX_DEF | MTX_RECURSE)
|
||||
#define BWI_LOCK_DESTROY(sc) mtx_destroy(&(sc)->sc_mtx)
|
||||
#define BWI_LOCK(sc) mtx_lock(&(sc)->sc_mtx)
|
||||
#define BWI_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx)
|
||||
#define BWI_ASSERT_LOCKED(sc) mtx_assert(&(sc)->sc_mtx, MA_OWNED)
|
||||
|
||||
int bwi_attach(struct bwi_softc *);
|
||||
int bwi_detach(struct bwi_softc *);
|
||||
void bwi_suspend(struct bwi_softc *);
|
||||
void bwi_resume(struct bwi_softc *);
|
||||
int bwi_shutdown(struct bwi_softc *);
|
||||
void bwi_intr(void *);
|
||||
|
||||
int bwi_bus_init(struct bwi_softc *, struct bwi_mac *mac);
|
||||
|
||||
uint16_t bwi_read_sprom(struct bwi_softc *, uint16_t);
|
||||
int bwi_regwin_switch(struct bwi_softc *, struct bwi_regwin *,
|
||||
struct bwi_regwin **);
|
||||
int bwi_regwin_is_enabled(struct bwi_softc *, struct bwi_regwin *);
|
||||
void bwi_regwin_enable(struct bwi_softc *, struct bwi_regwin *,
|
||||
uint32_t);
|
||||
void bwi_regwin_disable(struct bwi_softc *, struct bwi_regwin *,
|
||||
uint32_t);
|
||||
|
||||
#define abs(a) __builtin_abs(a)
|
||||
|
||||
/* XXX does not belong here */
|
||||
struct ieee80211_ds_plcp_hdr {
|
||||
uint8_t i_signal;
|
||||
uint8_t i_service;
|
||||
uint16_t i_length;
|
||||
uint16_t i_crc;
|
||||
} __packed;
|
||||
|
||||
#endif /* !_IF_BWIVAR_H */
|
||||
14
sys/modules/bwi/Makefile
Normal file
14
sys/modules/bwi/Makefile
Normal file
@ -0,0 +1,14 @@
|
||||
# $FreeBSD$
|
||||
|
||||
.PATH: ${.CURDIR}/../../dev/bwi
|
||||
|
||||
KMOD = if_bwi
|
||||
|
||||
SRCS = if_bwi.c if_bwi_pci.c bwimac.c bwiphy.c bwirf.c
|
||||
SRCS += device_if.h bus_if.h pci_if.h opt_inet.h opt_bwi.h
|
||||
|
||||
opt_bwi.h:
|
||||
echo '#define BWI_DEBUG 1' > opt_bwi.h
|
||||
# echo '#define BWI_DEBUG_VERBOSE 1' >> opt_bwi.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
||||
Loading…
Reference in New Issue
Block a user