mrsas: clean up empty lines in .c and .h files
This commit is contained in:
parent
3cb02df9ae
commit
139b723f80
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=365201
@ -53,7 +53,6 @@ __FBSDID("$FreeBSD$");
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#include <sys/taskqueue.h>
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#include <sys/smp.h>
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/*
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* Function prototypes
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*/
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@ -177,7 +176,6 @@ void
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mrsas_write_64bit_req_desc(struct mrsas_softc *sc, u_int32_t req_desc_lo,
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u_int32_t req_desc_hi);
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SYSCTL_NODE(_hw, OID_AUTO, mrsas, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
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"MRSAS Driver Parameters");
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@ -314,7 +312,6 @@ mrsas_read_reg(struct mrsas_softc *sc, int offset)
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return ((u_int32_t)bus_space_read_4(bus_tag, bus_handle, offset));
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}
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/*
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* Interrupt Disable/Enable/Clear Functions
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*
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@ -650,7 +647,6 @@ mrsas_get_seq_num(struct mrsas_softc *sc,
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return retcode;
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}
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/*
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* mrsas_register_aen: Register for asynchronous event notification
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* @sc: Adapter soft state
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@ -685,7 +681,6 @@ mrsas_register_aen(struct mrsas_softc *sc, u_int32_t seq_num,
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curr_aen.word = class_locale_word;
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if (sc->aen_cmd) {
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prev_aen.word = sc->aen_cmd->frame->dcmd.mbox.w[1];
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/*
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@ -779,7 +774,6 @@ mrsas_start_aen(struct mrsas_softc *sc)
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struct mrsas_evt_log_info eli;
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union mrsas_evt_class_locale class_locale;
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/* Get the latest sequence number from FW */
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memset(&eli, 0, sizeof(eli));
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@ -905,7 +899,6 @@ mrsas_attach(device_t dev)
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case MRSAS_AERO_10E7:
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device_printf(dev, "Adapter is in non-secure mode\n");
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return SUCCESS;
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}
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mrsas_get_tunables(sc);
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@ -1263,7 +1256,6 @@ mrsas_free_mem(struct mrsas_softc *sc)
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if (sc->verbuf_tag != NULL)
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bus_dma_tag_destroy(sc->verbuf_tag);
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/*
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* Free sense buffer memory
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*/
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@ -2487,7 +2479,6 @@ mrsas_init_fw(struct mrsas_softc *sc)
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}
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megasas_setup_jbod_map(sc);
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memset(sc->target_list, 0,
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MRSAS_MAX_TM_TARGETS * sizeof(struct mrsas_target));
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for (i = 0; i < MRSAS_MAX_TM_TARGETS; i++)
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@ -3132,7 +3123,6 @@ mrsas_ocr_thread(void *arg)
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fw_state = fw_status & MFI_STATE_MASK;
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if (fw_state == MFI_STATE_FAULT || sc->do_timedout_reset ||
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mrsas_atomic_read(&sc->target_reset_outstanding)) {
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/* First, freeze further IOs to come to the SIM */
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mrsas_xpt_freeze(sc);
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@ -3526,7 +3516,6 @@ mrsas_wait_for_outstanding(struct mrsas_softc *sc, u_int8_t check_reason)
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int i, outstanding, retval = 0;
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u_int32_t fw_state, count, MSIxIndex;
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for (i = 0; i < MRSAS_RESET_WAIT_TIME; i++) {
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if (sc->remove_in_progress) {
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mrsas_dprint(sc, MRSAS_OCR,
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@ -3592,7 +3581,6 @@ mrsas_release_mfi_cmd(struct mrsas_mfi_cmd *cmd_mfi)
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struct mrsas_softc *sc = cmd_mfi->sc;
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struct mrsas_mpt_cmd *cmd_mpt;
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mtx_lock(&sc->mfi_cmd_pool_lock);
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/*
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* Release the mpt command (if at all it is allocated
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@ -4094,7 +4082,6 @@ mrsas_complete_mptmfi_passthru(struct mrsas_softc *sc, struct mrsas_mfi_cmd *cmd
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if ((cmd->frame->dcmd.opcode ==
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MR_DCMD_SYSTEM_PD_MAP_GET_INFO) &&
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(cmd->frame->dcmd.mbox.b[0] == 1)) {
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mtx_lock(&sc->raidmap_lock);
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sc->jbod_seq_cmd = NULL;
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mrsas_release_mfi_cmd(cmd);
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@ -5022,7 +5009,6 @@ mrsas_aen_handler(struct mrsas_softc *sc)
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}
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/*
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* mrsas_complete_aen: Completes AEN command
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* input: Adapter soft state
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@ -72,7 +72,6 @@ __FBSDID("$FreeBSD$");
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#include <dev/pci/pcivar.h> /* For pci_get macros! */
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#include <dev/pci/pcireg.h>
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#define IOCTL_SEMA_DESCRIPTION "mrsas semaphore for MFI pool"
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/*
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@ -101,7 +100,6 @@ __FBSDID("$FreeBSD$");
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#define MRSAS_AERO_10E6 0x10E6
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#define MRSAS_AERO_10E7 0x10E7
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/*
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* Firmware State Defines
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*/
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@ -167,7 +165,6 @@ do { \
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device_printf(sc->mrsas_dev, msg, ##args); \
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} while (0)
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/****************************************************************************
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* Raid Context structure which describes MegaRAID specific IO Paramenters
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* This resides at offset 0x60 where the SGL normally starts in MPT IO Frames
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@ -242,7 +239,6 @@ typedef union _RAID_CONTEXT_UNION {
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RAID_CONTEXT_G35 raid_context_g35;
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} RAID_CONTEXT_UNION, *PRAID_CONTEXT_UNION;
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/*************************************************************************
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* MPI2 Defines
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************************************************************************/
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@ -296,7 +292,6 @@ typedef union _RAID_CONTEXT_UNION {
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#define MPI2_POINTER *
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#endif
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/***************************************
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* MPI2 Structures
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***************************************/
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@ -762,7 +757,6 @@ Mpi2IOCInitRequest_t, MPI2_POINTER pMpi2IOCInitRequest_t;
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#define MRSAS_MAX_LD_IDS (MRSAS_MAX_LD_CHANNELS * \
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MRSAS_MAX_DEV_PER_CHANNEL)
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#define VD_EXT_DEBUG 0
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#define TM_DEBUG 1
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@ -904,7 +898,6 @@ typedef struct _MR_FW_RAID_MAP {
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MR_LD_SPAN_MAP ldSpanMap[1];
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} MR_FW_RAID_MAP;
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typedef struct _MR_FW_RAID_MAP_EXT {
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/* Not used in new map */
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u_int32_t reserved;
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@ -935,7 +928,6 @@ typedef struct _MR_FW_RAID_MAP_EXT {
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MR_LD_SPAN_MAP ldSpanMap[MAX_LOGICAL_DRIVES_EXT];
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} MR_FW_RAID_MAP_EXT;
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typedef struct _MR_DRV_RAID_MAP {
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/*
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* Total size of this structure, including this field. This feild
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@ -979,7 +971,6 @@ typedef struct _MR_DRV_RAID_MAP {
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#pragma pack(1)
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typedef struct _MR_DRV_RAID_MAP_ALL {
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MR_DRV_RAID_MAP raidMap;
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MR_LD_SPAN_MAP ldSpanMap[MAX_LOGICAL_DRIVES_DYN - 1];
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} MR_DRV_RAID_MAP_ALL;
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@ -1084,14 +1075,12 @@ typedef struct _LD_STREAM_DETECT {
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STREAM_DETECT streamTrack[MAX_STREAMS_TRACKED];
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} LD_STREAM_DETECT, *PTR_LD_STREAM_DETECT;
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typedef struct _MR_LD_TARGET_SYNC {
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u_int8_t targetId;
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u_int8_t reserved;
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u_int16_t seqNum;
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} MR_LD_TARGET_SYNC;
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/*
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* RAID Map descriptor Types.
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* Each element should uniquely idetify one data structure in the RAID map
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@ -1166,7 +1155,6 @@ typedef struct _MR_FW_RAID_MAP_DYNAMIC {
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} MR_FW_RAID_MAP_DYNAMIC;
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#define IEEE_SGE_FLAGS_ADDR_MASK (0x03)
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#define IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00)
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#define IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01)
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@ -1183,7 +1171,6 @@ typedef struct _MR_FW_RAID_MAP_DYNAMIC {
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#define IEEE_SGE_FLAGS_FORMAT_NVME (0x02)
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#define IEEE_SGE_FLAGS_FORMAT_AHCI (0x03)
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#define MPI26_IEEE_SGE_FLAGS_NSF_MASK (0x1C)
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#define MPI26_IEEE_SGE_FLAGS_NSF_MPI_IEEE (0x00)
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#define MPI26_IEEE_SGE_FLAGS_NSF_PQI (0x04)
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@ -1213,7 +1200,6 @@ struct mrsas_tmp_dcmd {
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#define MR_MAX_RAID_MAP_SIZE_MASK 0x1FF
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#define MR_MIN_MAP_SIZE 0x10000
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/*******************************************************************
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* Register set, included legacy controllers 1068 and 1078,
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* structure extended for 1078 registers
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@ -1472,7 +1458,6 @@ enum MFI_STAT {
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#define MFI_MBOX_SIZE 12
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enum MR_EVT_CLASS {
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MR_EVT_CLASS_DEBUG = -2,
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MR_EVT_CLASS_PROGRESS = -1,
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MR_EVT_CLASS_INFO = 0,
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@ -1484,7 +1469,6 @@ enum MR_EVT_CLASS {
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};
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enum MR_EVT_LOCALE {
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MR_EVT_LOCALE_LD = 0x0001,
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MR_EVT_LOCALE_PD = 0x0002,
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MR_EVT_LOCALE_ENCL = 0x0004,
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@ -1498,7 +1482,6 @@ enum MR_EVT_LOCALE {
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};
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enum MR_EVT_ARGS {
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MR_EVT_ARGS_NONE,
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MR_EVT_ARGS_CDB_SENSE,
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MR_EVT_ARGS_LD,
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@ -1617,7 +1600,6 @@ typedef enum _REGION_TYPE {
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REGION_TYPE_EXCLUSIVE = 3,
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} REGION_TYPE;
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/*
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* SCSI-CAM Related Defines
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*/
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@ -1736,7 +1718,6 @@ struct mrsas_mfi_cmd {
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TAILQ_ENTRY(mrsas_mfi_cmd) next;
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};
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/*
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* define constants for device list query options
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*/
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@ -1833,7 +1814,6 @@ typedef union _MR_LD_REF {
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u_int32_t ref;
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} MR_LD_REF;
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/*
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* defines the logical drive list structure
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*/
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@ -1929,7 +1909,6 @@ struct mrsas_ctrl_prop {
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#pragma pack()
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/*
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* SAS controller information
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*/
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@ -2213,7 +2192,6 @@ struct mrsas_ctrl_info {
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u_int32_t headlessMode:1;
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u_int32_t dedicatedHotSparesLimited:1;
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u_int32_t supportUnevenSpans:1;
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u_int32_t reserved:11;
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} adapterOperations2;
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@ -2225,7 +2203,6 @@ struct mrsas_ctrl_info {
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u_int8_t reserved4; /* 0x7CB */
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u_int16_t maxConfigurablePds; /* 0x7CC */
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u_int8_t reserved5[2]; /* 0x7CD reserved */
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struct {
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@ -2580,7 +2557,6 @@ struct mrsas_smp_frame {
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#pragma pack()
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#pragma pack(1)
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struct mrsas_stp_frame {
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u_int8_t cmd; /* 00h */
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@ -2625,7 +2601,6 @@ union mrsas_frame {
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#pragma pack(1)
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union mrsas_evt_class_locale {
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struct {
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u_int16_t locale;
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u_int8_t reserved;
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@ -2638,7 +2613,6 @@ union mrsas_evt_class_locale {
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#pragma pack()
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#pragma pack(1)
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struct mrsas_evt_log_info {
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u_int32_t newest_seq_num;
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@ -2652,14 +2626,12 @@ struct mrsas_evt_log_info {
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#pragma pack()
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struct mrsas_progress {
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u_int16_t progress;
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u_int16_t elapsed_seconds;
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} __packed;
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struct mrsas_evtarg_ld {
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u_int16_t target_id;
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u_int8_t ld_index;
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u_int8_t reserved;
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@ -2674,7 +2646,6 @@ struct mrsas_evtarg_pd {
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} __packed;
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struct mrsas_evt_detail {
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u_int32_t seq_num;
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u_int32_t time_stamp;
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u_int32_t code;
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@ -2952,7 +2923,6 @@ typedef struct _MRSAS_DRV_PCI_LINK_STATUS_CAPABILITY {
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#define MRSAS_DRV_PCI_LINK_STATUS_CAPABILITY_SIZE sizeof(MRSAS_DRV_PCI_LINK_STATUS_CAPABILITY)
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typedef struct _MRSAS_DRV_PCI_CAPABILITIES {
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MRSAS_DRV_PCI_LINK_CAPABILITY linkCapability;
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MRSAS_DRV_PCI_LINK_STATUS_CAPABILITY linkStatusCapability;
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@ -3061,7 +3031,6 @@ struct MR_PD_PROGRESS {
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union MR_PROGRESS reserved[3];
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} __packed;
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struct mrsas_pd_info {
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MR_PD_REF ref;
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u_int8_t inquiryData[96];
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@ -784,9 +784,6 @@ mrsas_get_request_desc(struct mrsas_softc *sc, u_int16_t index)
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return (MRSAS_REQUEST_DESCRIPTOR_UNION *) p;
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}
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/* mrsas_prepare_secondRaid1_IO
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* It prepares the raid 1 second IO
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*/
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@ -836,7 +833,6 @@ mrsas_prepare_secondRaid1_IO(struct mrsas_softc *sc,
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}
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/*
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* mrsas_build_ldio_rw: Builds an LDIO command
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* input: Adapter instance soft state
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@ -957,7 +953,6 @@ mrsas_stream_detect(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd,
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return;
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}
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/*
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* mrsas_setup_io: Set up data including Fast Path I/O
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* input: Adapter instance soft state
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@ -1451,7 +1446,6 @@ static boolean_t mrsas_is_prp_possible(struct mrsas_mpt_cmd *cmd,
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break;
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}
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}
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}
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return build_prp;
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@ -1623,14 +1617,12 @@ static void mrsas_build_prp_nvme(struct mrsas_mpt_cmd *cmd, bus_dma_segment_t *s
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main_chain_element = (pMpi25IeeeSgeChain64_t)
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((u_int8_t *)sgl_ptr + sizeof(MPI25_IEEE_SGE_CHAIN64));
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main_chain_element->Address = cmd->chain_frame_phys_addr;
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main_chain_element->NextChainOffset = 0;
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main_chain_element->Flags = IEEE_SGE_FLAGS_CHAIN_ELEMENT |
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IEEE_SGE_FLAGS_SYSTEM_ADDR |
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MPI26_IEEE_SGE_FLAGS_NSF_NVME_PRP;
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/* Build first PRP, SGE need not to be PAGE aligned*/
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ptr_first_sgl = sgl_ptr;
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sge_addr = segs[i].ds_addr;
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@ -1655,7 +1647,6 @@ static void mrsas_build_prp_nvme(struct mrsas_mpt_cmd *cmd, bus_dma_segment_t *s
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}
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for (;;) {
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offset = (u_int32_t) (sge_addr & page_mask);
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/* Put PRP pointer due to page boundary*/
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@ -1674,7 +1665,6 @@ static void mrsas_build_prp_nvme(struct mrsas_mpt_cmd *cmd, bus_dma_segment_t *s
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ptr_sgl_phys++;
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num_prp_in_chain++;
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sge_addr += mr_nvme_pg_size;
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sge_len -= mr_nvme_pg_size;
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data_len -= mr_nvme_pg_size;
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@ -1783,7 +1773,7 @@ void
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mrsas_cmd_done(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd)
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{
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mrsas_unmap_request(sc, cmd);
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mtx_lock(&sc->sim_lock);
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if (cmd->callout_owner) {
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callout_stop(&cmd->cm_callout);
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@ -2152,4 +2142,3 @@ int mrsas_reset_targets(struct mrsas_softc *sc)
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return retCode;
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}
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@ -50,7 +50,6 @@ __FBSDID("$FreeBSD$");
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#include <cam/cam_periph.h>
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#include <cam/cam_xpt_periph.h>
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/*
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* Function prototypes
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*/
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@ -105,7 +104,6 @@ MR_LdSpanInfoGet(u_int32_t ld,
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MR_LD_RAID *MR_LdRaidGet(u_int32_t ld, MR_DRV_RAID_MAP_ALL * map);
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static int MR_PopulateDrvRaidMap(struct mrsas_softc *sc);
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/*
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* Spanset related function prototypes Added for PRL11 configuration (Uneven
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* span support)
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@ -126,7 +124,6 @@ static u_int8_t
|
||||
get_arm(struct mrsas_softc *sc, u_int32_t ld, u_int8_t span,
|
||||
u_int64_t stripe, MR_DRV_RAID_MAP_ALL * map);
|
||||
|
||||
|
||||
/*
|
||||
* Spanset related defines Added for PRL11 configuration(Uneven span support)
|
||||
*/
|
||||
@ -149,7 +146,6 @@ typedef u_int32_t REGION_LEN;
|
||||
|
||||
#define LB_PENDING_CMDS_DEFAULT 4
|
||||
|
||||
|
||||
/*
|
||||
* Related Macros
|
||||
*/
|
||||
@ -163,7 +159,6 @@ typedef u_int32_t REGION_LEN;
|
||||
(((unsigned int)(x) & (unsigned int)0x00ff0000UL) >> 8) | \
|
||||
(((unsigned int)(x) & (unsigned int)0xff000000UL) >> 24) ))
|
||||
|
||||
|
||||
/*
|
||||
* In-line functions for mod and divide of 64-bit dividend and 32-bit
|
||||
* divisor. Assumes a check for a divisor of zero is not possible.
|
||||
@ -183,7 +178,6 @@ int quotient; \
|
||||
quotient = ((u_int64_t) (dividend)) / (u_int32_t) (divisor); \
|
||||
quotient;})
|
||||
|
||||
|
||||
/*
|
||||
* Various RAID map access functions. These functions access the various
|
||||
* parts of the RAID map and returns the appropriate parameters.
|
||||
@ -224,7 +218,6 @@ static u_int8_t MR_PdInterfaceTypeGet(u_int32_t pd, MR_DRV_RAID_MAP_ALL *map)
|
||||
return map->raidMap.devHndlInfo[pd].interfaceType;
|
||||
}
|
||||
|
||||
|
||||
static u_int16_t
|
||||
MR_ArPdGet(u_int32_t ar, u_int32_t arm, MR_DRV_RAID_MAP_ALL * map)
|
||||
{
|
||||
@ -768,7 +761,6 @@ get_row_from_strip(struct mrsas_softc *sc,
|
||||
return -1LLU;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
*
|
||||
* This routine calculates the Start Strip for given row using spanset.
|
||||
@ -880,7 +872,6 @@ get_arm_from_strip(struct mrsas_softc *sc,
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
/* This Function will return Phys arm */
|
||||
u_int8_t
|
||||
get_arm(struct mrsas_softc *sc, u_int32_t ld, u_int8_t span, u_int64_t stripe,
|
||||
@ -941,7 +932,6 @@ mr_spanset_get_phy_params(struct mrsas_softc *sc, u_int32_t ld, u_int64_t stripR
|
||||
row = io_info->start_row;
|
||||
span = io_info->start_span;
|
||||
|
||||
|
||||
if (raid->level == 6) {
|
||||
logArm = get_arm_from_strip(sc, ld, stripRow, map);
|
||||
rowMod = mega_mod64(row, SPAN_ROW_SIZE(map, ld, span));
|
||||
@ -954,7 +944,6 @@ mr_spanset_get_phy_params(struct mrsas_softc *sc, u_int32_t ld, u_int64_t stripR
|
||||
/* Calculate the arm */
|
||||
physArm = get_arm(sc, ld, span, stripRow, map);
|
||||
|
||||
|
||||
arRef = MR_LdSpanArrayGet(ld, span, map);
|
||||
pd = MR_ArPdGet(arRef, physArm, map);
|
||||
|
||||
@ -1351,7 +1340,6 @@ mrsas_update_load_balance_params(struct mrsas_softc *sc,
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* mrsas_set_pd_lba: Sets PD LBA
|
||||
* input: io_request pointer
|
||||
|
@ -88,7 +88,6 @@ __FBSDID("$FreeBSD$");
|
||||
|
||||
#define MEGAMFI_RAW_FRAME_SIZE 128
|
||||
|
||||
|
||||
#pragma pack(1)
|
||||
struct mrsas_iocpacket {
|
||||
u_int16_t host_no;
|
||||
|
Loading…
Reference in New Issue
Block a user