Add code to emulate arithmetic, comparison and conversion operations
on long double, which are not implemented in hardware on any UltraSPARC chip that I know of. This just calls into the existing floating point emulator, which is still needed to emulate other floating point operations in certain conditions. Without this gcc has to generate the quad floating point instructions directly, which sometimes causes internal compiler errors. Reviewed by: tmm
This commit is contained in:
jake
parent
3e8b7672bb
commit
1429f6eeb9
@ -5,4 +5,4 @@
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CFLAGS+= -I${.CURDIR}/sparc64/sys
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SRCS+= fpu.c fpu_add.c fpu_compare.c fpu_div.c fpu_explode.c fpu_implode.c \
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fpu_mul.c fpu_reg.S fpu_sqrt.c fpu_subr.c
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fpu_mul.c fpu_qp.c fpu_reg.S fpu_sqrt.c fpu_subr.c
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135
lib/libc/sparc64/fpu/fpu_qp.c
Normal file
135
lib/libc/sparc64/fpu/fpu_qp.c
Normal file
@ -0,0 +1,135 @@
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/*-
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* Copyright (c) 2002 Jake Burkholder.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <machine/fsr.h>
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#include "fpu_emu.h"
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#include "fpu_extern.h"
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#define _QP_OP(op) \
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void _Qp_ ## op(u_int *c, u_int *a, u_int *b); \
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void \
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_Qp_ ## op(u_int *c, u_int *a, u_int *b) \
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{ \
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struct fpemu fe; \
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struct fpn *r; \
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__asm __volatile("stx %%fsr, %0" : "=m" (fe.fe_fsr) :); \
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fe.fe_f1.fp_sign = a[0] >> 31; \
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fe.fe_f1.fp_sticky = 0; \
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fe.fe_f1.fp_class = __fpu_qtof(&fe.fe_f1, a[0], a[1], a[2], a[3]); \
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fe.fe_f2.fp_sign = b[0] >> 31; \
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fe.fe_f2.fp_sticky = 0; \
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fe.fe_f2.fp_class = __fpu_qtof(&fe.fe_f2, b[0], b[1], b[2], b[3]); \
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r = __fpu_ ## op(&fe); \
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c[0] = __fpu_ftoq(&fe, r, c); \
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}
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#define _QP_TTOQ(qname, fname, ntype, atype, ...) \
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void _Qp_ ## qname ## toq(u_int *c, ntype n); \
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void \
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_Qp_ ## qname ## toq(u_int *c, ntype n) \
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{ \
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struct fpemu fe; \
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atype *a; \
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__asm __volatile("stx %%fsr, %0" : "=m" (fe.fe_fsr) :); \
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a = (atype *)&n; \
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fe.fe_f1.fp_sign = a[0] >> 31; \
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fe.fe_f1.fp_sticky = 0; \
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fe.fe_f1.fp_class = __fpu_ ## fname ## tof(&fe.fe_f1, __VA_ARGS__); \
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c[0] = __fpu_ftoq(&fe, &fe.fe_f1, c); \
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}
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#define _QP_QTOT(qname, fname, type, ...) \
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type _Qp_qto ## qname(u_int *c); \
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type \
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_Qp_qto ## qname(u_int *c) \
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{ \
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struct fpemu fe; \
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u_int *a; \
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type n; \
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__asm __volatile("stx %%fsr, %0" : "=m" (fe.fe_fsr) :); \
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a = (u_int *)&n; \
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fe.fe_f1.fp_sign = c[0] >> 31; \
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fe.fe_f1.fp_sticky = 0; \
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fe.fe_f1.fp_class = __fpu_qtof(&fe.fe_f1, c[0], c[1], c[2], c[3]); \
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a[0] = __fpu_fto ## fname(&fe, &fe.fe_f1, ## __VA_ARGS__); \
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return (n); \
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}
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#define FCC_EQ(fcc) ((fcc) == FSR_CC_EQ)
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#define FCC_GE(fcc) ((fcc) == FSR_CC_EQ || (fcc) == FSR_CC_GT)
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#define FCC_GT(fcc) ((fcc) == FSR_CC_GT)
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#define FCC_LE(fcc) ((fcc) == FSR_CC_EQ || (fcc) == FSR_CC_LT)
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#define FCC_LT(fcc) ((fcc) == FSR_CC_LT)
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#define FCC_NE(fcc) ((fcc) != FSR_CC_EQ)
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#define _QP_CMP(name, cmpe, test) \
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int _Qp_f ## name(u_int *a, u_int *b) ; \
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int \
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_Qp_f ## name(u_int *a, u_int *b) \
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{ \
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struct fpemu fe; \
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struct fpn *r; \
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__asm __volatile("stx %%fsr, %0" : "=m" (fe.fe_fsr) :); \
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fe.fe_f1.fp_sign = a[0] >> 31; \
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fe.fe_f1.fp_sticky = 0; \
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fe.fe_f1.fp_class = __fpu_qtof(&fe.fe_f1, a[0], a[1], a[2], a[3]); \
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fe.fe_f2.fp_sign = b[0] >> 31; \
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fe.fe_f2.fp_sticky = 0; \
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fe.fe_f2.fp_class = __fpu_qtof(&fe.fe_f2, b[0], b[1], b[2], b[3]); \
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__fpu_compare(&fe, cmpe, 0); \
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return (test(FSR_GET_FCC0(fe.fe_fsr))); \
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}
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_QP_OP(add)
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_QP_OP(div)
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_QP_OP(mul)
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_QP_OP(sub)
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_QP_TTOQ(d, d, double, u_int, a[0], a[1])
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_QP_TTOQ(i, i, int, u_int, a[0])
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_QP_TTOQ(s, s, float, u_int, a[0])
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_QP_TTOQ(x, x, long, u_long, a[0])
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_QP_TTOQ(ui, i, u_int, u_int, a[0])
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_QP_TTOQ(ux, x, u_long, u_long, a[0])
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_QP_QTOT(d, d, double, a)
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_QP_QTOT(i, i, int, )
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_QP_QTOT(s, s, float, )
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_QP_QTOT(x, x, long, a)
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_QP_QTOT(ui, i, u_int, )
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_QP_QTOT(ux, x, u_long, a)
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_QP_CMP(eq, 0, FCC_EQ)
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_QP_CMP(ge, 0, FCC_GE)
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_QP_CMP(gt, 0, FCC_GT)
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_QP_CMP(le, 0, FCC_LE)
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_QP_CMP(lt, 0, FCC_LT)
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_QP_CMP(ne, 0, FCC_NE)
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