Several chipset drivers alter parameters relevant for the DMA tag creation,

i.e. alignment, max_address, max_iosize and segsize (only max_address is
thought to have an negative impact regarding this issue though), after
calling ata_dmainit() either directly or indirectly so these values have
no effect or at least no effect on the DMA tags and the defaults are used
for the latter instead. So change the drivers to set these parameters
up-front and ata_dmainit() to honor them.

Reviewd by:	mav
MFC after:	1 month
This commit is contained in:
Marius Strobl 2010-11-28 18:53:29 +00:00
parent c6fb218c3c
commit 1510a2b019
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=216013
8 changed files with 33 additions and 28 deletions

View File

@ -68,17 +68,28 @@ ata_dmainit(device_t dev)
struct ata_channel *ch = device_get_softc(dev);
struct ata_dc_cb_args dcba;
ch->dma.alloc = ata_dmaalloc;
ch->dma.free = ata_dmafree;
ch->dma.setprd = ata_dmasetprd;
ch->dma.load = ata_dmaload;
ch->dma.unload = ata_dmaunload;
ch->dma.alignment = 2;
ch->dma.boundary = 65536;
ch->dma.segsize = 65536;
ch->dma.max_iosize = MIN((ATA_DMA_ENTRIES - 1) * PAGE_SIZE, MAXPHYS);
ch->dma.max_address = BUS_SPACE_MAXADDR_32BIT;
ch->dma.dma_slots = 1;
if (ch->dma.alloc == NULL)
ch->dma.alloc = ata_dmaalloc;
if (ch->dma.free == NULL)
ch->dma.free = ata_dmafree;
if (ch->dma.setprd == NULL)
ch->dma.setprd = ata_dmasetprd;
if (ch->dma.load == NULL)
ch->dma.load = ata_dmaload;
if (ch->dma.unload == NULL)
ch->dma.unload = ata_dmaunload;
if (ch->dma.alignment == 0)
ch->dma.alignment = 2;
if (ch->dma.boundary == 0)
ch->dma.boundary = 65536;
if (ch->dma.segsize == 0)
ch->dma.segsize = 65536;
if (ch->dma.max_iosize == 0)
ch->dma.max_iosize = MIN((ATA_DMA_ENTRIES - 1) * PAGE_SIZE, MAXPHYS);
if (ch->dma.max_address == 0)
ch->dma.max_address = BUS_SPACE_MAXADDR_32BIT;
if (ch->dma.dma_slots == 0)
ch->dma.dma_slots = 1;
if (bus_dma_tag_create(bus_get_dma_tag(dev), ch->dma.alignment, 0,
ch->dma.max_address, BUS_SPACE_MAXADDR,

View File

@ -1005,12 +1005,12 @@ ata_ahci_dmainit(device_t dev)
struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
struct ata_channel *ch = device_get_softc(dev);
ata_dmainit(dev);
/* note start and stop are not used here */
ch->dma.setprd = ata_ahci_dmasetprd;
ch->dma.max_iosize = (ATA_AHCI_DMA_ENTRIES - 1) * PAGE_SIZE;
if (ATA_INL(ctlr->r_res2, ATA_AHCI_CAP) & ATA_AHCI_CAP_64BIT)
ch->dma.max_address = BUS_SPACE_MAXADDR;
ata_dmainit(dev);
}
static int

View File

@ -56,7 +56,6 @@ static int ata_cyrix_chipinit(device_t dev);
static int ata_cyrix_ch_attach(device_t dev);
static int ata_cyrix_setmode(device_t dev, int target, int mode);
/*
* Cyrix chipset support functions
*/
@ -89,15 +88,12 @@ static int
ata_cyrix_ch_attach(device_t dev)
{
struct ata_channel *ch = device_get_softc(dev);
int error;
error = ata_pci_ch_attach(dev);
ch->dma.alignment = 16;
ch->dma.max_iosize = 64 * DEV_BSIZE;
return (error);
return (ata_pci_ch_attach(dev));
}
static int
ata_cyrix_setmode(device_t dev, int target, int mode)
{

View File

@ -614,7 +614,6 @@ ata_marvell_edma_dmainit(device_t dev)
struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
struct ata_channel *ch = device_get_softc(dev);
ata_dmainit(dev);
/* note start and stop are not used here */
ch->dma.setprd = ata_marvell_edma_dmasetprd;
@ -625,6 +624,7 @@ ata_marvell_edma_dmainit(device_t dev)
/* chip does not reliably do 64K DMA transfers */
if (ctlr->chip->cfg2 == MV_50XX || ctlr->chip->cfg2 == MV_60XX)
ch->dma.max_iosize = 64 * DEV_BSIZE;
ata_dmainit(dev);
}
ATA_DECLARE_DRIVER(ata_marvell);

View File

@ -90,12 +90,10 @@ static int
ata_national_ch_attach(device_t dev)
{
struct ata_channel *ch = device_get_softc(dev);
int error;
error = ata_pci_ch_attach(dev);
ch->dma.alignment = 16;
ch->dma.max_iosize = 64 * DEV_BSIZE;
return (error);
return (ata_pci_ch_attach(dev));
}
static int

View File

@ -979,13 +979,12 @@ ata_promise_mio_dmainit(device_t dev)
{
struct ata_channel *ch = device_get_softc(dev);
ata_dmainit(dev);
/* note start and stop are not used here */
ch->dma.setprd = ata_promise_mio_setprd;
ch->dma.max_iosize = 65536;
ata_dmainit(dev);
}
#define MAXLASTSGSIZE (32 * sizeof(u_int32_t))
static void
ata_promise_mio_setprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error)

View File

@ -179,8 +179,6 @@ ata_serverworks_ch_attach(device_t dev)
int ch_offset;
int i;
ata_pci_dmainit(dev);
ch_offset = ch->unit * 0x100;
for (i = ATA_DATA; i < ATA_MAX_RES; i++)
@ -245,6 +243,8 @@ ata_serverworks_ch_attach(device_t dev)
/* chip does not reliably do 64K DMA transfers */
ch->dma.max_iosize = 64 * DEV_BSIZE;
ata_pci_dmainit(dev);
return 0;
}

View File

@ -289,8 +289,6 @@ ata_sii_ch_attach(device_t dev)
int unit01 = (ch->unit & 1), unit10 = (ch->unit & 2);
int i;
ata_pci_dmainit(dev);
for (i = ATA_DATA; i <= ATA_COMMAND; i++) {
ch->r_io[i].res = ctlr->r_res2;
ch->r_io[i].offset = 0x80 + i + (unit01 << 6) + (unit10 << 8);
@ -332,6 +330,9 @@ ata_sii_ch_attach(device_t dev)
ch->hw.status = ata_sii_status;
if (ctlr->chip->cfg2 & SII_SETCLK)
ch->flags |= ATA_CHECKS_CABLE;
ata_pci_dmainit(dev);
return 0;
}
@ -915,11 +916,11 @@ ata_siiprb_dmainit(device_t dev)
{
struct ata_channel *ch = device_get_softc(dev);
ata_dmainit(dev);
/* note start and stop are not used here */
ch->dma.setprd = ata_siiprb_dmasetprd;
ch->dma.max_address = BUS_SPACE_MAXADDR;
ch->dma.max_iosize = (ATA_SIIPRB_DMA_ENTRIES - 1) * PAGE_SIZE;
ata_dmainit(dev);
}
ATA_DECLARE_DRIVER(ata_sii);