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Add support for the HighPoint HPT374 4 channel ATA chip.

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Sponsored by: Isilon Systems.
This commit is contained in:
Søren Schmidt 2002-02-11 15:48:04 +00:00
parent c7bb2e64aa
commit 15641a2f41
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=90533
2 changed files with 30 additions and 2 deletions
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21
sys/dev/ata/ata-dma.c
View File

@ -927,6 +927,7 @@ ata_dmainit(struct ata_channel *ch, int device,
return;
case 0x00041103: /* HighPoint HPT366/368/370/372 controllers */
case 0x00081103: /* HighPoint HPT374 controllers */
if (!ATAPI_DEVICE(ch, device) &&
udmamode >= 6 && pci_get_revid(parent) >= 0x05 &&
!(pci_read_config(parent, 0x5a, 1) & (ch->unit ? 0x01:0x02))) {
@ -1203,7 +1204,25 @@ hpt_timing(struct ata_channel *ch, int devno, int mode)
{
device_t parent = device_get_parent(ch->dev);
u_int32_t timing;
if (pci_get_revid(parent) >= 0x05) { /* HPT372 */
if (pci_get_revid(parent) >= 0x07) { /* HPT374 */
switch (mode) {
case ATA_PIO0: timing = 0x0ac1f48a; break;
case ATA_PIO1: timing = 0x0ac1f465; break;
case ATA_PIO2: timing = 0x0a81f454; break;
case ATA_PIO3: timing = 0x0a81f443; break;
case ATA_PIO4: timing = 0x0a81f442; break;
case ATA_WDMA2: timing = 0x22808242; break;
case ATA_UDMA2: timing = 0x120c8242; break;
case ATA_UDMA4: timing = 0x12ac8242; break;
case ATA_UDMA5: timing = 0x12848242; break;
case ATA_UDMA6: timing = 0x12808242; break;
default: timing = 0x0d029d5e;
}
pci_write_config(parent, 0x40 + (devno << 2) , timing, 4);
pci_write_config(parent, 0x5b,
(pci_read_config(parent, 0x5b, 1) & 0x01) | 0x20, 1);
}
else if (pci_get_revid(parent) >= 0x05) { /* HPT372 */
switch (mode) {
case ATA_PIO0: timing = 0x0d029d5e; break;
case ATA_PIO1: timing = 0x0d029d26; break;

11
sys/dev/ata/ata-pci.c
View File

@ -276,6 +276,13 @@ ata_pci_match(device_t dev)
}
return NULL;
case 0x00081103:
switch (pci_get_revid(dev)) {
case 0x07:
return "HighPoint HPT374 ATA133 controller";
}
return NULL;
/* unsupported but known chipsets, generic DMA only */
case 0x10001042:
case 0x10011042:
@ -376,6 +383,7 @@ ata_pci_attach(device_t dev)
break;
case 0x00041103: /* HighPoint HPT 366/368/370/372 */
case 0x00081103: /* HighPoint HPT 374 */
switch (pci_get_revid(dev)) {
case 0x00: /* HPT 366 */
case 0x01:
@ -388,6 +396,7 @@ ata_pci_attach(device_t dev)
case 0x03: /* HPT 370 */
case 0x04:
case 0x05: /* HPT 372 */
case 0x07: /* HPT 374 */
/* turn off interrupt prediction */
pci_write_config(dev, 0x51,
(pci_read_config(dev, 0x51, 1) & ~0x03), 1);
@ -396,7 +405,6 @@ ata_pci_attach(device_t dev)
/* turn on interrupts */
pci_write_config(dev, 0x5a,
(pci_read_config(dev, 0x5a, 1) & ~0x10), 1);
}
break;
@ -479,6 +487,7 @@ ata_pci_intr(struct ata_channel *ch)
*/
switch (ch->chiptype) {
case 0x00041103: /* HighPoint HPT366/368/370/372 */
case 0x00081103: /* HighPoint HPT374 */
if (((dmastat = ata_dmastatus(ch)) &
(ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) != ATA_BMSTAT_INTERRUPT)
return 1;