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Use the pin number rather than the hybrid pin number + name.

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This commit is contained in:
Warner Losh 2012-07-15 05:35:14 +00:00
parent e18ad51c15
commit 15fda8888a
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=238463
7 changed files with 35 additions and 35 deletions
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8
sys/boot/arm/at91/bootspi/ee.c
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@ -59,11 +59,11 @@ EEInit(void)
AT91PS_PIO pPio = (AT91PS_PIO)AT91C_BASE_PIOA;
AT91PS_PMC pPMC = (AT91PS_PMC)AT91C_BASE_PMC;
pPio->PIO_ASR = AT91C_PA25_TWD | AT91C_PA26_TWCK;
pPio->PIO_PDR = AT91C_PA25_TWD | AT91C_PA26_TWCK;
pPio->PIO_ASR = AT91C_PIO_PA25 | AT91C_PIO_PA26;
pPio->PIO_PDR = AT91C_PIO_PA25 | AT91C_PIO_PA26;
pPio->PIO_MDDR = ~AT91C_PA25_TWD;
pPio->PIO_MDER = AT91C_PA25_TWD;
pPio->PIO_MDDR = ~AT91C_PIO_PA25;
pPio->PIO_MDER = AT91C_PIO_PA25;
pPMC->PMC_PCER = 1u << AT91C_ID_TWI;

2
sys/boot/arm/at91/libat91/at91rm9200.h
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@ -2311,7 +2311,7 @@ typedef struct _AT91S_BFC {
// ========== Register definition for BFC peripheral ==========
#define AT91C_BFC_MR ((AT91_REG *) 0xFFFFFFC0) // (BFC) BFC Mode Register
#include <at91/at91_pio_rm9200.h>
#include <at91/at91_pioreg.h>
// *****************************************************************************
// PERIPHERAL ID DEFINITIONS FOR AT91RM9200

4
sys/boot/arm/at91/libat91/at91rm9200_lowlevel.c
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@ -188,8 +188,8 @@ _init(void)
AT91C_BASE_PIOC->PIO_PDR = 0xffff0000;
#endif
// Configure DBGU -use local routine optimized for space
AT91C_BASE_PIOA->PIO_ASR = AT91C_PA31_DTXD | AT91C_PA30_DRXD;
AT91C_BASE_PIOA->PIO_PDR = AT91C_PA31_DTXD | AT91C_PA30_DRXD;
AT91C_BASE_PIOA->PIO_ASR = AT91C_PIO_PA31 | AT91C_PIO_PA30;
AT91C_BASE_PIOA->PIO_PDR = AT91C_PIO_PA31 | AT91C_PIO_PA30;
pUSART->US_IDR = (unsigned int) -1;
pUSART->US_CR =
AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS;

8
sys/boot/arm/at91/libat91/eeprom.c
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@ -58,11 +58,11 @@ InitEEPROM(void)
AT91PS_PIO pPio = (AT91PS_PIO)AT91C_BASE_PIOA;
AT91PS_PMC pPMC = (AT91PS_PMC)AT91C_BASE_PMC;
pPio->PIO_ASR = AT91C_PA25_TWD | AT91C_PA26_TWCK;
pPio->PIO_PDR = AT91C_PA25_TWD | AT91C_PA26_TWCK;
pPio->PIO_ASR = AT91C_PIO_PA25 | AT91C_PIO_PA26;
pPio->PIO_PDR = AT91C_PIO_PA25 | AT91C_PIO_PA26;
pPio->PIO_MDDR = ~AT91C_PA25_TWD;
pPio->PIO_MDER = AT91C_PA25_TWD;
pPio->PIO_MDDR = ~AT91C_PIO_PA25;
pPio->PIO_MDER = AT91C_PIO_PA25;
pPMC->PMC_PCER = 1u << AT91C_ID_TWI;

28
sys/boot/arm/at91/libat91/emac_init.c
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@ -85,24 +85,24 @@ EMAC_SetMACAddress(unsigned char mac[6])
AT91C_BASE_PMC->PMC_PCER = 1u << AT91C_ID_EMAC;
AT91C_BASE_PIOA->PIO_ASR =
AT91C_PA14_ERXER | AT91C_PA12_ERX0 | AT91C_PA13_ERX1 |
AT91C_PA8_ETXEN | AT91C_PA16_EMDIO | AT91C_PA9_ETX0 |
AT91C_PA10_ETX1 | AT91C_PA11_ECRS_ECRSDV | AT91C_PA15_EMDC |
AT91C_PA7_ETXCK_EREFCK;
AT91C_PIO_PA14 | AT91C_PIO_PA12 | AT91C_PIO_PA13 |
AT91C_PIO_PA8 | AT91C_PIO_PA16 | AT91C_PIO_PA9 |
AT91C_PIO_PA10 | AT91C_PIO_PA11 | AT91C_PIO_PA15 |
AT91C_PIO_PA7;
AT91C_BASE_PIOA->PIO_PDR =
AT91C_PA14_ERXER | AT91C_PA12_ERX0 | AT91C_PA13_ERX1 |
AT91C_PA8_ETXEN | AT91C_PA16_EMDIO | AT91C_PA9_ETX0 |
AT91C_PA10_ETX1 | AT91C_PA11_ECRS_ECRSDV | AT91C_PA15_EMDC |
AT91C_PA7_ETXCK_EREFCK;
AT91C_PIO_PA14 | AT91C_PIO_PA12 | AT91C_PIO_PA13 |
AT91C_PIO_PA8 | AT91C_PIO_PA16 | AT91C_PIO_PA9 |
AT91C_PIO_PA10 | AT91C_PIO_PA11 | AT91C_PIO_PA15 |
AT91C_PIO_PA7;
#if defined(BOOT_KB920X) | defined(BOOT_BWCT) /* Really !RMII */
AT91C_BASE_PIOB->PIO_BSR =
AT91C_PB12_ETX2 | AT91C_PB13_ETX3 | AT91C_PB14_ETXER |
AT91C_PB15_ERX2 | AT91C_PB16_ERX3 | AT91C_PB17_ERXDV |
AT91C_PB18_ECOL | AT91C_PB19_ERXCK;
AT91C_PIO_PB12 | AT91C_PIO_PB13 | AT91C_PIO_PB14 |
AT91C_PIO_PB15 | AT91C_PIO_PB16 | AT91C_PIO_PB17 |
AT91C_PIO_PB18 | AT91C_PIO_PB19;
AT91C_BASE_PIOB->PIO_PDR =
AT91C_PB12_ETX2 | AT91C_PB13_ETX3 | AT91C_PB14_ETXER |
AT91C_PB15_ERX2 | AT91C_PB16_ERX3 | AT91C_PB17_ERXDV |
AT91C_PB18_ECOL | AT91C_PB19_ERXCK;
AT91C_PIO_PB12 | AT91C_PIO_PB13 | AT91C_PIO_PB14 |
AT91C_PIO_PB15 | AT91C_PIO_PB16 | AT91C_PIO_PB17 |
AT91C_PIO_PB18 | AT91C_PIO_PB19;
#endif
pEmac->EMAC_CTL = 0;

12
sys/boot/arm/at91/libat91/lib_AT91RM9200.h
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@ -134,17 +134,17 @@ AT91F_MCI_CfgPIO(void)
// Configure PIO controllers to periph mode
AT91F_PIO_CfgPeriph(
AT91C_BASE_PIOA, // PIO controller base address
((unsigned int) AT91C_PA28_MCCDA ) |
((unsigned int) AT91C_PA29_MCDA0 ) |
((unsigned int) AT91C_PA27_MCCK ), // Peripheral A
((unsigned int) AT91C_PIO_PA28 ) |
((unsigned int) AT91C_PIO_PA29 ) |
((unsigned int) AT91C_PIO_PA27 ), // Peripheral A
0); // Peripheral B
// Configure PIO controllers to periph mode
AT91F_PIO_CfgPeriph(
AT91C_BASE_PIOB, // PIO controller base address
0, // Peripheral A
((unsigned int) AT91C_PB5_MCDA3 ) |
((unsigned int) AT91C_PB3_MCDA1 ) |
((unsigned int) AT91C_PB4_MCDA2 )); // Peripheral B
((unsigned int) AT91C_PIO_PB5 ) |
((unsigned int) AT91C_PIO_PB3 ) |
((unsigned int) AT91C_PIO_PB4 )); // Peripheral B
}

8
sys/boot/arm/at91/libat91/spi_flash.c
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@ -223,10 +223,10 @@ SPI_InitFlash(void)
// enable CS0, CLK, MOSI, MISO
pPio = (AT91PS_PIO)AT91C_BASE_PIOA;
pPio->PIO_ASR = AT91C_PA3_NPCS0 | AT91C_PA1_MOSI | AT91C_PA0_MISO |
AT91C_PA2_SPCK;
pPio->PIO_PDR = AT91C_PA3_NPCS0 | AT91C_PA1_MOSI | AT91C_PA0_MISO |
AT91C_PA2_SPCK;
pPio->PIO_ASR = AT91C_PIO_PA3 | AT91C_PIO_PA1 | AT91C_PIO_PA0 |
AT91C_PIO_PA2;
pPio->PIO_PDR = AT91C_PIO_PA3 | AT91C_PIO_PA1 | AT91C_PIO_PA0 |
AT91C_PIO_PA2;
// enable clocks to SPI
AT91C_BASE_PMC->PMC_PCER = 1u << AT91C_ID_SPI;