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ioat: Define DMACAPABILITY bits

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Check for BFILL capability before initiating blockfill operations.

Sponsored by:	EMC / Isilon Storage Division
This commit is contained in:
Conrad Meyer 2015-10-28 02:37:24 +00:00
parent 523e46d486
commit 1693d27b71
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=290087
5 changed files with 37 additions and 2 deletions
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12
sys/dev/ioat/ioat.c
View File

@ -364,14 +364,16 @@ ioat3_attach(device_t device)
struct ioat_descriptor **ring;
struct ioat_descriptor *next;
struct ioat_dma_hw_descriptor *dma_hw_desc;
uint32_t capabilities;
int i, num_descriptors;
int error;
uint8_t xfercap;
error = 0;
ioat = DEVICE2SOFTC(device);
capabilities = ioat_read_dmacapability(ioat);
ioat->capabilities = ioat_read_dmacapability(ioat);
ioat_log_message(1, "Capabilities: %b\n", (int)ioat->capabilities,
IOAT_DMACAP_STR);
xfercap = ioat_read_xfercap(ioat);
ioat->max_xfer_size = 1 << xfercap;
@ -760,6 +762,12 @@ ioat_blockfill(bus_dmaengine_t dmaengine, bus_addr_t dst, uint64_t fillpattern,
CTR0(KTR_IOAT, __func__);
ioat = to_ioat_softc(dmaengine);
if ((ioat->capabilities & IOAT_DMACAP_BFILL) == 0) {
ioat_log_message(0, "%s: Device lacks BFILL capability\n",
__func__);
return (NULL);
}
if ((dst & (0xffffull << 48)) != 0) {
ioat_log_message(0, "%s: High 16 bits of dst invalid\n",
__func__);

2
sys/dev/ioat/ioat.h
View File

@ -71,6 +71,8 @@ void ioat_release(bus_dmaengine_t dmaengine);
/*
* Issue a blockfill operation. The 64-bit pattern 'fillpattern' is written to
* 'len' physically contiguous bytes at 'dst'.
*
* Only supported on devices with the BFILL capability.
*/
struct bus_dmadesc *ioat_blockfill(bus_dmaengine_t dmaengine, bus_addr_t dst,
uint64_t fillpattern, bus_size_t len, bus_dmaengine_callback_t callback_fn,

15
sys/dev/ioat/ioat_hw.h
View File

@ -54,6 +54,21 @@ __FBSDID("$FreeBSD$");
#define IOAT_CS_STATUS_OFFSET 0x0E
#define IOAT_DMACAPABILITY_OFFSET 0x10
#define IOAT_DMACAP_PB (1 << 0)
#define IOAT_DMACAP_DCA (1 << 4)
#define IOAT_DMACAP_BFILL (1 << 6)
#define IOAT_DMACAP_XOR (1 << 8)
#define IOAT_DMACAP_PQ (1 << 9)
#define IOAT_DMACAP_DMA_DIF (1 << 10)
#define IOAT_DMACAP_DWBES (1 << 13)
#define IOAT_DMACAP_RAID16SS (1 << 17)
#define IOAT_DMACAP_DMAMC (1 << 18)
#define IOAT_DMACAP_CTOS (1 << 19)
#define IOAT_DMACAP_STR \
"\20\24Completion_Timeout_Support\23DMA_with_Multicasting_Support" \
"\22RAID_Super_descriptors\16Descriptor_Write_Back_Error_Support" \
"\13DMA_with_DIF\12PQ\11XOR\07Block_Fill\05DCA\01Page_Break"
/* DMA Channel Registers */
#define IOAT_CHANCTRL_OFFSET 0x80

1
sys/dev/ioat/ioat_internal.h
View File

@ -373,6 +373,7 @@ struct ioat_softc {
int pci_resource_id;
struct resource *pci_resource;
uint32_t max_xfer_size;
uint32_t capabilities;
struct resource *res;
int rid;

9
sys/dev/ioat/ioat_test.c
View File

@ -319,6 +319,15 @@ ioat_dma_test(void *arg)
return;
}
if (test->testkind == IOAT_TEST_FILL &&
(to_ioat_softc(dmaengine)->capabilities & IOAT_DMACAP_BFILL) == 0)
{
ioat_test_log(0,
"Hardware doesn't support block fill, aborting test\n");
test->status[IOAT_TEST_INVALID_INPUT]++;
goto out;
}
index = g_thread_index++;
TAILQ_INIT(&test->free_q);
TAILQ_INIT(&test->pend_q);