ioat: Define DMACAPABILITY bits
Check for BFILL capability before initiating blockfill operations. Sponsored by: EMC / Isilon Storage Division
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parent
523e46d486
commit
1693d27b71
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=290087
@ -364,14 +364,16 @@ ioat3_attach(device_t device)
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struct ioat_descriptor **ring;
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struct ioat_descriptor *next;
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struct ioat_dma_hw_descriptor *dma_hw_desc;
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uint32_t capabilities;
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int i, num_descriptors;
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int error;
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uint8_t xfercap;
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error = 0;
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ioat = DEVICE2SOFTC(device);
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capabilities = ioat_read_dmacapability(ioat);
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ioat->capabilities = ioat_read_dmacapability(ioat);
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ioat_log_message(1, "Capabilities: %b\n", (int)ioat->capabilities,
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IOAT_DMACAP_STR);
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xfercap = ioat_read_xfercap(ioat);
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ioat->max_xfer_size = 1 << xfercap;
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@ -760,6 +762,12 @@ ioat_blockfill(bus_dmaengine_t dmaengine, bus_addr_t dst, uint64_t fillpattern,
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CTR0(KTR_IOAT, __func__);
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ioat = to_ioat_softc(dmaengine);
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if ((ioat->capabilities & IOAT_DMACAP_BFILL) == 0) {
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ioat_log_message(0, "%s: Device lacks BFILL capability\n",
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__func__);
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return (NULL);
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}
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if ((dst & (0xffffull << 48)) != 0) {
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ioat_log_message(0, "%s: High 16 bits of dst invalid\n",
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__func__);
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@ -71,6 +71,8 @@ void ioat_release(bus_dmaengine_t dmaengine);
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/*
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* Issue a blockfill operation. The 64-bit pattern 'fillpattern' is written to
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* 'len' physically contiguous bytes at 'dst'.
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*
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* Only supported on devices with the BFILL capability.
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*/
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struct bus_dmadesc *ioat_blockfill(bus_dmaengine_t dmaengine, bus_addr_t dst,
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uint64_t fillpattern, bus_size_t len, bus_dmaengine_callback_t callback_fn,
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@ -54,6 +54,21 @@ __FBSDID("$FreeBSD$");
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#define IOAT_CS_STATUS_OFFSET 0x0E
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#define IOAT_DMACAPABILITY_OFFSET 0x10
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#define IOAT_DMACAP_PB (1 << 0)
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#define IOAT_DMACAP_DCA (1 << 4)
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#define IOAT_DMACAP_BFILL (1 << 6)
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#define IOAT_DMACAP_XOR (1 << 8)
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#define IOAT_DMACAP_PQ (1 << 9)
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#define IOAT_DMACAP_DMA_DIF (1 << 10)
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#define IOAT_DMACAP_DWBES (1 << 13)
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#define IOAT_DMACAP_RAID16SS (1 << 17)
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#define IOAT_DMACAP_DMAMC (1 << 18)
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#define IOAT_DMACAP_CTOS (1 << 19)
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#define IOAT_DMACAP_STR \
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"\20\24Completion_Timeout_Support\23DMA_with_Multicasting_Support" \
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"\22RAID_Super_descriptors\16Descriptor_Write_Back_Error_Support" \
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"\13DMA_with_DIF\12PQ\11XOR\07Block_Fill\05DCA\01Page_Break"
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/* DMA Channel Registers */
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#define IOAT_CHANCTRL_OFFSET 0x80
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@ -373,6 +373,7 @@ struct ioat_softc {
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int pci_resource_id;
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struct resource *pci_resource;
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uint32_t max_xfer_size;
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uint32_t capabilities;
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struct resource *res;
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int rid;
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@ -319,6 +319,15 @@ ioat_dma_test(void *arg)
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return;
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}
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if (test->testkind == IOAT_TEST_FILL &&
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(to_ioat_softc(dmaengine)->capabilities & IOAT_DMACAP_BFILL) == 0)
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{
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ioat_test_log(0,
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"Hardware doesn't support block fill, aborting test\n");
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test->status[IOAT_TEST_INVALID_INPUT]++;
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goto out;
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}
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index = g_thread_index++;
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TAILQ_INIT(&test->free_q);
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TAILQ_INIT(&test->pend_q);
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