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Remove or conditionalize some hypervisor-unfriendly instruction sequences.

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This commit is contained in:
Nathan Whitehorn 2010-11-12 04:22:00 +00:00
parent 6413b05739
commit 16bfd6f347
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=215160
2 changed files with 12 additions and 4 deletions
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4
sys/powerpc/aim/mmu_oea64.c
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@ -1136,10 +1136,6 @@ moea64_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend)
moea64_add_ofw_mappings(mmup, mmu, sz); moea64_add_ofw_mappings(mmup, mmu, sz);
} }
#ifdef SMP
TLBSYNC();
#endif
/* /*
* Calculate the last available physical address. * Calculate the last available physical address.
*/ */

12
sys/powerpc/powerpc/mp_machdep.c
View File

@ -78,7 +78,13 @@ machdep_ap_bootstrap(void)
; ;
/* Initialize DEC and TB, sync with the BSP values */ /* Initialize DEC and TB, sync with the BSP values */
#ifdef __powerpc64__
/* Writing to the time base register is hypervisor-privileged */
if (mfmsr() & PSL_HV)
mttb(ap_timebase);
#else
mttb(ap_timebase); mttb(ap_timebase);
#endif
decr_ap_init(); decr_ap_init();
/* Serialize console output and AP count increment */ /* Serialize console output and AP count increment */
@ -240,7 +246,13 @@ cpu_mp_unleash(void *dummy)
/* Let APs continue */ /* Let APs continue */
atomic_store_rel_int(&ap_letgo, 1); atomic_store_rel_int(&ap_letgo, 1);
#ifdef __powerpc64__
/* Writing to the time base register is hypervisor-privileged */
if (mfmsr() & PSL_HV)
mttb(ap_timebase);
#else
mttb(ap_timebase); mttb(ap_timebase);
#endif
while (ap_awake < smp_cpus) while (ap_awake < smp_cpus)
; ;