[ath] remove the inline version of the register access macros.
These are going to be much more efficient on low end embedded systems but unfortunately they make it .. less convenient to implement correct bus barriers and debugging. They also didn't implement the register serialisation workaround required for Owl (AR5416.) So, just remove them for now. Later on I'll just inline the routines from ah_osdep.c.
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=293111
@ -270,12 +270,14 @@ ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
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bus_space_tag_t tag = BUSTAG(ah);
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bus_space_handle_t h = ah->ah_sh;
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#ifdef AH_DEBUG
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/* Debug - complain if we haven't fully waken things up */
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if (! ath_hal_reg_whilst_asleep(ah, reg) &&
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ah->ah_powerMode != HAL_PM_AWAKE) {
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ath_hal_printf(ah, "%s: reg=0x%08x, val=0x%08x, pm=%d\n",
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__func__, reg, val, ah->ah_powerMode);
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}
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#endif
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if (ath_hal_alq) {
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struct ale *ale = ath_hal_alq_get(ah);
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@ -303,12 +305,14 @@ ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
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bus_space_handle_t h = ah->ah_sh;
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u_int32_t val;
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#ifdef AH_DEBUG
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/* Debug - complain if we haven't fully waken things up */
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if (! ath_hal_reg_whilst_asleep(ah, reg) &&
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ah->ah_powerMode != HAL_PM_AWAKE) {
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ath_hal_printf(ah, "%s: reg=0x%08x, pm=%d\n",
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__func__, reg, ah->ah_powerMode);
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}
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#endif
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if (ah->ah_config.ah_serialise_reg_war)
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mtx_lock_spin(&ah_regser_mtx);
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@ -345,7 +349,8 @@ OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v)
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}
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}
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}
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#elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC)
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#else /* AH_DEBUG_ALQ */
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/*
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* Memory-mapped device register read/write. These are here
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* as routines when debugging support is enabled and/or when
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@ -363,12 +368,14 @@ ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
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bus_space_tag_t tag = BUSTAG(ah);
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bus_space_handle_t h = ah->ah_sh;
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#ifdef AH_DEBUG
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/* Debug - complain if we haven't fully waken things up */
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if (! ath_hal_reg_whilst_asleep(ah, reg) &&
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ah->ah_powerMode != HAL_PM_AWAKE) {
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ath_hal_printf(ah, "%s: reg=0x%08x, val=0x%08x, pm=%d\n",
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__func__, reg, val, ah->ah_powerMode);
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}
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#endif
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if (ah->ah_config.ah_serialise_reg_war)
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mtx_lock_spin(&ah_regser_mtx);
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@ -385,12 +392,14 @@ ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
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bus_space_handle_t h = ah->ah_sh;
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u_int32_t val;
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#ifdef AH_DEBUG
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/* Debug - complain if we haven't fully waken things up */
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if (! ath_hal_reg_whilst_asleep(ah, reg) &&
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ah->ah_powerMode != HAL_PM_AWAKE) {
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ath_hal_printf(ah, "%s: reg=0x%08x, pm=%d\n",
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__func__, reg, ah->ah_powerMode);
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}
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#endif
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if (ah->ah_config.ah_serialise_reg_war)
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mtx_lock_spin(&ah_regser_mtx);
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@ -400,7 +409,7 @@ ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
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mtx_unlock_spin(&ah_regser_mtx);
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return val;
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}
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#endif /* AH_DEBUG || AH_REGOPS_FUNC */
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#endif /* AH_DEBUG_ALQ */
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#ifdef AH_ASSERT
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void
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@ -131,26 +131,14 @@ struct ath_hal;
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OS_BUS_BARRIER((_ah), (_reg), 4, (_t))
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/*
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* Register read/write operations are either handled through
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* platform-dependent routines (or when debugging is enabled
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* with AH_DEBUG); or they are inline expanded using the macros
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* defined below.
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* Register read/write operations are handled through
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* platform-dependent routines.
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*/
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#if defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) || defined(AH_DEBUG_ALQ)
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#define OS_REG_WRITE(_ah, _reg, _val) ath_hal_reg_write(_ah, _reg, _val)
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#define OS_REG_READ(_ah, _reg) ath_hal_reg_read(_ah, _reg)
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extern void ath_hal_reg_write(struct ath_hal *ah, u_int reg, u_int32_t val);
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extern u_int32_t ath_hal_reg_read(struct ath_hal *ah, u_int reg);
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#else
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/* XXX TODO: enforce barriers */
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#define OS_REG_WRITE(_ah, _reg, _val) \
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bus_space_write_4((bus_space_tag_t)(_ah)->ah_st, \
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(bus_space_handle_t)(_ah)->ah_sh, (_reg), (_val))
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#define OS_REG_READ(_ah, _reg) \
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bus_space_read_4((bus_space_tag_t)(_ah)->ah_st, \
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(bus_space_handle_t)(_ah)->ah_sh, (_reg))
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#endif
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#ifdef AH_DEBUG_ALQ
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extern void OS_MARK(struct ath_hal *, u_int id, u_int32_t value);
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