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Split CPU_CORTEXA into CPU_CORTEXA8, for the Cortex-A8, and CPU_CORTEXA_MP,

Browse Source 
for later Cortex-A CPUs that support the Multiprocessor Extensions. This
will be needed to support both in a single GENERIC kernel while still
being able to only build for a single SoC.

Reviewed by:	mmel
Relnotes:	yes
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D8138
This commit is contained in:
Andrew Turner 2016-10-04 12:25:44 +00:00
parent d029cb6152
commit 1834282de6
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=306672
28 changed files with 43 additions and 35 deletions
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2
sys/arm/allwinner/std.allwinner
View File

@ -1,7 +1,7 @@
# Allwinner common options
#$FreeBSD$
cpu CPU_CORTEXA
cpu CPU_CORTEXA_MP
machine arm armv6
makeoptions CONF_CFLAGS="-march=armv7a"

2
sys/arm/allwinner/std.allwinner_up
View File

@ -1,7 +1,7 @@
# Allwinner Uniprocessor common options
#$FreeBSD$
cpu CPU_CORTEXA
cpu CPU_CORTEXA8
machine arm armv6
makeoptions CONF_CFLAGS="-march=armv7a"

2
sys/arm/altera/socfpga/std.socfpga
View File

@ -1,6 +1,6 @@
# $FreeBSD$
cpu CPU_CORTEXA
cpu CPU_CORTEXA_MP
machine arm armv6
makeoptions CONF_CFLAGS="-march=armv7a"

2
sys/arm/amlogic/aml8726/std.aml8726
View File

@ -1,6 +1,6 @@
# $FreeBSD$
cpu CPU_CORTEXA
cpu CPU_CORTEXA_MP
machine arm armv6
makeoptions CONF_CFLAGS="-march=armv7a"

2
sys/arm/annapurna/alpine/std.alpine
View File

@ -1,6 +1,6 @@
# $FreeBSD$
cpu CPU_CORTEXA
cpu CPU_CORTEXA_MP
machine arm armv6
makeoptions CONF_CFLAGS="-march=armv7a -DAL_HAVE_TYPES"

16
sys/arm/arm/cpufunc.c
View File

@ -438,7 +438,7 @@ struct cpu_functions arm1176_cpufuncs = {
};
#endif /*CPU_ARM1176 */
#if defined(CPU_CORTEXA) || defined(CPU_KRAIT)
#if defined(CPU_CORTEXA8) || defined(CPU_CORTEXA_MP) || defined(CPU_KRAIT)
struct cpu_functions cortexa_cpufuncs = {
/* MMU functions */
.cf_control = cpufunc_control,
@ -463,7 +463,7 @@ struct cpu_functions cortexa_cpufuncs = {
/* Soft functions */
.cf_setup = cortexa_setup
};
#endif /* CPU_CORTEXA */
#endif /* CPU_CORTEXA8 || CPU_CORTEXA_MP || CPU_KRAIT */
/*
* Global constants also used by locore.s
@ -481,7 +481,7 @@ u_int cpu_reset_needs_v4_MMU_disable; /* flag used in locore-v4.s */
defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \
defined(CPU_FA526) || defined(CPU_MV_PJ4B) || \
defined(CPU_XSCALE_81342) || \
defined(CPU_CORTEXA) || defined(CPU_KRAIT)
defined(CPU_CORTEXA8) || defined(CPU_CORTEXA_MP) || defined(CPU_KRAIT)
/* Global cache line sizes, use 32 as default */
int arm_dcache_min_line_size = 32;
@ -672,7 +672,7 @@ set_cpufuncs()
goto out;
}
#endif /* CPU_ARM1176 */
#if defined(CPU_CORTEXA) || defined(CPU_KRAIT)
#if defined(CPU_CORTEXA8) || defined(CPU_CORTEXA_MP) || defined(CPU_KRAIT)
switch(cputype & CPU_ID_SCHEME_MASK) {
case CPU_ID_CORTEXA5:
case CPU_ID_CORTEXA7:
@ -690,7 +690,7 @@ set_cpufuncs()
default:
break;
}
#endif /* CPU_CORTEXA */
#endif /* CPU_CORTEXA8 || CPU_CORTEXA_MP || CPU_KRAIT */
#if defined(CPU_MV_PJ4B)
if (cputype == CPU_ID_MV88SV581X_V7 ||
@ -843,7 +843,7 @@ arm10_setup(void)
#if defined(CPU_ARM1176) \
|| defined(CPU_MV_PJ4B) \
|| defined(CPU_CORTEXA) || defined(CPU_KRAIT)
|| defined(CPU_CORTEXA8) || defined(CPU_CORTEXA_MP) || defined(CPU_KRAIT)
static __inline void
cpu_scc_setup_ccnt(void)
{
@ -913,7 +913,7 @@ pj4bv7_setup(void)
}
#endif /* CPU_MV_PJ4B */
#if defined(CPU_CORTEXA) || defined(CPU_KRAIT)
#if defined(CPU_CORTEXA8) || defined(CPU_CORTEXA_MP) || defined(CPU_KRAIT)
void
cortexa_setup(void)
@ -921,7 +921,7 @@ cortexa_setup(void)
cpu_scc_setup_ccnt();
}
#endif /* CPU_CORTEXA */
#endif /* CPU_CORTEXA8 || CPU_CORTEXA_MP || CPU_KRAIT */
#if defined(CPU_FA526)
void

2
sys/arm/arm/elf_trampoline.c
View File

@ -88,7 +88,7 @@ extern void xscalec3_l2cache_purge(void);
#elif defined(SOC_MV_KIRKWOOD) || defined(SOC_MV_DISCOVERY)
#define cpu_l2cache_wbinv_all sheeva_l2cache_wbinv_all
extern void sheeva_l2cache_wbinv_all(void);
#elif defined(CPU_CORTEXA) || defined(CPU_KRAIT)
#elif defined(CPU_CORTEXA8) || defined(CPU_CORTEXA_MP) || defined(CPU_KRAIT)
#define cpu_idcache_wbinv_all armv7_idcache_wbinv_all
#define cpu_l2cache_wbinv_all()
#else

2
sys/arm/broadcom/bcm2835/std.bcm2836
View File

@ -1,7 +1,7 @@
# $FreeBSD$
machine arm armv6
cpu CPU_CORTEXA
cpu CPU_CORTEXA_MP
makeoptions CONF_CFLAGS="-march=armv7a"
options SOC_BCM2836

2
sys/arm/conf/GENERIC
View File

@ -20,7 +20,7 @@
ident GENERIC
cpu CPU_CORTEXA
cpu CPU_CORTEXA_MP
machine arm armv6
makeoptions CONF_CFLAGS="-march=armv7a"

2
sys/arm/freescale/imx/std.imx51
View File

@ -1,6 +1,6 @@
# $FreeBSD$
machine arm armv6
cpu CPU_CORTEXA
cpu CPU_CORTEXA8
makeoptions CONF_CFLAGS="-march=armv7a"
options KERNVIRTADDR=0xc0100000

2
sys/arm/freescale/imx/std.imx53
View File

@ -1,6 +1,6 @@
# $FreeBSD$
machine arm armv6
cpu CPU_CORTEXA
cpu CPU_CORTEXA8
makeoptions CONF_CFLAGS="-march=armv7a"
options KERNVIRTADDR=0xc0100000

2
sys/arm/freescale/imx/std.imx6
View File

@ -1,6 +1,6 @@
# $FreeBSD$
machine arm armv6
cpu CPU_CORTEXA
cpu CPU_CORTEXA_MP
makeoptions CONF_CFLAGS="-march=armv7a"
options KERNVIRTADDR = 0xc2000000

2
sys/arm/freescale/vybrid/std.vybrid
View File

@ -1,6 +1,6 @@
# $FreeBSD$
cpu CPU_CORTEXA
cpu CPU_CORTEXA_MP
machine arm armv6
makeoptions CONF_CFLAGS="-march=armv7a"

9
sys/arm/include/cpuconf.h
View File

@ -56,7 +56,8 @@
defined(CPU_XSCALE_PXA2X0) + \
defined(CPU_FA526) + \
defined(CPU_XSCALE_IXP425)) + \
defined(CPU_CORTEXA) + \
defined(CPU_CORTEXA8) + \
defined(CPU_CORTEXA_MP) + \
defined(CPU_KRAIT) + \
defined(CPU_MV_PJ4B)
@ -85,7 +86,8 @@
#endif
#endif
#if defined(CPU_CORTEXA) || defined(CPU_KRAIT) || defined(CPU_MV_PJ4B)
#if defined(CPU_CORTEXA8) || defined(CPU_CORTEXA_MP) || \
defined(CPU_KRAIT) || defined(CPU_MV_PJ4B)
#define ARM_ARCH_7A 1
#else
#define ARM_ARCH_7A 0
@ -155,7 +157,8 @@
#define ARM_MMU_V6 0
#endif
#if defined(CPU_CORTEXA) || defined(CPU_KRAIT) || defined(CPU_MV_PJ4B)
#if defined(CPU_CORTEXA8) || defined(CPU_CORTEXA_MP) || \
defined(CPU_KRAIT) || defined(CPU_MV_PJ4B)
#define ARM_MMU_V7 1
#else
#define ARM_MMU_V7 0

3
sys/arm/include/cpufunc.h
View File

@ -278,7 +278,8 @@ void sheeva_l2cache_wbinv_all (void);
#if defined(CPU_MV_PJ4B)
void armv6_idcache_wbinv_all (void);
#endif
#if defined(CPU_MV_PJ4B) || defined(CPU_CORTEXA) || defined(CPU_KRAIT)
#if defined(CPU_CORTEXA8) || defined(CPU_CORTEXA_MP) || \
defined(CPU_MV_PJ4B) || defined(CPU_KRAIT)
void armv7_setttb (u_int);
void armv7_idcache_wbinv_all (void);
void armv7_cpu_sleep (int);

2
sys/arm/include/intr.h
View File

@ -76,7 +76,7 @@ int intr_pic_ipi_setup(u_int, const char *, intr_ipi_handler_t *, void *);
#elif defined(CPU_ARM9) || defined(SOC_MV_KIRKWOOD) || \
defined(CPU_XSCALE_IXP435)
#define NIRQ 64
#elif defined(CPU_CORTEXA)
#elif defined(CPU_CORTEXA8) || defined(CPU_CORTEXA_MP)
#define NIRQ 1020
#elif defined(CPU_KRAIT)
#define NIRQ 288

2
sys/arm/mv/armada38x/std.armada38x
View File

@ -1,7 +1,7 @@
# $FreeBSD$
files "../mv/armada38x/files.armada38x"
files "../mv/files.mv"
cpu CPU_CORTEXA
cpu CPU_CORTEXA_MP
machine arm armv6
makeoptions CONF_CFLAGS="-march=armv7a"

2
sys/arm/nvidia/tegra124/std.tegra124
View File

@ -1,5 +1,5 @@
# $FreeBSD$
cpu CPU_CORTEXA
cpu CPU_CORTEXA_MP
machine arm armv6
makeoptions CONF_CFLAGS="-march=armv7a"

2
sys/arm/qemu/std.virt
View File

@ -1,6 +1,6 @@
# $FreeBSD$
machine arm armv6
cpu CPU_CORTEXA
cpu CPU_CORTEXA_MP
makeoptions CONF_CFLAGS="-march=armv7a"
options KERNVIRTADDR = 0xc1000000

2
sys/arm/rockchip/std.rk30xx
View File

@ -1,7 +1,7 @@
# Rockchip rk30xx common options
#$FreeBSD$
cpu CPU_CORTEXA
cpu CPU_CORTEXA_MP
machine arm armv6
makeoptions CONF_CFLAGS="-march=armv7a"

2
sys/arm/samsung/exynos/std.exynos5250
View File

@ -1,6 +1,6 @@
# $FreeBSD$
cpu CPU_CORTEXA
cpu CPU_CORTEXA_MP
machine arm armv6
makeoptions CONF_CFLAGS="-march=armv7a"

2
sys/arm/samsung/exynos/std.exynos5420
View File

@ -1,6 +1,6 @@
# $FreeBSD$
cpu CPU_CORTEXA
cpu CPU_CORTEXA_MP
machine arm armv6
makeoptions CONF_CFLAGS="-march=armv7a"

2
sys/arm/ti/am335x/std.am335x
View File

@ -3,6 +3,8 @@
files "../ti/am335x/files.am335x"
include "../ti/std.ti"
cpu CPU_CORTEXA8
options KERNVIRTADDR=0xc0200000 # Used in ldscript.arm
makeoptions KERNVIRTADDR=0xc0200000

2
sys/arm/ti/omap4/std.omap4
View File

@ -3,6 +3,8 @@
files "../ti/omap4/files.omap4"
include "../ti/std.ti"
cpu CPU_CORTEXA_MP
options KERNVIRTADDR=0xc0200000 # Used in ldscript.arm
makeoptions KERNVIRTADDR=0xc0200000

1
sys/arm/ti/std.ti
View File

@ -1,6 +1,5 @@
# $FreeBSD$
cpu CPU_CORTEXA
machine arm armv6
makeoptions CONF_CFLAGS="-march=armv7a"

2
sys/arm/xilinx/std.zynq7
View File

@ -3,7 +3,7 @@
#
# $FreeBSD$
cpu CPU_CORTEXA
cpu CPU_CORTEXA_MP
machine arm armv6
makeoptions CONF_CFLAGS="-march=armv7a"

2
sys/conf/files.arm
View File

@ -32,7 +32,7 @@ arm/arm/cpufunc_asm_arm11x6.S optional cpu_arm1176
arm/arm/cpufunc_asm_armv4.S optional cpu_arm9 | cpu_arm9e | cpu_fa526 | cpu_xscale_pxa2x0 | cpu_xscale_ixp425 | cpu_xscale_81342
arm/arm/cpufunc_asm_armv5_ec.S optional cpu_arm9e
arm/arm/cpufunc_asm_armv6.S optional cpu_arm1176
arm/arm/cpufunc_asm_armv7.S optional cpu_cortexa | cpu_krait | cpu_mv_pj4b
arm/arm/cpufunc_asm_armv7.S optional cpu_cortexa8 | cpu_cortexa_mp | cpu_krait | cpu_mv_pj4b
arm/arm/cpufunc_asm_fa526.S optional cpu_fa526
arm/arm/cpufunc_asm_pj4b.S optional cpu_mv_pj4b
arm/arm/cpufunc_asm_sheeva.S optional cpu_arm9e

3
sys/conf/options.arm
View File

@ -10,7 +10,8 @@ COUNTS_PER_SEC opt_timer.h
CPU_ARM9 opt_global.h
CPU_ARM9E opt_global.h
CPU_ARM1176 opt_global.h
CPU_CORTEXA opt_global.h
CPU_CORTEXA8 opt_global.h # Support the Cortex-A8 (no MP extensions)
CPU_CORTEXA_MP opt_global.h # Support Cortex-A CPUs with MP extensions
CPU_KRAIT opt_global.h
CPU_FA526 opt_global.h
CPU_MV_PJ4B opt_global.h