Clean up and clarify meta commentary on TAA. Add a state to denote
that TSX doesn't exist on the CPU. MFC after: 3 days Sponsored by: Intel
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184b15ff07
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=355134
@ -1180,11 +1180,15 @@ SYSCTL_PROC(_hw, OID_AUTO, mds_disable, CTLTYPE_INT |
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int x86_taa_enable;
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int x86_taa_state;
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enum {
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TAA_NONE = 0,
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TAA_TSX_DISABLE = 1,
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TAA_VERW = 2,
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TAA_AUTO = 3,
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TAA_TAA_NO = 4
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TAA_NONE = 0, /* No mitigation enabled */
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TAA_TSX_DISABLE = 1, /* Disable TSX via MSR */
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TAA_VERW = 2, /* Use VERW mitigation */
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TAA_AUTO = 3, /* Automatically select the mitigation */
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/* The states below are not selectable by the operator */
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TAA_TAA_UC = 4, /* Mitigation present in microcode */
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TAA_NOT_PRESENT = 5 /* TSX is not present */
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};
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static void
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@ -1208,7 +1212,7 @@ x86_taa_recalculate(void)
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if ((cpu_stdext_feature & CPUID_STDEXT_HLE) == 0 ||
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(cpu_stdext_feature & CPUID_STDEXT_RTM) == 0) {
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/* TSX is not present */
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x86_taa_state = 0;
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x86_taa_state = TAA_NOT_PRESENT;
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return;
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}
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@ -1216,7 +1220,7 @@ x86_taa_recalculate(void)
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if (cpu_ia32_arch_caps & IA32_ARCH_CAP_TAA_NO) {
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/* CPU is not suseptible to TAA */
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taa_need = TAA_NONE;
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taa_state = TAA_TAA_NO;
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taa_state = TAA_TAA_UC;
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} else if (cpu_ia32_arch_caps & IA32_ARCH_CAP_TSX_CTRL) {
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/*
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* CPU can turn off TSX. This is the next best option
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@ -1323,9 +1327,11 @@ sysctl_taa_state_handler(SYSCTL_HANDLER_ARGS)
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case TAA_VERW:
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state = "VERW";
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break;
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case TAA_TAA_NO:
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state = "Not vulnerable";
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case TAA_TAA_UC:
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state = "Mitigated in microcode";
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break;
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case TAA_NOT_PRESENT:
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state = "TSX not present";
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default:
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state = "unknown";
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}
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