Correct PL310_POWER_CTRL offset
Offet for the power control register was specified incorrectly (it had the same value as the prefetch control register.) This change corrects the offset value to 0xF80, per the ARM PL310 documentation. Submitted by: Steve Kiernan <stevek@juniper.net> Obtained from: Juniper Networks, Inc.
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=282586
@ -133,7 +133,7 @@
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#define PREFETCH_CTRL_DATA_PREFETCH (1 << 28)
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#define PREFETCH_CTRL_INSTR_PREFETCH (1 << 29)
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#define PREFETCH_CTRL_DL (1 << 30)
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#define PL310_POWER_CTRL 0xF60
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#define PL310_POWER_CTRL 0xF80
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#define POWER_CTRL_ENABLE_GATING (1 << 0)
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#define POWER_CTRL_ENABLE_STANDBY (1 << 1)
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