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Correct PL310_POWER_CTRL offset

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Offet for the power control register was specified incorrectly (it had
the same value as the prefetch control register.) This change corrects
the offset value to 0xF80, per the ARM PL310 documentation.

Submitted by:	Steve Kiernan <stevek@juniper.net>
Obtained from:	Juniper Networks, Inc.
This commit is contained in:
Ed Maste 2015-05-07 16:56:20 +00:00
parent 654bdb5abb
commit 185bf88e33
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=282586
1 changed files with 1 additions and 1 deletions
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2
sys/arm/include/pl310.h
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@ -133,7 +133,7 @@
#define PREFETCH_CTRL_DATA_PREFETCH (1 << 28)
#define PREFETCH_CTRL_INSTR_PREFETCH (1 << 29)
#define PREFETCH_CTRL_DL (1 << 30)
#define PL310_POWER_CTRL 0xF60
#define PL310_POWER_CTRL 0xF80
#define POWER_CTRL_ENABLE_GATING (1 << 0)
#define POWER_CTRL_ENABLE_STANDBY (1 << 1)