powerpc: micro-optimize cpu_switch()
Since the non-volatile registers are restored at the end of cpu_switchin (of the new thread) they're free for us to use for our own purposes. Load the PCB_FLAGS into a non-volatile register so it's preserved across the C function calls that manage FPU and altivec state. This removes 4 loads from each file. Might be a trivial performance improvement (~12 clock cycles per context switch). MFC after: 3 weeks
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parent
e430d1ed78
commit
19cfd8759e
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=346771
@ -98,17 +98,16 @@ ENTRY(cpu_switch)
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mr %r16,%r5 /* and the new lock */
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mr %r17,%r6 /* and the PCB */
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lwz %r7,PCB_FLAGS(%r17)
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lwz %r18,PCB_FLAGS(%r17)
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/* Save FPU context if needed */
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andi. %r7, %r7, PCB_FPU
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andi. %r7, %r18, PCB_FPU
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beq .L1
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bl save_fpu
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.L1:
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mr %r3,%r14 /* restore old thread ptr */
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lwz %r7,PCB_FLAGS(%r17)
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/* Save Altivec context if needed */
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andi. %r7, %r7, PCB_VEC
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andi. %r7, %r18, PCB_VEC
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beq .L2
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bl save_vec
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@ -151,17 +150,16 @@ blocked_loop:
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mr %r3,%r2 /* Get new thread ptr */
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bl pmap_activate /* Activate the new address space */
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lwz %r6, PCB_FLAGS(%r17)
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lwz %r19, PCB_FLAGS(%r17)
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/* Restore FPU context if needed */
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andi. %r6, %r6, PCB_FPU
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andi. %r6, %r19, PCB_FPU
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beq .L3
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mr %r3,%r2 /* Pass curthread to enable_fpu */
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bl enable_fpu
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.L3:
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lwz %r6, PCB_FLAGS(%r17)
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/* Restore Altivec context if needed */
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andi. %r6, %r6, PCB_VEC
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andi. %r6, %r19, PCB_VEC
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beq .L4
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mr %r3,%r2 /* Pass curthread to enable_vec */
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bl enable_vec
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@ -125,26 +125,24 @@ ENTRY(cpu_switch)
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stdu %r1,-48(%r1)
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lwz %r7, PCB_FLAGS(%r17)
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andi. %r7, %r7, PCB_CDSCR
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lwz %r18, PCB_FLAGS(%r17)
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andi. %r7, %r18, PCB_CDSCR
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beq .L0
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/* Custom DSCR was set. Reseting it to enter kernel */
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li %r7, 0x0
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mtspr SPR_DSCR, %r7
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li %r6, 0x0
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mtspr SPR_DSCR, %r6
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.L0:
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lwz %r7,PCB_FLAGS(%r17)
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/* Save FPU context if needed */
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andi. %r7, %r7, PCB_FPU
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andi. %r7, %r18, PCB_FPU
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beq .L1
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bl save_fpu
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nop
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.L1:
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mr %r3,%r14 /* restore old thread ptr */
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lwz %r7,PCB_FLAGS(%r17)
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/* Save Altivec context if needed */
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andi. %r7, %r7, PCB_VEC
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andi. %r7, %r18, PCB_VEC
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beq .L2
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bl save_vec
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nop
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@ -186,30 +184,28 @@ blocked_loop:
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bl pmap_activate /* Activate the new address space */
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nop
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lwz %r6, PCB_FLAGS(%r17)
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lwz %r19, PCB_FLAGS(%r17)
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/* Restore FPU context if needed */
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andi. %r6, %r6, PCB_FPU
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andi. %r6, %r19, PCB_FPU
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beq .L3
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mr %r3,%r13 /* Pass curthread to enable_fpu */
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bl enable_fpu
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nop
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.L3:
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lwz %r6, PCB_FLAGS(%r17)
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/* Restore Altivec context if needed */
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andi. %r6, %r6, PCB_VEC
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andi. %r6, %r19, PCB_VEC
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beq .L31
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mr %r3,%r13 /* Pass curthread to enable_vec */
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bl enable_vec
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nop
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.L31:
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lwz %r6, PCB_FLAGS(%r17)
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/* Restore Custom DSCR if needed */
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andi. %r6, %r6, PCB_CDSCR
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andi. %r6, %r19, PCB_CDSCR
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beq .L4
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ld %r6, PCB_DSCR(%r17) /* Load the DSCR register*/
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mtspr SPR_DSCR, %r6
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ld %r7, PCB_DSCR(%r17) /* Load the DSCR register*/
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mtspr SPR_DSCR, %r7
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/* thread to restore is in r3 */
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.L4:
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