gcc: Add -flax-vector-conversions
Obtained from: gcc 4.3 (rev. 120572, 120688; GPLv2)
This commit is contained in:
Pedro F. Giffuni
parent
7514065056
commit
1aa997ff6a
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=259005
@ -389,6 +389,36 @@
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* config.gcc: Support core2 processor.
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2007-01-11 Joseph Myers <joseph@codesourcery.com> (r120688)
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* c-common.c (vector_types_convertible_p): Treat opaque types as
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always convertible if they have the same size, but not otherwise.
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2007-01-08 Mark Shinwell <shinwell@codesourcery.com> (r120572)
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* c.opt: Add -flax-vector-conversions.
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* c-typeck.c (convert_for_assignment): Pass flag to
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vector_types_convertible_p to allow emission of note.
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(digest_init): Likewise.
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* c-opts.c: Handle -flax-vector-conversions.
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* c-common.c (flag_lax_vector_conversions): New.
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(vector_types_convertible_p): Unless -flax-vector conversions
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has been passed, disallow conversions between vectors with
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differing numbers of subparts and/or element types. If such
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a conversion is disallowed, possibly emit a note on the first
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occasion only to inform the user of -flax-vector-conversions.
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The new last argument specifies this.
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* c-common.h (flag_lax_vector_conversions): New.
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(vector_types_convertible_p): Add extra argument.
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* config/i386/i386.c (ix86_init_mmx_sse_builtins): Use
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char_type_node for V*QI type vectors.
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* config/rs6000/rs6000-c.c (altivec_overloaded_builtins):
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Update to satisfy new typechecking rules.
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* config/rs6000/altivec.h (vec_cmple): Use vec_cmpge, for both
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C and C++ variants.
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* doc/invoke.texi (C Dialect Options): Document
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-flax-vector-conversions.
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2007-01-05 Manuel Lopez-Ibanez <manu@gcc.gnu.org> (r120505)
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PR c/19978
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@ -254,6 +254,10 @@ int flag_short_double;
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int flag_short_wchar;
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/* Nonzero means allow implicit conversions between vectors with
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differing numbers of subparts and/or differing element types. */
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int flag_lax_vector_conversions;
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/* Nonzero means allow Microsoft extensions without warnings or errors. */
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int flag_ms_extensions;
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@ -1095,18 +1099,45 @@ constant_fits_type_p (tree c, tree type)
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return !TREE_OVERFLOW (c);
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}
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/* Nonzero if vector types T1 and T2 can be converted to each other
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without an explicit cast. */
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int
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vector_types_convertible_p (tree t1, tree t2)
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/* True if vector types T1 and T2 can be converted to each other
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without an explicit cast. If EMIT_LAX_NOTE is true, and T1 and T2
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can only be converted with -flax-vector-conversions yet that is not
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in effect, emit a note telling the user about that option if such
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a note has not previously been emitted. */
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bool
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vector_types_convertible_p (tree t1, tree t2, bool emit_lax_note)
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{
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return targetm.vector_opaque_p (t1)
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|| targetm.vector_opaque_p (t2)
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|| (tree_int_cst_equal (TYPE_SIZE (t1), TYPE_SIZE (t2))
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&& (TREE_CODE (TREE_TYPE (t1)) != REAL_TYPE ||
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TYPE_PRECISION (t1) == TYPE_PRECISION (t2))
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&& INTEGRAL_TYPE_P (TREE_TYPE (t1))
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== INTEGRAL_TYPE_P (TREE_TYPE (t2)));
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static bool emitted_lax_note = false;
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bool convertible_lax;
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if ((targetm.vector_opaque_p (t1) || targetm.vector_opaque_p (t2))
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&& tree_int_cst_equal (TYPE_SIZE (t1), TYPE_SIZE (t2)))
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return true;
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convertible_lax =
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(tree_int_cst_equal (TYPE_SIZE (t1), TYPE_SIZE (t2))
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&& (TREE_CODE (TREE_TYPE (t1)) != REAL_TYPE ||
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TYPE_PRECISION (t1) == TYPE_PRECISION (t2))
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&& (INTEGRAL_TYPE_P (TREE_TYPE (t1))
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== INTEGRAL_TYPE_P (TREE_TYPE (t2))));
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if (!convertible_lax || flag_lax_vector_conversions)
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return convertible_lax;
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if (TYPE_VECTOR_SUBPARTS (t1) == TYPE_VECTOR_SUBPARTS (t2)
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&& comptypes (TREE_TYPE (t1), TREE_TYPE (t2)))
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return true;
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if (emit_lax_note && !emitted_lax_note)
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{
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emitted_lax_note = true;
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inform ("use -flax-vector-conversions to permit "
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"conversions between vectors with differing "
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"element types or numbers of subparts");
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}
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return false;
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}
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/* Convert EXPR to TYPE, warning about conversion problems with constants.
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@ -389,6 +389,10 @@ extern int flag_short_double;
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extern int flag_short_wchar;
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/* Nonzero means allow implicit conversions between vectors with
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differing numbers of subparts and/or differing element types. */
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extern int flag_lax_vector_conversions;
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/* Nonzero means allow Microsoft extensions without warnings or errors. */
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extern int flag_ms_extensions;
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@ -791,7 +795,7 @@ extern tree finish_label_address_expr (tree);
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extern tree lookup_label (tree);
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extern tree lookup_name (tree);
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extern int vector_types_convertible_p (tree t1, tree t2);
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extern bool vector_types_convertible_p (tree t1, tree t2, bool emit_lax_note);
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extern rtx c_expand_expr (tree, rtx, enum machine_mode, int, rtx *);
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@ -710,6 +710,10 @@ c_common_handle_option (size_t scode, const char *arg, int value)
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flag_implicit_templates = value;
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break;
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case OPT_flax_vector_conversions:
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flag_lax_vector_conversions = value;
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break;
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case OPT_fms_extensions:
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flag_ms_extensions = value;
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break;
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@ -3893,7 +3893,7 @@ convert_for_assignment (tree type, tree rhs, enum impl_conv errtype,
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}
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/* Some types can interconvert without explicit casts. */
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else if (codel == VECTOR_TYPE && coder == VECTOR_TYPE
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&& vector_types_convertible_p (type, TREE_TYPE (rhs)))
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&& vector_types_convertible_p (type, TREE_TYPE (rhs), true))
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return convert (type, rhs);
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/* Arithmetic types all interconvert, and enum is treated like int. */
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else if ((codel == INTEGER_TYPE || codel == REAL_TYPE
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@ -4629,7 +4629,7 @@ digest_init (tree type, tree init, bool strict_string, int require_constant)
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below and handle as a constructor. */
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if (code == VECTOR_TYPE
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&& TREE_CODE (TREE_TYPE (inside_init)) == VECTOR_TYPE
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&& vector_types_convertible_p (TREE_TYPE (inside_init), type)
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&& vector_types_convertible_p (TREE_TYPE (inside_init), type, true)
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&& TREE_CONSTANT (inside_init))
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{
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if (TREE_CODE (inside_init) == VECTOR_CST
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@ -584,6 +584,10 @@ Inject friend functions into enclosing namespace
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flabels-ok
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C++ ObjC++
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flax-vector-conversions
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C ObjC C++ ObjC++
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Allow implicit conversions between vectors with differing numbers of subparts and/or differing element types.
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fms-extensions
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C ObjC C++ ObjC++
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Don't warn about uses of Microsoft extensions
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@ -15408,7 +15408,7 @@ ix86_init_mmx_sse_builtins (void)
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const struct builtin_description * d;
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size_t i;
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tree V16QI_type_node = build_vector_type_for_mode (intQI_type_node, V16QImode);
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tree V16QI_type_node = build_vector_type_for_mode (char_type_node, V16QImode);
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tree V2SI_type_node = build_vector_type_for_mode (intSI_type_node, V2SImode);
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tree V2SF_type_node = build_vector_type_for_mode (float_type_node, V2SFmode);
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tree V2DI_type_node
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@ -15417,7 +15417,7 @@ ix86_init_mmx_sse_builtins (void)
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tree V4SF_type_node = build_vector_type_for_mode (float_type_node, V4SFmode);
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tree V4SI_type_node = build_vector_type_for_mode (intSI_type_node, V4SImode);
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tree V4HI_type_node = build_vector_type_for_mode (intHI_type_node, V4HImode);
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tree V8QI_type_node = build_vector_type_for_mode (intQI_type_node, V8QImode);
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tree V8QI_type_node = build_vector_type_for_mode (char_type_node, V8QImode);
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tree V8HI_type_node = build_vector_type_for_mode (intHI_type_node, V8HImode);
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tree pchar_type_node = build_pointer_type (char_type_node);
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@ -332,7 +332,7 @@ NAME (T a1, U a2) \
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__altivec_binary_pred(vec_cmplt,
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__builtin_vec_cmpgt (a2, a1))
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__altivec_binary_pred(vec_cmple,
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__builtin_altivec_cmpge (a2, a1))
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__builtin_vec_cmpge (a2, a1))
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__altivec_scalar_pred(vec_all_in,
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__builtin_altivec_vcmpbfp_p (__CR6_EQ, a1, a2))
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@ -402,7 +402,7 @@ __altivec_scalar_pred(vec_any_nle,
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#undef __altivec_binary_pred
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#else
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#define vec_cmplt(a1, a2) __builtin_vec_cmpgt ((a2), (a1))
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#define vec_cmple(a1, a2) __builtin_altivec_vcmpgefp ((a2), (a1))
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#define vec_cmple(a1, a2) __builtin_vec_cmpge ((a2), (a1))
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#define vec_all_in(a1, a2) __builtin_altivec_vcmpbfp_p (__CR6_EQ, (a1), (a2))
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#define vec_any_out(a1, a2) __builtin_altivec_vcmpbfp_p (__CR6_EQ_REV, (a1), (a2))
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@ -222,17 +222,17 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
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{ ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSB,
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RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSB,
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RS6000_BTI_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
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RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH,
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RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH,
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RS6000_BTI_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
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RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHPX,
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RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH,
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RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH,
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RS6000_BTI_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
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RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX,
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RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX,
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@ -240,17 +240,17 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
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{ ALTIVEC_BUILTIN_VEC_VUPKHSB, ALTIVEC_BUILTIN_VUPKHSB,
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RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKHSB, ALTIVEC_BUILTIN_VUPKHSB,
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RS6000_BTI_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
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RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSB,
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RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSB,
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RS6000_BTI_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
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RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLPX,
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RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH,
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RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH,
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RS6000_BTI_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
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RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX,
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RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX,
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@ -258,11 +258,11 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
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{ ALTIVEC_BUILTIN_VEC_VUPKLSH, ALTIVEC_BUILTIN_VUPKLSH,
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RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKLSH, ALTIVEC_BUILTIN_VUPKLSH,
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RS6000_BTI_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
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RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKLSB, ALTIVEC_BUILTIN_VUPKLSB,
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RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKLSB, ALTIVEC_BUILTIN_VUPKLSB,
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RS6000_BTI_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
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RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
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/* Binary AltiVec builtins. */
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{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
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@ -576,31 +576,23 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
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{ ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQFP,
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RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQFP, ALTIVEC_BUILTIN_VCMPEQFP,
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RS6000_BTI_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW,
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RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW,
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RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
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RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW,
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RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW,
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RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH,
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RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH,
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RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH,
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RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH,
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RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB,
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RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB,
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RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB,
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RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB,
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RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
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{ ALTIVEC_BUILTIN_VEC_CMPGE, ALTIVEC_BUILTIN_VCMPGEFP,
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RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
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{ ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUB,
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@ -618,29 +610,29 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
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{ ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTFP,
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RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPGTFP, ALTIVEC_BUILTIN_VCMPGTFP,
|
||||
RS6000_BTI_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
||||
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTSW, ALTIVEC_BUILTIN_VCMPGTSW,
|
||||
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
||||
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTSW, ALTIVEC_BUILTIN_VCMPGTSW,
|
||||
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTUW, ALTIVEC_BUILTIN_VCMPGTUW,
|
||||
RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
||||
RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTUW, ALTIVEC_BUILTIN_VCMPGTUW,
|
||||
RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTSH, ALTIVEC_BUILTIN_VCMPGTSH,
|
||||
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
||||
RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTSH, ALTIVEC_BUILTIN_VCMPGTSH,
|
||||
RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTUH, ALTIVEC_BUILTIN_VCMPGTUH,
|
||||
RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
||||
RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTUH, ALTIVEC_BUILTIN_VCMPGTUH,
|
||||
RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTSB, ALTIVEC_BUILTIN_VCMPGTSB,
|
||||
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
||||
RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTSB, ALTIVEC_BUILTIN_VCMPGTSB,
|
||||
RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTUB, ALTIVEC_BUILTIN_VCMPGTUB,
|
||||
RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
||||
RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTUB, ALTIVEC_BUILTIN_VCMPGTUB,
|
||||
RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_CMPLE, ALTIVEC_BUILTIN_VCMPGEFP,
|
||||
|
||||
@ -29,14 +29,23 @@
|
||||
|
||||
* decl.c (compute_array_index_type): New warning flag warn_vla.
|
||||
|
||||
2007-01-07 Manuel Lopez-Ibanez <manu@gcc.gnu.org>
|
||||
2007-01-08 Mark Shinwell <shinwell@codesourcery.com> (r120572)
|
||||
|
||||
* call.c (standard_conversion): Pass flag to
|
||||
vector_types_convertible_p to disallow emission of note.
|
||||
* typeck.c (convert_for_assignment): Pass flag to
|
||||
vector_types_convertible_p to allow emission of note.
|
||||
(ptr_reasonably_similar): Pass flag to vector_types_convertible_p
|
||||
to disallow emission of note.
|
||||
|
||||
2007-01-07 Manuel Lopez-Ibanez <manu@gcc.gnu.org> (r120558)
|
||||
|
||||
PR c++/28986
|
||||
* typeck.c (build_binary_op): Call overflow_warning if
|
||||
TREE_OVERFLOW_P is true for the result and not for any of the
|
||||
operands.
|
||||
|
||||
2007-01-05 Manuel Lopez-Ibanez <manu@gcc.gnu.org>
|
||||
2007-01-05 Manuel Lopez-Ibanez <manu@gcc.gnu.org> (r120505)
|
||||
|
||||
PR c/19978
|
||||
* semantics.c (finish_unary_op_expr): Warn only if result
|
||||
|
||||
@ -838,7 +838,7 @@ standard_conversion (tree to, tree from, tree expr, bool c_cast_p,
|
||||
conv->rank = cr_promotion;
|
||||
}
|
||||
else if (fcode == VECTOR_TYPE && tcode == VECTOR_TYPE
|
||||
&& vector_types_convertible_p (from, to))
|
||||
&& vector_types_convertible_p (from, to, false))
|
||||
return build_conv (ck_std, to, conv);
|
||||
else if (!(flags & LOOKUP_CONSTRUCTOR_CALLABLE)
|
||||
&& IS_AGGR_TYPE (to) && IS_AGGR_TYPE (from)
|
||||
|
||||
@ -6229,7 +6229,7 @@ convert_for_assignment (tree type, tree rhs,
|
||||
coder = TREE_CODE (rhstype);
|
||||
|
||||
if (TREE_CODE (type) == VECTOR_TYPE && coder == VECTOR_TYPE
|
||||
&& vector_types_convertible_p (type, rhstype))
|
||||
&& vector_types_convertible_p (type, rhstype, true))
|
||||
return convert (type, rhs);
|
||||
|
||||
if (rhs == error_mark_node || rhstype == error_mark_node)
|
||||
@ -6799,7 +6799,7 @@ ptr_reasonably_similar (tree to, tree from)
|
||||
continue;
|
||||
|
||||
if (TREE_CODE (to) == VECTOR_TYPE
|
||||
&& vector_types_convertible_p (to, from))
|
||||
&& vector_types_convertible_p (to, from, false))
|
||||
return 1;
|
||||
|
||||
if (TREE_CODE (to) == INTEGER_TYPE
|
||||
|
||||
@ -167,7 +167,7 @@ in the following sections.
|
||||
-fno-asm -fno-builtin -fno-builtin-@var{function} @gol
|
||||
-fhosted -ffreestanding -fopenmp -fms-extensions @gol
|
||||
-trigraphs -no-integrated-cpp -traditional -traditional-cpp @gol
|
||||
-fallow-single-precision -fcond-mismatch @gol
|
||||
-fallow-single-precision -fcond-mismatch -flax-vector-conversions @gol
|
||||
-fsigned-bitfields -fsigned-char @gol
|
||||
-funsigned-bitfields -funsigned-char}
|
||||
|
||||
@ -1337,6 +1337,12 @@ Allow conditional expressions with mismatched types in the second and
|
||||
third arguments. The value of such an expression is void. This option
|
||||
is not supported for C++.
|
||||
|
||||
@item -flax-vector-conversions
|
||||
@opindex flax-vector-conversions
|
||||
Allow implicit conversions between vectors with differing numbers of
|
||||
elements and/or incompatible element types. This option should not be
|
||||
used for new code.
|
||||
|
||||
@item -funsigned-char
|
||||
@opindex funsigned-char
|
||||
Let the type @code{char} be unsigned, like @code{unsigned char}.
|
||||
|
||||
Loading…
Reference in New Issue
Block a user