o Move iommu_set_buswide_ctx, iommu_is_buswide_ctx to
the generic iommu busdma backend; o Move bus_dma_iommu_set_buswide, bus_dma_iommu_load_ident prototypes to iommu.h. Reviewed by: kib Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D25866
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=363663
@ -326,6 +326,26 @@ bus_dma_iommu_set_buswide(device_t dev)
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return (true);
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return (true);
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}
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}
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void
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iommu_set_buswide_ctx(struct iommu_unit *unit, u_int busno)
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{
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MPASS(busno <= PCI_BUSMAX);
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IOMMU_LOCK(unit);
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unit->buswide_ctxs[busno / NBBY / sizeof(uint32_t)] |=
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1 << (busno % (NBBY * sizeof(uint32_t)));
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IOMMU_UNLOCK(unit);
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}
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bool
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iommu_is_buswide_ctx(struct iommu_unit *unit, u_int busno)
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{
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MPASS(busno <= PCI_BUSMAX);
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return ((unit->buswide_ctxs[busno / NBBY / sizeof(uint32_t)] &
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(1U << (busno % (NBBY * sizeof(uint32_t))))) != 0);
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}
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static MALLOC_DEFINE(M_IOMMU_DMAMAP, "iommu_dmamap", "IOMMU DMA Map");
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static MALLOC_DEFINE(M_IOMMU_DMAMAP, "iommu_dmamap", "IOMMU DMA Map");
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static void iommu_bus_schedule_dmamap(struct iommu_unit *unit,
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static void iommu_bus_schedule_dmamap(struct iommu_unit *unit,
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@ -221,6 +221,13 @@ int iommu_gas_map_region(struct iommu_domain *domain,
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int iommu_gas_reserve_region(struct iommu_domain *domain, iommu_gaddr_t start,
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int iommu_gas_reserve_region(struct iommu_domain *domain, iommu_gaddr_t start,
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iommu_gaddr_t end);
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iommu_gaddr_t end);
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void iommu_set_buswide_ctx(struct iommu_unit *unit, u_int busno);
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bool iommu_is_buswide_ctx(struct iommu_unit *unit, u_int busno);
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bool bus_dma_iommu_set_buswide(device_t dev);
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int bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map,
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vm_paddr_t start, vm_size_t length, int flags);
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SYSCTL_DECL(_hw_iommu);
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SYSCTL_DECL(_hw_iommu);
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#endif /* !_SYS_IOMMU_H_ */
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#endif /* !_SYS_IOMMU_H_ */
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@ -191,11 +191,5 @@ _bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map,
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return (tc->impl->map_complete(dmat, map, segs, nsegs, error));
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return (tc->impl->map_complete(dmat, map, segs, nsegs, error));
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}
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}
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#ifdef _KERNEL
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bool bus_dma_iommu_set_buswide(device_t dev);
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int bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map,
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vm_paddr_t start, vm_size_t length, int flags);
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#endif
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#endif /* !_X86_BUS_DMA_H_ */
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#endif /* !_X86_BUS_DMA_H_ */
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@ -281,9 +281,6 @@ void dmar_quirks_pre_use(struct iommu_unit *dmar);
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int dmar_init_irt(struct dmar_unit *unit);
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int dmar_init_irt(struct dmar_unit *unit);
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void dmar_fini_irt(struct dmar_unit *unit);
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void dmar_fini_irt(struct dmar_unit *unit);
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void iommu_set_buswide_ctx(struct iommu_unit *unit, u_int busno);
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bool iommu_is_buswide_ctx(struct iommu_unit *unit, u_int busno);
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extern iommu_haddr_t dmar_high;
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extern iommu_haddr_t dmar_high;
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extern int haw;
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extern int haw;
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extern int dmar_tbl_pagecnt;
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extern int dmar_tbl_pagecnt;
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@ -592,26 +592,6 @@ static driver_t dmar_driver = {
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DRIVER_MODULE(dmar, acpi, dmar_driver, dmar_devclass, 0, 0);
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DRIVER_MODULE(dmar, acpi, dmar_driver, dmar_devclass, 0, 0);
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MODULE_DEPEND(dmar, acpi, 1, 1, 1);
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MODULE_DEPEND(dmar, acpi, 1, 1, 1);
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void
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iommu_set_buswide_ctx(struct iommu_unit *unit, u_int busno)
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{
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MPASS(busno <= PCI_BUSMAX);
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IOMMU_LOCK(unit);
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unit->buswide_ctxs[busno / NBBY / sizeof(uint32_t)] |=
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1 << (busno % (NBBY * sizeof(uint32_t)));
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IOMMU_UNLOCK(unit);
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}
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bool
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iommu_is_buswide_ctx(struct iommu_unit *unit, u_int busno)
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{
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MPASS(busno <= PCI_BUSMAX);
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return ((unit->buswide_ctxs[busno / NBBY / sizeof(uint32_t)] &
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(1U << (busno % (NBBY * sizeof(uint32_t))))) != 0);
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}
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static void
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static void
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dmar_print_path(int busno, int depth, const ACPI_DMAR_PCI_PATH *path)
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dmar_print_path(int busno, int depth, const ACPI_DMAR_PCI_PATH *path)
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{
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{
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