Add an disabled workaround for the AR9285SE.
This just requires a little HAL change (add a new config parameter) and some glue in if_ath_pci.c, however I'm leaving this up for someone else to do. Obtained from: Qualcomm Atheros
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1b86b1d21a
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=237183
@ -369,6 +369,25 @@ ar9285ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
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{
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uint32_t val;
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/*
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* This workaround needs some integration work with the HAL
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* config parameters and the if_ath_pci.c glue.
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* Specifically, read the value of the PCI register 0x70c
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* (4 byte PCI config space register) and store it in ath_hal_war70c.
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* Then if it's non-zero, the below WAR would override register
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* 0x570c upon suspend/resume.
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*/
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#if 0
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if (AR_SREV_9285E_20(ah)) {
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val = AH_PRIVATE(ah)->ah_config.ath_hal_war70c;
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if (val) {
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val &= 0xffff00ff;
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val |= 0x6f00;
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OS_REG_WRITE(ah, 0x570c, val);
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}
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}
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#endif
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if (AH_PRIVATE(ah)->ah_ispcie && !restore) {
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ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_pcieserdes, 1, 0);
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OS_DELAY(1000);
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